2 IA32/x64 architecture specific defintions needed by debug transfer protocol.It is only
3 intended to be used by Debug related module implementation.
5 Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #ifndef __PROCESSOR_CONTEXT_H__
11 #define __PROCESSOR_CONTEXT_H__
14 // IA-32/x64 processor register index table
16 #define SOFT_DEBUGGER_REGISTER_DR0 0x00
17 #define SOFT_DEBUGGER_REGISTER_DR1 0x01
18 #define SOFT_DEBUGGER_REGISTER_DR2 0x02
19 #define SOFT_DEBUGGER_REGISTER_DR3 0x03
20 #define SOFT_DEBUGGER_REGISTER_DR6 0x04
21 #define SOFT_DEBUGGER_REGISTER_DR7 0x05
22 #define SOFT_DEBUGGER_REGISTER_EFLAGS 0x06
23 #define SOFT_DEBUGGER_REGISTER_LDTR 0x07
24 #define SOFT_DEBUGGER_REGISTER_TR 0x08
25 #define SOFT_DEBUGGER_REGISTER_GDTR0 0x09 // the low 32bit of GDTR
26 #define SOFT_DEBUGGER_REGISTER_GDTR1 0x0A // the high 32bit of GDTR
27 #define SOFT_DEBUGGER_REGISTER_IDTR0 0x0B // the low 32bit of IDTR
28 #define SOFT_DEBUGGER_REGISTER_IDTR1 0x0C // the high 32bot of IDTR
29 #define SOFT_DEBUGGER_REGISTER_EIP 0x0D
30 #define SOFT_DEBUGGER_REGISTER_GS 0x0E
31 #define SOFT_DEBUGGER_REGISTER_FS 0x0F
32 #define SOFT_DEBUGGER_REGISTER_ES 0x10
33 #define SOFT_DEBUGGER_REGISTER_DS 0x11
34 #define SOFT_DEBUGGER_REGISTER_CS 0x12
35 #define SOFT_DEBUGGER_REGISTER_SS 0x13
36 #define SOFT_DEBUGGER_REGISTER_CR0 0x14
37 #define SOFT_DEBUGGER_REGISTER_CR1 0x15
38 #define SOFT_DEBUGGER_REGISTER_CR2 0x16
39 #define SOFT_DEBUGGER_REGISTER_CR3 0x17
40 #define SOFT_DEBUGGER_REGISTER_CR4 0x18
42 #define SOFT_DEBUGGER_REGISTER_DI 0x19
43 #define SOFT_DEBUGGER_REGISTER_SI 0x1A
44 #define SOFT_DEBUGGER_REGISTER_BP 0x1B
45 #define SOFT_DEBUGGER_REGISTER_SP 0x1C
46 #define SOFT_DEBUGGER_REGISTER_DX 0x1D
47 #define SOFT_DEBUGGER_REGISTER_CX 0x1E
48 #define SOFT_DEBUGGER_REGISTER_BX 0x1F
49 #define SOFT_DEBUGGER_REGISTER_AX 0x20
52 // This below registers are only available for x64 (not valid for Ia32 mode)
54 #define SOFT_DEBUGGER_REGISTER_CR8 0x21
55 #define SOFT_DEBUGGER_REGISTER_R8 0x22
56 #define SOFT_DEBUGGER_REGISTER_R9 0x23
57 #define SOFT_DEBUGGER_REGISTER_R10 0x24
58 #define SOFT_DEBUGGER_REGISTER_R11 0x25
59 #define SOFT_DEBUGGER_REGISTER_R12 0x26
60 #define SOFT_DEBUGGER_REGISTER_R13 0x27
61 #define SOFT_DEBUGGER_REGISTER_R14 0x28
62 #define SOFT_DEBUGGER_REGISTER_R15 0x29
65 // This below registers are FP / MMX / XMM registers
67 #define SOFT_DEBUGGER_REGISTER_FP_BASE 0x30
69 #define SOFT_DEBUGGER_REGISTER_FP_FCW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x00)
70 #define SOFT_DEBUGGER_REGISTER_FP_FSW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x01)
71 #define SOFT_DEBUGGER_REGISTER_FP_FTW (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x02)
72 #define SOFT_DEBUGGER_REGISTER_FP_OPCODE (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x03)
73 #define SOFT_DEBUGGER_REGISTER_FP_EIP (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x04)
74 #define SOFT_DEBUGGER_REGISTER_FP_CS (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x05)
75 #define SOFT_DEBUGGER_REGISTER_FP_DATAOFFSET (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x06)
76 #define SOFT_DEBUGGER_REGISTER_FP_DS (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x07)
77 #define SOFT_DEBUGGER_REGISTER_FP_MXCSR (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x08)
78 #define SOFT_DEBUGGER_REGISTER_FP_MXCSR_MASK (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x09)
79 #define SOFT_DEBUGGER_REGISTER_ST0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0A)
80 #define SOFT_DEBUGGER_REGISTER_ST1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0B)
81 #define SOFT_DEBUGGER_REGISTER_ST2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0C)
82 #define SOFT_DEBUGGER_REGISTER_ST3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0D)
83 #define SOFT_DEBUGGER_REGISTER_ST4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0E)
84 #define SOFT_DEBUGGER_REGISTER_ST5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x0F)
85 #define SOFT_DEBUGGER_REGISTER_ST6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x10)
86 #define SOFT_DEBUGGER_REGISTER_ST7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x11)
87 #define SOFT_DEBUGGER_REGISTER_XMM0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x12)
88 #define SOFT_DEBUGGER_REGISTER_XMM1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x13)
89 #define SOFT_DEBUGGER_REGISTER_XMM2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x14)
90 #define SOFT_DEBUGGER_REGISTER_XMM3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x15)
91 #define SOFT_DEBUGGER_REGISTER_XMM4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x16)
92 #define SOFT_DEBUGGER_REGISTER_XMM5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x17)
93 #define SOFT_DEBUGGER_REGISTER_XMM6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x18)
94 #define SOFT_DEBUGGER_REGISTER_XMM7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x19)
95 #define SOFT_DEBUGGER_REGISTER_XMM8 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1A)
96 #define SOFT_DEBUGGER_REGISTER_XMM9 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1B)
97 #define SOFT_DEBUGGER_REGISTER_XMM10 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1C)
98 #define SOFT_DEBUGGER_REGISTER_XMM11 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1D)
99 #define SOFT_DEBUGGER_REGISTER_XMM12 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1E)
100 #define SOFT_DEBUGGER_REGISTER_XMM13 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x1F)
101 #define SOFT_DEBUGGER_REGISTER_XMM14 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x20)
102 #define SOFT_DEBUGGER_REGISTER_XMM15 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x21)
103 #define SOFT_DEBUGGER_REGISTER_MM0 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x22)
104 #define SOFT_DEBUGGER_REGISTER_MM1 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x23)
105 #define SOFT_DEBUGGER_REGISTER_MM2 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x24)
106 #define SOFT_DEBUGGER_REGISTER_MM3 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x25)
107 #define SOFT_DEBUGGER_REGISTER_MM4 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x26)
108 #define SOFT_DEBUGGER_REGISTER_MM5 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x27)
109 #define SOFT_DEBUGGER_REGISTER_MM6 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x28)
110 #define SOFT_DEBUGGER_REGISTER_MM7 (SOFT_DEBUGGER_REGISTER_FP_BASE + 0x29)
112 #define SOFT_DEBUGGER_REGISTER_MAX SOFT_DEBUGGER_REGISTER_MM7
114 #define SOFT_DEBUGGER_MSR_EFER (0xC0000080)
120 /// FP / MMX / XMM registers (see fxrstor instruction definition)
159 UINT8 Reserved11
[14 * 16];
160 } DEBUG_DATA_IA32_FX_SAVE_STATE
;
163 /// IA-32 processor context definition
166 UINT32 ExceptionData
;
167 DEBUG_DATA_IA32_FX_SAVE_STATE FxSaveState
;
187 UINT32 Cr1
; ///< Reserved
199 } DEBUG_DATA_IA32_SYSTEM_CONTEXT
;
203 /// FP / MMX / XMM registers (see fxrstor instruction definition)
250 UINT8 Reserved11
[6 * 16];
251 } DEBUG_DATA_X64_FX_SAVE_STATE
;
254 /// x64 processor context definition
257 UINT64 ExceptionData
;
258 DEBUG_DATA_X64_FX_SAVE_STATE FxSaveState
;
278 UINT64 Cr1
; ///< Reserved
299 } DEBUG_DATA_X64_SYSTEM_CONTEXT
;