4 Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 IA32_IDT_GATE_DESCRIPTOR gIdtTable
[INTERRUPT_VECTOR_NUMBER
] = { 0 };
22 EFI_CPU_INTERRUPT_HANDLER ExternalVectorTable
[0x100];
23 BOOLEAN InterruptState
= FALSE
;
24 EFI_HANDLE mCpuHandle
= NULL
;
25 BOOLEAN mIsFlushingGCD
;
26 UINT8 mDefaultMemoryType
= MTRR_CACHE_WRITE_BACK
;
27 UINT64 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
28 UINT64 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
30 FIXED_MTRR mFixedMtrrTable
[] = {
32 MTRR_LIB_IA32_MTRR_FIX64K_00000
,
37 MTRR_LIB_IA32_MTRR_FIX16K_80000
,
42 MTRR_LIB_IA32_MTRR_FIX16K_A0000
,
47 MTRR_LIB_IA32_MTRR_FIX4K_C0000
,
52 MTRR_LIB_IA32_MTRR_FIX4K_C8000
,
57 MTRR_LIB_IA32_MTRR_FIX4K_D0000
,
62 MTRR_LIB_IA32_MTRR_FIX4K_D8000
,
67 MTRR_LIB_IA32_MTRR_FIX4K_E0000
,
72 MTRR_LIB_IA32_MTRR_FIX4K_E8000
,
77 MTRR_LIB_IA32_MTRR_FIX4K_F0000
,
82 MTRR_LIB_IA32_MTRR_FIX4K_F8000
,
89 EFI_CPU_ARCH_PROTOCOL gCpu
= {
95 CpuRegisterInterruptHandler
,
97 CpuSetMemoryAttributes
,
99 4 // DmaBufferAlignment
103 // Error code flag indicating whether or not an error code will be
104 // pushed on the stack if an exception occurs.
106 // 1 means an error code will be pushed, otherwise 0
108 // bit 0 - exception 0
109 // bit 1 - exception 1
112 UINT32 mErrorCodeFlag
= 0x00027d00;
115 // Local function prototypes
119 Set Interrupt Descriptor Table Handler Address.
121 @param Index The Index of the interrupt descriptor table handle.
122 @param Handler Handler address.
126 SetInterruptDescriptorTableHandlerAddress (
128 IN VOID
*Handler OPTIONAL
132 // CPU Arch Protocol Functions
137 Common exception handler.
139 @param InterruptType Exception type
140 @param SystemContext EFI_SYSTEM_CONTEXT
145 CommonExceptionHandler (
146 IN EFI_EXCEPTION_TYPE InterruptType
,
147 IN EFI_SYSTEM_CONTEXT SystemContext
150 #if defined (MDE_CPU_IA32)
153 "!!!! IA32 Exception Type - %08x !!!!\n",
156 if ((mErrorCodeFlag
& (1 << InterruptType
)) != 0) {
159 "ExceptionData - %08x\n",
160 SystemContext
.SystemContextIa32
->ExceptionData
165 "CS - %04x, EIP - %08x, EFL - %08x, SS - %04x\n",
166 SystemContext
.SystemContextIa32
->Cs
,
167 SystemContext
.SystemContextIa32
->Eip
,
168 SystemContext
.SystemContextIa32
->Eflags
,
169 SystemContext
.SystemContextIa32
->Ss
173 "DS - %04x, ES - %04x, FS - %04x, GS - %04x\n",
174 SystemContext
.SystemContextIa32
->Ds
,
175 SystemContext
.SystemContextIa32
->Es
,
176 SystemContext
.SystemContextIa32
->Fs
,
177 SystemContext
.SystemContextIa32
->Gs
181 "EAX - %08x, EBX - %08x, ECX - %08x, EDX - %08x\n",
182 SystemContext
.SystemContextIa32
->Eax
,
183 SystemContext
.SystemContextIa32
->Ebx
,
184 SystemContext
.SystemContextIa32
->Ecx
,
185 SystemContext
.SystemContextIa32
->Edx
189 "ESP - %08x, EBP - %08x, ESI - %08x, EDI - %08x\n",
190 SystemContext
.SystemContextIa32
->Esp
,
191 SystemContext
.SystemContextIa32
->Ebp
,
192 SystemContext
.SystemContextIa32
->Esi
,
193 SystemContext
.SystemContextIa32
->Edi
197 "GDT - %08x LIM - %04x, IDT - %08x LIM - %04x\n",
198 SystemContext
.SystemContextIa32
->Gdtr
[0],
199 SystemContext
.SystemContextIa32
->Gdtr
[1],
200 SystemContext
.SystemContextIa32
->Idtr
[0],
201 SystemContext
.SystemContextIa32
->Idtr
[1]
205 "LDT - %08x, TR - %08x\n",
206 SystemContext
.SystemContextIa32
->Ldtr
,
207 SystemContext
.SystemContextIa32
->Tr
211 "CR0 - %08x, CR2 - %08x, CR3 - %08x, CR4 - %08x\n",
212 SystemContext
.SystemContextIa32
->Cr0
,
213 SystemContext
.SystemContextIa32
->Cr2
,
214 SystemContext
.SystemContextIa32
->Cr3
,
215 SystemContext
.SystemContextIa32
->Cr4
219 "DR0 - %08x, DR1 - %08x, DR2 - %08x, DR3 - %08x\n",
220 SystemContext
.SystemContextIa32
->Dr0
,
221 SystemContext
.SystemContextIa32
->Dr1
,
222 SystemContext
.SystemContextIa32
->Dr2
,
223 SystemContext
.SystemContextIa32
->Dr3
227 "DR6 - %08x, DR7 - %08x\n",
228 SystemContext
.SystemContextIa32
->Dr6
,
229 SystemContext
.SystemContextIa32
->Dr7
231 #elif defined (MDE_CPU_X64)
234 "!!!! X64 Exception Type - %016lx !!!!\n",
235 (UINT64
)InterruptType
237 if ((mErrorCodeFlag
& (1 << InterruptType
)) != 0) {
240 "ExceptionData - %016lx\n",
241 SystemContext
.SystemContextX64
->ExceptionData
246 "RIP - %016lx, RFL - %016lx\n",
247 SystemContext
.SystemContextX64
->Rip
,
248 SystemContext
.SystemContextX64
->Rflags
252 "RAX - %016lx, RCX - %016lx, RDX - %016lx\n",
253 SystemContext
.SystemContextX64
->Rax
,
254 SystemContext
.SystemContextX64
->Rcx
,
255 SystemContext
.SystemContextX64
->Rdx
259 "RBX - %016lx, RSP - %016lx, RBP - %016lx\n",
260 SystemContext
.SystemContextX64
->Rbx
,
261 SystemContext
.SystemContextX64
->Rsp
,
262 SystemContext
.SystemContextX64
->Rbp
266 "RSI - %016lx, RDI - %016lx\n",
267 SystemContext
.SystemContextX64
->Rsi
,
268 SystemContext
.SystemContextX64
->Rdi
272 "R8 - %016lx, R9 - %016lx, R10 - %016lx\n",
273 SystemContext
.SystemContextX64
->R8
,
274 SystemContext
.SystemContextX64
->R9
,
275 SystemContext
.SystemContextX64
->R10
279 "R11 - %016lx, R12 - %016lx, R13 - %016lx\n",
280 SystemContext
.SystemContextX64
->R11
,
281 SystemContext
.SystemContextX64
->R12
,
282 SystemContext
.SystemContextX64
->R13
286 "R14 - %016lx, R15 - %016lx\n",
287 SystemContext
.SystemContextX64
->R14
,
288 SystemContext
.SystemContextX64
->R15
292 "CS - %04lx, DS - %04lx, ES - %04lx, FS - %04lx, GS - %04lx, SS - %04lx\n",
293 SystemContext
.SystemContextX64
->Cs
,
294 SystemContext
.SystemContextX64
->Ds
,
295 SystemContext
.SystemContextX64
->Es
,
296 SystemContext
.SystemContextX64
->Fs
,
297 SystemContext
.SystemContextX64
->Gs
,
298 SystemContext
.SystemContextX64
->Ss
302 "GDT - %016lx; %04lx, IDT - %016lx; %04lx\n",
303 SystemContext
.SystemContextX64
->Gdtr
[0],
304 SystemContext
.SystemContextX64
->Gdtr
[1],
305 SystemContext
.SystemContextX64
->Idtr
[0],
306 SystemContext
.SystemContextX64
->Idtr
[1]
310 "LDT - %016lx, TR - %016lx\n",
311 SystemContext
.SystemContextX64
->Ldtr
,
312 SystemContext
.SystemContextX64
->Tr
316 "CR0 - %016lx, CR2 - %016lx, CR3 - %016lx\n",
317 SystemContext
.SystemContextX64
->Cr0
,
318 SystemContext
.SystemContextX64
->Cr2
,
319 SystemContext
.SystemContextX64
->Cr3
323 "CR4 - %016lx, CR8 - %016lx\n",
324 SystemContext
.SystemContextX64
->Cr4
,
325 SystemContext
.SystemContextX64
->Cr8
329 "DR0 - %016lx, DR1 - %016lx, DR2 - %016lx\n",
330 SystemContext
.SystemContextX64
->Dr0
,
331 SystemContext
.SystemContextX64
->Dr1
,
332 SystemContext
.SystemContextX64
->Dr2
336 "DR3 - %016lx, DR6 - %016lx, DR7 - %016lx\n",
337 SystemContext
.SystemContextX64
->Dr3
,
338 SystemContext
.SystemContextX64
->Dr6
,
339 SystemContext
.SystemContextX64
->Dr7
342 #error CPU type not supported for exception information dump!
346 // Hang the system with CpuSleep so the processor will enter a lower power
356 Flush CPU data cache. If the instruction cache is fully coherent
357 with all DMA operations then function can just return EFI_SUCCESS.
359 @param This Protocol instance structure
360 @param Start Physical address to start flushing from.
361 @param Length Number of bytes to flush. Round up to chipset
363 @param FlushType Specifies the type of flush operation to perform.
365 @retval EFI_SUCCESS If cache was flushed
366 @retval EFI_UNSUPPORTED If flush type is not supported.
367 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
372 CpuFlushCpuDataCache (
373 IN EFI_CPU_ARCH_PROTOCOL
*This
,
374 IN EFI_PHYSICAL_ADDRESS Start
,
376 IN EFI_CPU_FLUSH_TYPE FlushType
379 if (FlushType
== EfiCpuFlushTypeWriteBackInvalidate
) {
382 } else if (FlushType
== EfiCpuFlushTypeInvalidate
) {
386 return EFI_UNSUPPORTED
;
392 Enables CPU interrupts.
394 @param This Protocol instance structure
396 @retval EFI_SUCCESS If interrupts were enabled in the CPU
397 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
403 IN EFI_CPU_ARCH_PROTOCOL
*This
408 InterruptState
= TRUE
;
414 Disables CPU interrupts.
416 @param This Protocol instance structure
418 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
419 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
424 CpuDisableInterrupt (
425 IN EFI_CPU_ARCH_PROTOCOL
*This
428 DisableInterrupts ();
430 InterruptState
= FALSE
;
436 Return the state of interrupts.
438 @param This Protocol instance structure
439 @param State Pointer to the CPU's current interrupt state
441 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
442 @retval EFI_INVALID_PARAMETER State is NULL.
447 CpuGetInterruptState (
448 IN EFI_CPU_ARCH_PROTOCOL
*This
,
453 return EFI_INVALID_PARAMETER
;
456 *State
= InterruptState
;
462 Generates an INIT to the CPU.
464 @param This Protocol instance structure
465 @param InitType Type of CPU INIT to perform
467 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
469 @retval EFI_DEVICE_ERROR If CPU INIT failed.
470 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
476 IN EFI_CPU_ARCH_PROTOCOL
*This
,
477 IN EFI_CPU_INIT_TYPE InitType
480 return EFI_UNSUPPORTED
;
485 Registers a function to be called from the CPU interrupt handler.
487 @param This Protocol instance structure
488 @param InterruptType Defines which interrupt to hook. IA-32
489 valid range is 0x00 through 0xFF
490 @param InterruptHandler A pointer to a function of type
491 EFI_CPU_INTERRUPT_HANDLER that is called
492 when a processor interrupt occurs. A null
493 pointer is an error condition.
495 @retval EFI_SUCCESS If handler installed or uninstalled.
496 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
497 for InterruptType was previously installed.
498 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
499 InterruptType was not previously installed.
500 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
506 CpuRegisterInterruptHandler (
507 IN EFI_CPU_ARCH_PROTOCOL
*This
,
508 IN EFI_EXCEPTION_TYPE InterruptType
,
509 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
512 if (InterruptType
< 0 || InterruptType
> 0xff) {
513 return EFI_UNSUPPORTED
;
516 if (InterruptHandler
== NULL
&& ExternalVectorTable
[InterruptType
] == NULL
) {
517 return EFI_INVALID_PARAMETER
;
520 if (InterruptHandler
!= NULL
&& ExternalVectorTable
[InterruptType
] != NULL
) {
521 return EFI_ALREADY_STARTED
;
524 SetInterruptDescriptorTableHandlerAddress ((UINTN
)InterruptType
, NULL
);
525 ExternalVectorTable
[InterruptType
] = InterruptHandler
;
531 Returns a timer value from one of the CPU's internal timers. There is no
532 inherent time interval between ticks but is a function of the CPU frequency.
534 @param This - Protocol instance structure.
535 @param TimerIndex - Specifies which CPU timer is requested.
536 @param TimerValue - Pointer to the returned timer value.
537 @param TimerPeriod - A pointer to the amount of time that passes
538 in femtoseconds (10-15) for each increment
539 of TimerValue. If TimerValue does not
540 increment at a predictable rate, then 0 is
541 returned. The amount of time that has
542 passed between two calls to GetTimerValue()
543 can be calculated with the formula
544 (TimerValue2 - TimerValue1) * TimerPeriod.
545 This parameter is optional and may be NULL.
547 @retval EFI_SUCCESS - If the CPU timer count was returned.
548 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
549 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
550 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
556 IN EFI_CPU_ARCH_PROTOCOL
*This
,
557 IN UINT32 TimerIndex
,
558 OUT UINT64
*TimerValue
,
559 OUT UINT64
*TimerPeriod OPTIONAL
562 if (TimerValue
== NULL
) {
563 return EFI_INVALID_PARAMETER
;
566 if (TimerIndex
!= 0) {
567 return EFI_INVALID_PARAMETER
;
570 *TimerValue
= AsmReadTsc ();
572 if (TimerPeriod
!= NULL
) {
574 // BugBug: Hard coded. Don't know how to do this generically
576 *TimerPeriod
= 1000000000;
584 Set memory cacheability attributes for given range of memeory.
586 @param This Protocol instance structure
587 @param BaseAddress Specifies the start address of the
589 @param Length Specifies the length of the memory range
590 @param Attributes The memory cacheability for the memory range
592 @retval EFI_SUCCESS If the cacheability of that memory range is
594 @retval EFI_UNSUPPORTED If the desired operation cannot be done
595 @retval EFI_INVALID_PARAMETER The input parameter is not correct,
601 CpuSetMemoryAttributes (
602 IN EFI_CPU_ARCH_PROTOCOL
*This
,
603 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
608 RETURN_STATUS Status
;
609 MTRR_MEMORY_CACHE_TYPE CacheType
;
611 if (!IsMtrrSupported ()) {
612 return EFI_UNSUPPORTED
;
616 // If this function is called because GCD SetMemorySpaceAttributes () is called
617 // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory
618 // map with MTRR values. So there is no need to modify MTRRs, just return immediately
619 // to avoid unnecessary computing.
621 if (mIsFlushingGCD
) {
622 DEBUG((EFI_D_ERROR
, " Flushing GCD\n"));
626 switch (Attributes
) {
628 CacheType
= CacheUncacheable
;
632 CacheType
= CacheWriteCombining
;
636 CacheType
= CacheWriteThrough
;
640 CacheType
= CacheWriteProtected
;
644 CacheType
= CacheWriteBack
;
648 return EFI_UNSUPPORTED
;
651 // call MTRR libary function
653 Status
= MtrrSetMemoryAttribute (
659 return (EFI_STATUS
) Status
;
663 Initializes the valid bits mask and valid address mask for MTRRs.
665 This function initializes the valid bits mask and valid address mask for MTRRs.
674 UINT8 PhysicalAddressBits
;
676 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
678 if (RegEax
>= 0x80000008) {
679 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
681 PhysicalAddressBits
= (UINT8
) RegEax
;
683 mValidMtrrBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
684 mValidMtrrAddressMask
= mValidMtrrBitsMask
& 0xfffffffffffff000ULL
;
686 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
687 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
692 Gets GCD Mem Space type from MTRR Type.
694 This function gets GCD Mem Space type from MTRR Type.
696 @param MtrrAttributes MTRR memory type
698 @return GCD Mem Space type
702 GetMemorySpaceAttributeFromMtrrType (
703 IN UINT8 MtrrAttributes
706 switch (MtrrAttributes
) {
707 case MTRR_CACHE_UNCACHEABLE
:
708 return EFI_MEMORY_UC
;
709 case MTRR_CACHE_WRITE_COMBINING
:
710 return EFI_MEMORY_WC
;
711 case MTRR_CACHE_WRITE_THROUGH
:
712 return EFI_MEMORY_WT
;
713 case MTRR_CACHE_WRITE_PROTECTED
:
714 return EFI_MEMORY_WP
;
715 case MTRR_CACHE_WRITE_BACK
:
716 return EFI_MEMORY_WB
;
723 Searches memory descriptors covered by given memory range.
725 This function searches into the Gcd Memory Space for descriptors
726 (from StartIndex to EndIndex) that contains the memory range
727 specified by BaseAddress and Length.
729 @param MemorySpaceMap Gcd Memory Space Map as array.
730 @param NumberOfDescriptors Number of descriptors in map.
731 @param BaseAddress BaseAddress for the requested range.
732 @param Length Length for the requested range.
733 @param StartIndex Start index into the Gcd Memory Space Map.
734 @param EndIndex End index into the Gcd Memory Space Map.
736 @retval EFI_SUCCESS Search successfully.
737 @retval EFI_NOT_FOUND The requested descriptors does not exist.
741 SearchGcdMemorySpaces (
742 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
743 IN UINTN NumberOfDescriptors
,
744 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
746 OUT UINTN
*StartIndex
,
754 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
755 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
&&
756 BaseAddress
< MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
759 if (BaseAddress
+ Length
- 1 >= MemorySpaceMap
[Index
].BaseAddress
&&
760 BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
765 return EFI_NOT_FOUND
;
769 Sets the attributes for a specified range in Gcd Memory Space Map.
771 This function sets the attributes for a specified range in
772 Gcd Memory Space Map.
774 @param MemorySpaceMap Gcd Memory Space Map as array
775 @param NumberOfDescriptors Number of descriptors in map
776 @param BaseAddress BaseAddress for the range
777 @param Length Length for the range
778 @param Attributes Attributes to set
780 @retval EFI_SUCCESS Memory attributes set successfully
781 @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
785 SetGcdMemorySpaceAttributes (
786 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
787 IN UINTN NumberOfDescriptors
,
788 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
797 EFI_PHYSICAL_ADDRESS RegionStart
;
801 // Get all memory descriptors covered by the memory range
803 Status
= SearchGcdMemorySpaces (
811 if (EFI_ERROR (Status
)) {
816 // Go through all related descriptors and set attributes accordingly
818 for (Index
= StartIndex
; Index
<= EndIndex
; Index
++) {
819 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
823 // Calculate the start and end address of the overlapping range
825 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
) {
826 RegionStart
= BaseAddress
;
828 RegionStart
= MemorySpaceMap
[Index
].BaseAddress
;
830 if (BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
831 RegionLength
= BaseAddress
+ Length
- RegionStart
;
833 RegionLength
= MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
- RegionStart
;
836 // Set memory attributes according to MTRR attribute and the original attribute of descriptor
838 gDS
->SetMemorySpaceAttributes (
841 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) | (MemorySpaceMap
[Index
].Capabilities
& Attributes
)
850 Refreshes the GCD Memory Space attributes according to MTRRs.
852 This function refreshes the GCD Memory Space attributes according to MTRRs.
856 RefreshGcdMemoryAttributes (
864 EFI_PHYSICAL_ADDRESS BaseAddress
;
867 UINT64 CurrentAttributes
;
869 UINTN NumberOfDescriptors
;
870 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
871 UINT64 DefaultAttributes
;
872 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
873 MTRR_FIXED_SETTINGS MtrrFixedSettings
;
874 UINT32 FirmwareVariableMtrrCount
;
876 if (!IsMtrrSupported ()) {
880 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
881 ASSERT (FirmwareVariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
883 // mIsFlushingGCD = TRUE;
884 mIsFlushingGCD
= FALSE
;
885 MemorySpaceMap
= NULL
;
888 // Initialize the valid bits mask and valid address mask for MTRRs
890 InitializeMtrrMask ();
893 // Get the memory attribute of variable MTRRs
895 MtrrGetMemoryAttributeInVariableMtrr (
897 mValidMtrrAddressMask
,
902 // Get the memory space map from GCD
904 Status
= gDS
->GetMemorySpaceMap (
905 &NumberOfDescriptors
,
908 ASSERT_EFI_ERROR (Status
);
910 DefaultAttributes
= GetMemorySpaceAttributeFromMtrrType (mDefaultMemoryType
);
913 // Set default attributes to all spaces.
915 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
916 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
919 gDS
->SetMemorySpaceAttributes (
920 MemorySpaceMap
[Index
].BaseAddress
,
921 MemorySpaceMap
[Index
].Length
,
922 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) |
923 (MemorySpaceMap
[Index
].Capabilities
& DefaultAttributes
)
928 // Go for variable MTRRs with WB attribute
930 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
931 if (VariableMtrr
[Index
].Valid
&&
932 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) {
933 SetGcdMemorySpaceAttributes (
936 VariableMtrr
[Index
].BaseAddress
,
937 VariableMtrr
[Index
].Length
,
943 // Go for variable MTRRs with Non-WB attribute
945 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
946 if (VariableMtrr
[Index
].Valid
&&
947 VariableMtrr
[Index
].Type
!= MTRR_CACHE_WRITE_BACK
) {
948 Attributes
= GetMemorySpaceAttributeFromMtrrType ((UINT8
) VariableMtrr
[Index
].Type
);
949 SetGcdMemorySpaceAttributes (
952 VariableMtrr
[Index
].BaseAddress
,
953 VariableMtrr
[Index
].Length
,
960 // Go for fixed MTRRs
965 MtrrGetFixedMtrr (&MtrrFixedSettings
);
966 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
967 RegValue
= MtrrFixedSettings
.Mtrr
[Index
];
969 // Check for continuous fixed MTRR sections
971 for (SubIndex
= 0; SubIndex
< 8; SubIndex
++) {
972 MtrrType
= (UINT8
) RShiftU64 (RegValue
, SubIndex
* 8);
973 CurrentAttributes
= GetMemorySpaceAttributeFromMtrrType (MtrrType
);
976 // A new MTRR attribute begins
978 Attributes
= CurrentAttributes
;
981 // If fixed MTRR attribute changed, then set memory attribute for previous atrribute
983 if (CurrentAttributes
!= Attributes
) {
984 SetGcdMemorySpaceAttributes (
991 BaseAddress
= mFixedMtrrTable
[Index
].BaseAddress
+ mFixedMtrrTable
[Index
].Length
* SubIndex
;
993 Attributes
= CurrentAttributes
;
996 Length
+= mFixedMtrrTable
[Index
].Length
;
1000 // Handle the last fixed MTRR region
1002 SetGcdMemorySpaceAttributes (
1004 NumberOfDescriptors
,
1011 // Free memory space map allocated by GCD service GetMemorySpaceMap ()
1013 if (MemorySpaceMap
!= NULL
) {
1014 FreePool (MemorySpaceMap
);
1017 mIsFlushingGCD
= FALSE
;
1021 Set Interrupt Descriptor Table Handler Address.
1023 @param Index The Index of the interrupt descriptor table handle.
1024 @param Handler Handler address.
1028 SetInterruptDescriptorTableHandlerAddress (
1030 IN VOID
*Handler OPTIONAL
1035 if (Handler
!= NULL
) {
1036 UintnHandler
= (UINTN
) Handler
;
1038 UintnHandler
= ((UINTN
) AsmIdtVector00
) + (8 * Index
);
1041 gIdtTable
[Index
].Bits
.OffsetLow
= (UINT16
)UintnHandler
;
1042 gIdtTable
[Index
].Bits
.Reserved_0
= 0;
1043 gIdtTable
[Index
].Bits
.GateType
= IA32_IDT_GATE_TYPE_INTERRUPT_32
;
1044 gIdtTable
[Index
].Bits
.OffsetHigh
= (UINT16
)(UintnHandler
>> 16);
1045 #if defined (MDE_CPU_X64)
1046 gIdtTable
[Index
].Bits
.OffsetUpper
= (UINT32
)(UintnHandler
>> 32);
1047 gIdtTable
[Index
].Bits
.Reserved_1
= 0;
1053 Initialize Interrupt Descriptor Table for interrupt handling.
1057 InitInterruptDescriptorTable (
1062 IA32_DESCRIPTOR OldIdtPtr
;
1063 IA32_IDT_GATE_DESCRIPTOR
*OldIdt
;
1065 VOID
*IdtPtrAlignmentBuffer
;
1066 IA32_DESCRIPTOR
*IdtPtr
;
1071 SetMem (ExternalVectorTable
, sizeof(ExternalVectorTable
), 0);
1074 // Get original IDT address and size.
1076 AsmReadIdtr ((IA32_DESCRIPTOR
*) &OldIdtPtr
);
1078 if ((OldIdtPtr
.Base
!= 0) && ((OldIdtPtr
.Limit
& 7) == 7)) {
1079 OldIdt
= (IA32_IDT_GATE_DESCRIPTOR
*) OldIdtPtr
.Base
;
1080 OldIdtSize
= (OldIdtPtr
.Limit
+ 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR
);
1089 CurrentCs
= AsmReadCs();
1090 for (Index
= 0; Index
< INTERRUPT_VECTOR_NUMBER
; Index
++) {
1092 // If the old IDT had a handler for this interrupt, then
1095 if (Index
< OldIdtSize
) {
1098 OldIdt
[Index
].Bits
.OffsetLow
+
1099 (OldIdt
[Index
].Bits
.OffsetHigh
<< 16)
1100 #if defined (MDE_CPU_X64)
1101 + (((UINTN
) OldIdt
[Index
].Bits
.OffsetUpper
) << 32)
1108 gIdtTable
[Index
].Bits
.Selector
= CurrentCs
;
1109 gIdtTable
[Index
].Bits
.Reserved_0
= 0;
1110 gIdtTable
[Index
].Bits
.GateType
= IA32_IDT_GATE_TYPE_INTERRUPT_32
;
1111 SetInterruptDescriptorTableHandlerAddress (Index
, IntHandler
);
1117 IdtPtrAlignmentBuffer
= AllocatePool (sizeof (*IdtPtr
) + 16);
1118 IdtPtr
= ALIGN_POINTER (IdtPtrAlignmentBuffer
, 16);
1119 IdtPtr
->Base
= (UINT32
)(((UINTN
)(VOID
*) gIdtTable
) & (BASE_4GB
-1));
1120 IdtPtr
->Limit
= (UINT16
) (sizeof (gIdtTable
) - 1);
1122 AsmWriteIdtr (IdtPtr
);
1124 FreePool (IdtPtrAlignmentBuffer
);
1127 // Initialize Exception Handlers
1129 for (Index
= 0; Index
< 32; Index
++) {
1130 Status
= CpuRegisterInterruptHandler (&gCpu
, Index
, CommonExceptionHandler
);
1131 ASSERT_EFI_ERROR (Status
);
1135 // Set the pointer to the array of C based exception handling routines.
1137 InitializeExternalVectorTablePtr (ExternalVectorTable
);
1143 Initialize the state information for the CPU Architectural Protocol.
1145 @param ImageHandle Image handle this driver.
1146 @param SystemTable Pointer to the System Table.
1148 @retval EFI_SUCCESS Thread can be successfully created
1149 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
1150 @retval EFI_DEVICE_ERROR Cannot create the thread
1156 IN EFI_HANDLE ImageHandle
,
1157 IN EFI_SYSTEM_TABLE
*SystemTable
1163 // Make sure interrupts are disabled
1165 DisableInterrupts ();
1170 InitGlobalDescriptorTable ();
1173 // Setup IDT pointer, IDT and interrupt entry points
1175 InitInterruptDescriptorTable ();
1178 // Install CPU Architectural Protocol
1180 Status
= gBS
->InstallMultipleProtocolInterfaces (
1182 &gEfiCpuArchProtocolGuid
, &gCpu
,
1185 ASSERT_EFI_ERROR (Status
);
1188 // Refresh GCD memory space map according to MTRR value.
1190 RefreshGcdMemoryAttributes ();