4 Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
21 BOOLEAN InterruptState
= FALSE
;
22 EFI_HANDLE mCpuHandle
= NULL
;
23 BOOLEAN mIsFlushingGCD
;
24 UINT64 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
25 UINT64 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
27 FIXED_MTRR mFixedMtrrTable
[] = {
29 MTRR_LIB_IA32_MTRR_FIX64K_00000
,
34 MTRR_LIB_IA32_MTRR_FIX16K_80000
,
39 MTRR_LIB_IA32_MTRR_FIX16K_A0000
,
44 MTRR_LIB_IA32_MTRR_FIX4K_C0000
,
49 MTRR_LIB_IA32_MTRR_FIX4K_C8000
,
54 MTRR_LIB_IA32_MTRR_FIX4K_D0000
,
59 MTRR_LIB_IA32_MTRR_FIX4K_D8000
,
64 MTRR_LIB_IA32_MTRR_FIX4K_E0000
,
69 MTRR_LIB_IA32_MTRR_FIX4K_E8000
,
74 MTRR_LIB_IA32_MTRR_FIX4K_F0000
,
79 MTRR_LIB_IA32_MTRR_FIX4K_F8000
,
86 EFI_CPU_ARCH_PROTOCOL gCpu
= {
92 CpuRegisterInterruptHandler
,
94 CpuSetMemoryAttributes
,
96 4 // DmaBufferAlignment
100 // CPU Arch Protocol Functions
104 Flush CPU data cache. If the instruction cache is fully coherent
105 with all DMA operations then function can just return EFI_SUCCESS.
107 @param This Protocol instance structure
108 @param Start Physical address to start flushing from.
109 @param Length Number of bytes to flush. Round up to chipset
111 @param FlushType Specifies the type of flush operation to perform.
113 @retval EFI_SUCCESS If cache was flushed
114 @retval EFI_UNSUPPORTED If flush type is not supported.
115 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
120 CpuFlushCpuDataCache (
121 IN EFI_CPU_ARCH_PROTOCOL
*This
,
122 IN EFI_PHYSICAL_ADDRESS Start
,
124 IN EFI_CPU_FLUSH_TYPE FlushType
127 if (FlushType
== EfiCpuFlushTypeWriteBackInvalidate
) {
130 } else if (FlushType
== EfiCpuFlushTypeInvalidate
) {
134 return EFI_UNSUPPORTED
;
140 Enables CPU interrupts.
142 @param This Protocol instance structure
144 @retval EFI_SUCCESS If interrupts were enabled in the CPU
145 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
151 IN EFI_CPU_ARCH_PROTOCOL
*This
156 InterruptState
= TRUE
;
162 Disables CPU interrupts.
164 @param This Protocol instance structure
166 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
167 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
172 CpuDisableInterrupt (
173 IN EFI_CPU_ARCH_PROTOCOL
*This
176 DisableInterrupts ();
178 InterruptState
= FALSE
;
184 Return the state of interrupts.
186 @param This Protocol instance structure
187 @param State Pointer to the CPU's current interrupt state
189 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
190 @retval EFI_INVALID_PARAMETER State is NULL.
195 CpuGetInterruptState (
196 IN EFI_CPU_ARCH_PROTOCOL
*This
,
201 return EFI_INVALID_PARAMETER
;
204 *State
= InterruptState
;
210 Generates an INIT to the CPU.
212 @param This Protocol instance structure
213 @param InitType Type of CPU INIT to perform
215 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
217 @retval EFI_DEVICE_ERROR If CPU INIT failed.
218 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
224 IN EFI_CPU_ARCH_PROTOCOL
*This
,
225 IN EFI_CPU_INIT_TYPE InitType
228 return EFI_UNSUPPORTED
;
233 Registers a function to be called from the CPU interrupt handler.
235 @param This Protocol instance structure
236 @param InterruptType Defines which interrupt to hook. IA-32
237 valid range is 0x00 through 0xFF
238 @param InterruptHandler A pointer to a function of type
239 EFI_CPU_INTERRUPT_HANDLER that is called
240 when a processor interrupt occurs. A null
241 pointer is an error condition.
243 @retval EFI_SUCCESS If handler installed or uninstalled.
244 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
245 for InterruptType was previously installed.
246 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
247 InterruptType was not previously installed.
248 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
254 CpuRegisterInterruptHandler (
255 IN EFI_CPU_ARCH_PROTOCOL
*This
,
256 IN EFI_EXCEPTION_TYPE InterruptType
,
257 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
260 return RegisterCpuInterruptHandler (InterruptType
, InterruptHandler
);
265 Returns a timer value from one of the CPU's internal timers. There is no
266 inherent time interval between ticks but is a function of the CPU frequency.
268 @param This - Protocol instance structure.
269 @param TimerIndex - Specifies which CPU timer is requested.
270 @param TimerValue - Pointer to the returned timer value.
271 @param TimerPeriod - A pointer to the amount of time that passes
272 in femtoseconds (10-15) for each increment
273 of TimerValue. If TimerValue does not
274 increment at a predictable rate, then 0 is
275 returned. The amount of time that has
276 passed between two calls to GetTimerValue()
277 can be calculated with the formula
278 (TimerValue2 - TimerValue1) * TimerPeriod.
279 This parameter is optional and may be NULL.
281 @retval EFI_SUCCESS - If the CPU timer count was returned.
282 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
283 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
284 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
290 IN EFI_CPU_ARCH_PROTOCOL
*This
,
291 IN UINT32 TimerIndex
,
292 OUT UINT64
*TimerValue
,
293 OUT UINT64
*TimerPeriod OPTIONAL
296 if (TimerValue
== NULL
) {
297 return EFI_INVALID_PARAMETER
;
300 if (TimerIndex
!= 0) {
301 return EFI_INVALID_PARAMETER
;
304 *TimerValue
= AsmReadTsc ();
306 if (TimerPeriod
!= NULL
) {
308 // BugBug: Hard coded. Don't know how to do this generically
310 *TimerPeriod
= 1000000000;
318 Implementation of SetMemoryAttributes() service of CPU Architecture Protocol.
320 This function modifies the attributes for the memory region specified by BaseAddress and
321 Length from their current attributes to the attributes specified by Attributes.
323 @param This The EFI_CPU_ARCH_PROTOCOL instance.
324 @param BaseAddress The physical address that is the start address of a memory region.
325 @param Length The size in bytes of the memory region.
326 @param Attributes The bit mask of attributes to set for the memory region.
328 @retval EFI_SUCCESS The attributes were set for the memory region.
329 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
330 BaseAddress and Length cannot be modified.
331 @retval EFI_INVALID_PARAMETER Length is zero.
332 Attributes specified an illegal combination of attributes that
333 cannot be set together.
334 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
335 the memory resource range.
336 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
337 resource range specified by BaseAddress and Length.
338 The bit mask of attributes is not support for the memory resource
339 range specified by BaseAddress and Length.
344 CpuSetMemoryAttributes (
345 IN EFI_CPU_ARCH_PROTOCOL
*This
,
346 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
351 RETURN_STATUS Status
;
352 MTRR_MEMORY_CACHE_TYPE CacheType
;
354 EFI_MP_SERVICES_PROTOCOL
*MpService
;
355 MTRR_SETTINGS MtrrSettings
;
357 if (!IsMtrrSupported ()) {
358 return EFI_UNSUPPORTED
;
362 // If this function is called because GCD SetMemorySpaceAttributes () is called
363 // by RefreshGcdMemoryAttributes (), then we are just synchronzing GCD memory
364 // map with MTRR values. So there is no need to modify MTRRs, just return immediately
365 // to avoid unnecessary computing.
367 if (mIsFlushingGCD
) {
368 DEBUG((EFI_D_INFO
, " Flushing GCD\n"));
372 switch (Attributes
) {
374 CacheType
= CacheUncacheable
;
378 CacheType
= CacheWriteCombining
;
382 CacheType
= CacheWriteThrough
;
386 CacheType
= CacheWriteProtected
;
390 CacheType
= CacheWriteBack
;
396 case EFI_MEMORY_RUNTIME
:
397 return EFI_UNSUPPORTED
;
400 return EFI_INVALID_PARAMETER
;
403 // call MTRR libary function
405 Status
= MtrrSetMemoryAttribute (
411 if (!RETURN_ERROR (Status
)) {
412 MpStatus
= gBS
->LocateProtocol (
413 &gEfiMpServiceProtocolGuid
,
418 // Synchronize the update with all APs
420 if (!EFI_ERROR (MpStatus
)) {
421 MtrrGetAllMtrrs (&MtrrSettings
);
422 MpStatus
= MpService
->StartupAllAPs (
424 SetMtrrsFromBuffer
, // Procedure
425 TRUE
, // SingleThread
427 0, // TimeoutInMicrosecsond
428 &MtrrSettings
, // ProcedureArgument
429 NULL
// FailedCpuList
431 ASSERT (MpStatus
== EFI_SUCCESS
|| MpStatus
== EFI_NOT_STARTED
);
434 return (EFI_STATUS
) Status
;
438 Initializes the valid bits mask and valid address mask for MTRRs.
440 This function initializes the valid bits mask and valid address mask for MTRRs.
449 UINT8 PhysicalAddressBits
;
451 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
453 if (RegEax
>= 0x80000008) {
454 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
456 PhysicalAddressBits
= (UINT8
) RegEax
;
458 mValidMtrrBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
459 mValidMtrrAddressMask
= mValidMtrrBitsMask
& 0xfffffffffffff000ULL
;
461 mValidMtrrBitsMask
= MTRR_LIB_MSR_VALID_MASK
;
462 mValidMtrrAddressMask
= MTRR_LIB_CACHE_VALID_ADDRESS
;
467 Gets GCD Mem Space type from MTRR Type.
469 This function gets GCD Mem Space type from MTRR Type.
471 @param MtrrAttributes MTRR memory type
473 @return GCD Mem Space type
477 GetMemorySpaceAttributeFromMtrrType (
478 IN UINT8 MtrrAttributes
481 switch (MtrrAttributes
) {
482 case MTRR_CACHE_UNCACHEABLE
:
483 return EFI_MEMORY_UC
;
484 case MTRR_CACHE_WRITE_COMBINING
:
485 return EFI_MEMORY_WC
;
486 case MTRR_CACHE_WRITE_THROUGH
:
487 return EFI_MEMORY_WT
;
488 case MTRR_CACHE_WRITE_PROTECTED
:
489 return EFI_MEMORY_WP
;
490 case MTRR_CACHE_WRITE_BACK
:
491 return EFI_MEMORY_WB
;
498 Searches memory descriptors covered by given memory range.
500 This function searches into the Gcd Memory Space for descriptors
501 (from StartIndex to EndIndex) that contains the memory range
502 specified by BaseAddress and Length.
504 @param MemorySpaceMap Gcd Memory Space Map as array.
505 @param NumberOfDescriptors Number of descriptors in map.
506 @param BaseAddress BaseAddress for the requested range.
507 @param Length Length for the requested range.
508 @param StartIndex Start index into the Gcd Memory Space Map.
509 @param EndIndex End index into the Gcd Memory Space Map.
511 @retval EFI_SUCCESS Search successfully.
512 @retval EFI_NOT_FOUND The requested descriptors does not exist.
516 SearchGcdMemorySpaces (
517 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
518 IN UINTN NumberOfDescriptors
,
519 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
521 OUT UINTN
*StartIndex
,
529 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
530 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
&&
531 BaseAddress
< MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
534 if (BaseAddress
+ Length
- 1 >= MemorySpaceMap
[Index
].BaseAddress
&&
535 BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
540 return EFI_NOT_FOUND
;
544 Sets the attributes for a specified range in Gcd Memory Space Map.
546 This function sets the attributes for a specified range in
547 Gcd Memory Space Map.
549 @param MemorySpaceMap Gcd Memory Space Map as array
550 @param NumberOfDescriptors Number of descriptors in map
551 @param BaseAddress BaseAddress for the range
552 @param Length Length for the range
553 @param Attributes Attributes to set
555 @retval EFI_SUCCESS Memory attributes set successfully
556 @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
560 SetGcdMemorySpaceAttributes (
561 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
562 IN UINTN NumberOfDescriptors
,
563 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
572 EFI_PHYSICAL_ADDRESS RegionStart
;
576 // Get all memory descriptors covered by the memory range
578 Status
= SearchGcdMemorySpaces (
586 if (EFI_ERROR (Status
)) {
591 // Go through all related descriptors and set attributes accordingly
593 for (Index
= StartIndex
; Index
<= EndIndex
; Index
++) {
594 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
598 // Calculate the start and end address of the overlapping range
600 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
) {
601 RegionStart
= BaseAddress
;
603 RegionStart
= MemorySpaceMap
[Index
].BaseAddress
;
605 if (BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
606 RegionLength
= BaseAddress
+ Length
- RegionStart
;
608 RegionLength
= MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
- RegionStart
;
611 // Set memory attributes according to MTRR attribute and the original attribute of descriptor
613 gDS
->SetMemorySpaceAttributes (
616 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) | (MemorySpaceMap
[Index
].Capabilities
& Attributes
)
625 Refreshes the GCD Memory Space attributes according to MTRRs.
627 This function refreshes the GCD Memory Space attributes according to MTRRs.
631 RefreshGcdMemoryAttributes (
639 EFI_PHYSICAL_ADDRESS BaseAddress
;
642 UINT64 CurrentAttributes
;
644 UINTN NumberOfDescriptors
;
645 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
646 UINT64 DefaultAttributes
;
647 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
648 MTRR_FIXED_SETTINGS MtrrFixedSettings
;
649 UINT32 FirmwareVariableMtrrCount
;
650 UINT8 DefaultMemoryType
;
652 if (!IsMtrrSupported ()) {
656 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
657 ASSERT (FirmwareVariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
659 mIsFlushingGCD
= TRUE
;
660 MemorySpaceMap
= NULL
;
663 // Initialize the valid bits mask and valid address mask for MTRRs
665 InitializeMtrrMask ();
668 // Get the memory attribute of variable MTRRs
670 MtrrGetMemoryAttributeInVariableMtrr (
672 mValidMtrrAddressMask
,
677 // Get the memory space map from GCD
679 Status
= gDS
->GetMemorySpaceMap (
680 &NumberOfDescriptors
,
683 ASSERT_EFI_ERROR (Status
);
685 DefaultMemoryType
= (UINT8
) MtrrGetDefaultMemoryType ();
686 DefaultAttributes
= GetMemorySpaceAttributeFromMtrrType (DefaultMemoryType
);
689 // Set default attributes to all spaces.
691 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
692 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
695 gDS
->SetMemorySpaceAttributes (
696 MemorySpaceMap
[Index
].BaseAddress
,
697 MemorySpaceMap
[Index
].Length
,
698 (MemorySpaceMap
[Index
].Attributes
& ~EFI_MEMORY_CACHETYPE_MASK
) |
699 (MemorySpaceMap
[Index
].Capabilities
& DefaultAttributes
)
704 // Go for variable MTRRs with WB attribute
706 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
707 if (VariableMtrr
[Index
].Valid
&&
708 VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
) {
709 SetGcdMemorySpaceAttributes (
712 VariableMtrr
[Index
].BaseAddress
,
713 VariableMtrr
[Index
].Length
,
720 // Go for variable MTRRs with the attribute except for WB and UC attributes
722 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
723 if (VariableMtrr
[Index
].Valid
&&
724 VariableMtrr
[Index
].Type
!= MTRR_CACHE_WRITE_BACK
&&
725 VariableMtrr
[Index
].Type
!= MTRR_CACHE_UNCACHEABLE
) {
726 Attributes
= GetMemorySpaceAttributeFromMtrrType ((UINT8
) VariableMtrr
[Index
].Type
);
727 SetGcdMemorySpaceAttributes (
730 VariableMtrr
[Index
].BaseAddress
,
731 VariableMtrr
[Index
].Length
,
738 // Go for variable MTRRs with UC attribute
740 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
741 if (VariableMtrr
[Index
].Valid
&&
742 VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
) {
743 SetGcdMemorySpaceAttributes (
746 VariableMtrr
[Index
].BaseAddress
,
747 VariableMtrr
[Index
].Length
,
754 // Go for fixed MTRRs
759 MtrrGetFixedMtrr (&MtrrFixedSettings
);
760 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
761 RegValue
= MtrrFixedSettings
.Mtrr
[Index
];
763 // Check for continuous fixed MTRR sections
765 for (SubIndex
= 0; SubIndex
< 8; SubIndex
++) {
766 MtrrType
= (UINT8
) RShiftU64 (RegValue
, SubIndex
* 8);
767 CurrentAttributes
= GetMemorySpaceAttributeFromMtrrType (MtrrType
);
770 // A new MTRR attribute begins
772 Attributes
= CurrentAttributes
;
775 // If fixed MTRR attribute changed, then set memory attribute for previous atrribute
777 if (CurrentAttributes
!= Attributes
) {
778 SetGcdMemorySpaceAttributes (
785 BaseAddress
= mFixedMtrrTable
[Index
].BaseAddress
+ mFixedMtrrTable
[Index
].Length
* SubIndex
;
787 Attributes
= CurrentAttributes
;
790 Length
+= mFixedMtrrTable
[Index
].Length
;
794 // Handle the last fixed MTRR region
796 SetGcdMemorySpaceAttributes (
805 // Free memory space map allocated by GCD service GetMemorySpaceMap ()
807 if (MemorySpaceMap
!= NULL
) {
808 FreePool (MemorySpaceMap
);
811 mIsFlushingGCD
= FALSE
;
815 Initialize Interrupt Descriptor Table for interrupt handling.
819 InitInterruptDescriptorTable (
824 EFI_VECTOR_HANDOFF_INFO
*VectorInfoList
;
825 EFI_VECTOR_HANDOFF_INFO
*VectorInfo
;
828 Status
= EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid
, (VOID
**) &VectorInfoList
);
829 if (Status
== EFI_SUCCESS
&& VectorInfoList
!= NULL
) {
830 VectorInfo
= VectorInfoList
;
832 Status
= InitializeCpuInterruptHandlers (VectorInfo
);
833 ASSERT_EFI_ERROR (Status
);
838 Callback function for idle events.
840 @param Event Event whose notification function is being invoked.
841 @param Context The pointer to the notification function's context,
842 which is implementation-dependent.
847 IdleLoopEventCallback (
857 Initialize the state information for the CPU Architectural Protocol.
859 @param ImageHandle Image handle this driver.
860 @param SystemTable Pointer to the System Table.
862 @retval EFI_SUCCESS Thread can be successfully created
863 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
864 @retval EFI_DEVICE_ERROR Cannot create the thread
870 IN EFI_HANDLE ImageHandle
,
871 IN EFI_SYSTEM_TABLE
*SystemTable
875 EFI_EVENT IdleLoopEvent
;
877 InitializeFloatingPointUnits ();
880 // Make sure interrupts are disabled
882 DisableInterrupts ();
887 InitGlobalDescriptorTable ();
890 // Setup IDT pointer, IDT and interrupt entry points
892 InitInterruptDescriptorTable ();
895 // Enable the local APIC for Virtual Wire Mode.
897 ProgramVirtualWireMode ();
900 // Install CPU Architectural Protocol
902 Status
= gBS
->InstallMultipleProtocolInterfaces (
904 &gEfiCpuArchProtocolGuid
, &gCpu
,
907 ASSERT_EFI_ERROR (Status
);
910 // Refresh GCD memory space map according to MTRR value.
912 RefreshGcdMemoryAttributes ();
915 // Setup a callback for idle events
917 Status
= gBS
->CreateEventEx (
920 IdleLoopEventCallback
,
925 ASSERT_EFI_ERROR (Status
);
927 InitializeMpSupport ();