2 CPU DXE Module to produce CPU ARCH Protocol.
4 Copyright (c) 2008 - 2022, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
11 #include "CpuPageTable.h"
13 #define CPU_INTERRUPT_NUM 256
18 BOOLEAN InterruptState
= FALSE
;
19 EFI_HANDLE mCpuHandle
= NULL
;
20 BOOLEAN mIsFlushingGCD
;
21 BOOLEAN mIsAllocatingPageTable
= FALSE
;
22 UINT64 mValidMtrrAddressMask
;
23 UINT64 mValidMtrrBitsMask
;
24 UINT64 mTimerPeriod
= 0;
26 FIXED_MTRR mFixedMtrrTable
[] = {
28 MSR_IA32_MTRR_FIX64K_00000
,
33 MSR_IA32_MTRR_FIX16K_80000
,
38 MSR_IA32_MTRR_FIX16K_A0000
,
43 MSR_IA32_MTRR_FIX4K_C0000
,
48 MSR_IA32_MTRR_FIX4K_C8000
,
53 MSR_IA32_MTRR_FIX4K_D0000
,
58 MSR_IA32_MTRR_FIX4K_D8000
,
63 MSR_IA32_MTRR_FIX4K_E0000
,
68 MSR_IA32_MTRR_FIX4K_E8000
,
73 MSR_IA32_MTRR_FIX4K_F0000
,
78 MSR_IA32_MTRR_FIX4K_F8000
,
84 EFI_CPU_ARCH_PROTOCOL gCpu
= {
90 CpuRegisterInterruptHandler
,
92 CpuSetMemoryAttributes
,
94 4 // DmaBufferAlignment
98 // CPU Arch Protocol Functions
102 Flush CPU data cache. If the instruction cache is fully coherent
103 with all DMA operations then function can just return EFI_SUCCESS.
105 @param This Protocol instance structure
106 @param Start Physical address to start flushing from.
107 @param Length Number of bytes to flush. Round up to chipset
109 @param FlushType Specifies the type of flush operation to perform.
111 @retval EFI_SUCCESS If cache was flushed
112 @retval EFI_UNSUPPORTED If flush type is not supported.
113 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
118 CpuFlushCpuDataCache (
119 IN EFI_CPU_ARCH_PROTOCOL
*This
,
120 IN EFI_PHYSICAL_ADDRESS Start
,
122 IN EFI_CPU_FLUSH_TYPE FlushType
125 if (FlushType
== EfiCpuFlushTypeWriteBackInvalidate
) {
128 } else if (FlushType
== EfiCpuFlushTypeInvalidate
) {
132 return EFI_UNSUPPORTED
;
137 Enables CPU interrupts.
139 @param This Protocol instance structure
141 @retval EFI_SUCCESS If interrupts were enabled in the CPU
142 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
148 IN EFI_CPU_ARCH_PROTOCOL
*This
153 InterruptState
= TRUE
;
158 Disables CPU interrupts.
160 @param This Protocol instance structure
162 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
163 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
168 CpuDisableInterrupt (
169 IN EFI_CPU_ARCH_PROTOCOL
*This
172 DisableInterrupts ();
174 InterruptState
= FALSE
;
179 Return the state of interrupts.
181 @param This Protocol instance structure
182 @param State Pointer to the CPU's current interrupt state
184 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
185 @retval EFI_INVALID_PARAMETER State is NULL.
190 CpuGetInterruptState (
191 IN EFI_CPU_ARCH_PROTOCOL
*This
,
196 return EFI_INVALID_PARAMETER
;
199 *State
= InterruptState
;
204 Generates an INIT to the CPU.
206 @param This Protocol instance structure
207 @param InitType Type of CPU INIT to perform
209 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
211 @retval EFI_DEVICE_ERROR If CPU INIT failed.
212 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
218 IN EFI_CPU_ARCH_PROTOCOL
*This
,
219 IN EFI_CPU_INIT_TYPE InitType
222 return EFI_UNSUPPORTED
;
226 Registers a function to be called from the CPU interrupt handler.
228 @param This Protocol instance structure
229 @param InterruptType Defines which interrupt to hook. IA-32
230 valid range is 0x00 through 0xFF
231 @param InterruptHandler A pointer to a function of type
232 EFI_CPU_INTERRUPT_HANDLER that is called
233 when a processor interrupt occurs. A null
234 pointer is an error condition.
236 @retval EFI_SUCCESS If handler installed or uninstalled.
237 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
238 for InterruptType was previously installed.
239 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
240 InterruptType was not previously installed.
241 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
247 CpuRegisterInterruptHandler (
248 IN EFI_CPU_ARCH_PROTOCOL
*This
,
249 IN EFI_EXCEPTION_TYPE InterruptType
,
250 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
253 return RegisterCpuInterruptHandler (InterruptType
, InterruptHandler
);
257 Returns a timer value from one of the CPU's internal timers. There is no
258 inherent time interval between ticks but is a function of the CPU frequency.
260 @param This - Protocol instance structure.
261 @param TimerIndex - Specifies which CPU timer is requested.
262 @param TimerValue - Pointer to the returned timer value.
263 @param TimerPeriod - A pointer to the amount of time that passes
264 in femtoseconds (10-15) for each increment
265 of TimerValue. If TimerValue does not
266 increment at a predictable rate, then 0 is
267 returned. The amount of time that has
268 passed between two calls to GetTimerValue()
269 can be calculated with the formula
270 (TimerValue2 - TimerValue1) * TimerPeriod.
271 This parameter is optional and may be NULL.
273 @retval EFI_SUCCESS - If the CPU timer count was returned.
274 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
275 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
276 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
282 IN EFI_CPU_ARCH_PROTOCOL
*This
,
283 IN UINT32 TimerIndex
,
284 OUT UINT64
*TimerValue
,
285 OUT UINT64
*TimerPeriod OPTIONAL
291 if (TimerValue
== NULL
) {
292 return EFI_INVALID_PARAMETER
;
295 if (TimerIndex
!= 0) {
296 return EFI_INVALID_PARAMETER
;
299 *TimerValue
= AsmReadTsc ();
301 if (TimerPeriod
!= NULL
) {
302 if (mTimerPeriod
== 0) {
304 // Read time stamp counter before and after delay of 100 microseconds
306 BeginValue
= AsmReadTsc ();
307 MicroSecondDelay (100);
308 EndValue
= AsmReadTsc ();
310 // Calculate the actual frequency
312 mTimerPeriod
= DivU64x64Remainder (
317 EndValue
- BeginValue
,
322 *TimerPeriod
= mTimerPeriod
;
329 A minimal wrapper function that allows MtrrSetAllMtrrs() to be passed to
330 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs() as Procedure.
332 @param[in] Buffer Pointer to an MTRR_SETTINGS object, to be passed to
341 MtrrSetAllMtrrs (Buffer
);
345 Implementation of SetMemoryAttributes() service of CPU Architecture Protocol.
347 This function modifies the attributes for the memory region specified by BaseAddress and
348 Length from their current attributes to the attributes specified by Attributes.
350 @param This The EFI_CPU_ARCH_PROTOCOL instance.
351 @param BaseAddress The physical address that is the start address of a memory region.
352 @param Length The size in bytes of the memory region.
353 @param Attributes The bit mask of attributes to set for the memory region.
355 @retval EFI_SUCCESS The attributes were set for the memory region.
356 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
357 BaseAddress and Length cannot be modified.
358 @retval EFI_INVALID_PARAMETER Length is zero.
359 Attributes specified an illegal combination of attributes that
360 cannot be set together.
361 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
362 the memory resource range.
363 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
364 resource range specified by BaseAddress and Length.
365 The bit mask of attributes is not support for the memory resource
366 range specified by BaseAddress and Length.
371 CpuSetMemoryAttributes (
372 IN EFI_CPU_ARCH_PROTOCOL
*This
,
373 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
378 RETURN_STATUS Status
;
379 MTRR_MEMORY_CACHE_TYPE CacheType
;
381 EFI_MP_SERVICES_PROTOCOL
*MpService
;
382 MTRR_SETTINGS MtrrSettings
;
383 UINT64 CacheAttributes
;
384 UINT64 MemoryAttributes
;
385 MTRR_MEMORY_CACHE_TYPE CurrentCacheType
;
388 // If this function is called because GCD SetMemorySpaceAttributes () is called
389 // by RefreshGcdMemoryAttributes (), then we are just synchronizing GCD memory
390 // map with MTRR values. So there is no need to modify MTRRs, just return immediately
391 // to avoid unnecessary computing.
393 if (mIsFlushingGCD
) {
394 DEBUG ((DEBUG_VERBOSE
, " Flushing GCD\n"));
399 // During memory attributes updating, new pages may be allocated to setup
400 // smaller granularity of page table. Page allocation action might then cause
401 // another calling of CpuSetMemoryAttributes() recursively, due to memory
402 // protection policy configured (such as PcdDxeNxMemoryProtectionPolicy).
403 // Since this driver will always protect memory used as page table by itself,
404 // there's no need to apply protection policy requested from memory service.
405 // So it's safe to just return EFI_SUCCESS if this time of calling is caused
406 // by page table memory allocation.
408 if (mIsAllocatingPageTable
) {
409 DEBUG ((DEBUG_VERBOSE
, " Allocating page table memory\n"));
413 CacheAttributes
= Attributes
& EFI_CACHE_ATTRIBUTE_MASK
;
414 MemoryAttributes
= Attributes
& EFI_MEMORY_ATTRIBUTE_MASK
;
416 if (Attributes
!= (CacheAttributes
| MemoryAttributes
)) {
417 return EFI_INVALID_PARAMETER
;
420 if (CacheAttributes
!= 0) {
421 if (!IsMtrrSupported ()) {
422 return EFI_UNSUPPORTED
;
425 switch (CacheAttributes
) {
427 CacheType
= CacheUncacheable
;
431 CacheType
= CacheWriteCombining
;
435 CacheType
= CacheWriteThrough
;
439 CacheType
= CacheWriteProtected
;
443 CacheType
= CacheWriteBack
;
447 return EFI_INVALID_PARAMETER
;
450 CurrentCacheType
= MtrrGetMemoryAttribute (BaseAddress
);
451 if (CurrentCacheType
!= CacheType
) {
453 // call MTRR library function
455 Status
= MtrrSetMemoryAttribute (
461 if (!RETURN_ERROR (Status
)) {
462 MpStatus
= gBS
->LocateProtocol (
463 &gEfiMpServiceProtocolGuid
,
468 // Synchronize the update with all APs
470 if (!EFI_ERROR (MpStatus
)) {
471 MtrrGetAllMtrrs (&MtrrSettings
);
472 MpStatus
= MpService
->StartupAllAPs (
474 SetMtrrsFromBuffer
, // Procedure
475 FALSE
, // SingleThread
477 0, // TimeoutInMicrosecsond
478 &MtrrSettings
, // ProcedureArgument
479 NULL
// FailedCpuList
481 ASSERT (MpStatus
== EFI_SUCCESS
|| MpStatus
== EFI_NOT_STARTED
);
485 if (EFI_ERROR (Status
)) {
492 // Set memory attribute by page table
494 return AssignMemoryPageAttributes (NULL
, BaseAddress
, Length
, MemoryAttributes
, NULL
);
498 Initializes the valid bits mask and valid address mask for MTRRs.
500 This function initializes the valid bits mask and valid address mask for MTRRs.
509 UINT8 PhysicalAddressBits
;
511 AsmCpuid (0x80000000, &RegEax
, NULL
, NULL
, NULL
);
513 if (RegEax
>= 0x80000008) {
514 AsmCpuid (0x80000008, &RegEax
, NULL
, NULL
, NULL
);
516 PhysicalAddressBits
= (UINT8
)RegEax
;
518 PhysicalAddressBits
= 36;
521 mValidMtrrBitsMask
= LShiftU64 (1, PhysicalAddressBits
) - 1;
522 mValidMtrrAddressMask
= mValidMtrrBitsMask
& 0xfffffffffffff000ULL
;
526 Gets GCD Mem Space type from MTRR Type.
528 This function gets GCD Mem Space type from MTRR Type.
530 @param MtrrAttributes MTRR memory type
532 @return GCD Mem Space type
536 GetMemorySpaceAttributeFromMtrrType (
537 IN UINT8 MtrrAttributes
540 switch (MtrrAttributes
) {
541 case MTRR_CACHE_UNCACHEABLE
:
542 return EFI_MEMORY_UC
;
543 case MTRR_CACHE_WRITE_COMBINING
:
544 return EFI_MEMORY_WC
;
545 case MTRR_CACHE_WRITE_THROUGH
:
546 return EFI_MEMORY_WT
;
547 case MTRR_CACHE_WRITE_PROTECTED
:
548 return EFI_MEMORY_WP
;
549 case MTRR_CACHE_WRITE_BACK
:
550 return EFI_MEMORY_WB
;
557 Searches memory descriptors covered by given memory range.
559 This function searches into the Gcd Memory Space for descriptors
560 (from StartIndex to EndIndex) that contains the memory range
561 specified by BaseAddress and Length.
563 @param MemorySpaceMap Gcd Memory Space Map as array.
564 @param NumberOfDescriptors Number of descriptors in map.
565 @param BaseAddress BaseAddress for the requested range.
566 @param Length Length for the requested range.
567 @param StartIndex Start index into the Gcd Memory Space Map.
568 @param EndIndex End index into the Gcd Memory Space Map.
570 @retval EFI_SUCCESS Search successfully.
571 @retval EFI_NOT_FOUND The requested descriptors does not exist.
575 SearchGcdMemorySpaces (
576 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
577 IN UINTN NumberOfDescriptors
,
578 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
580 OUT UINTN
*StartIndex
,
588 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
589 if ((BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
) &&
590 (BaseAddress
< MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
))
595 if ((BaseAddress
+ Length
- 1 >= MemorySpaceMap
[Index
].BaseAddress
) &&
596 (BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
))
603 return EFI_NOT_FOUND
;
607 Sets the attributes for a specified range in Gcd Memory Space Map.
609 This function sets the attributes for a specified range in
610 Gcd Memory Space Map.
612 @param MemorySpaceMap Gcd Memory Space Map as array
613 @param NumberOfDescriptors Number of descriptors in map
614 @param BaseAddress BaseAddress for the range
615 @param Length Length for the range
616 @param Attributes Attributes to set
618 @retval EFI_SUCCESS Memory attributes set successfully
619 @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space
623 SetGcdMemorySpaceAttributes (
624 IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
,
625 IN UINTN NumberOfDescriptors
,
626 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
635 EFI_PHYSICAL_ADDRESS RegionStart
;
639 // Get all memory descriptors covered by the memory range
641 Status
= SearchGcdMemorySpaces (
649 if (EFI_ERROR (Status
)) {
654 // Go through all related descriptors and set attributes accordingly
656 for (Index
= StartIndex
; Index
<= EndIndex
; Index
++) {
657 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
662 // Calculate the start and end address of the overlapping range
664 if (BaseAddress
>= MemorySpaceMap
[Index
].BaseAddress
) {
665 RegionStart
= BaseAddress
;
667 RegionStart
= MemorySpaceMap
[Index
].BaseAddress
;
670 if (BaseAddress
+ Length
- 1 < MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
) {
671 RegionLength
= BaseAddress
+ Length
- RegionStart
;
673 RegionLength
= MemorySpaceMap
[Index
].BaseAddress
+ MemorySpaceMap
[Index
].Length
- RegionStart
;
677 // Set memory attributes according to MTRR attribute and the original attribute of descriptor
679 gDS
->SetMemorySpaceAttributes (
682 (MemorySpaceMap
[Index
].Attributes
& ~EFI_CACHE_ATTRIBUTE_MASK
) | (MemorySpaceMap
[Index
].Capabilities
& Attributes
)
690 Refreshes the GCD Memory Space attributes according to MTRRs.
692 This function refreshes the GCD Memory Space attributes according to MTRRs.
696 RefreshMemoryAttributesFromMtrr (
704 EFI_PHYSICAL_ADDRESS BaseAddress
;
707 UINT64 CurrentAttributes
;
709 UINTN NumberOfDescriptors
;
710 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
711 UINT64 DefaultAttributes
;
712 VARIABLE_MTRR VariableMtrr
[MTRR_NUMBER_OF_VARIABLE_MTRR
];
713 MTRR_FIXED_SETTINGS MtrrFixedSettings
;
714 UINT32 FirmwareVariableMtrrCount
;
715 UINT8 DefaultMemoryType
;
717 FirmwareVariableMtrrCount
= GetFirmwareVariableMtrrCount ();
718 ASSERT (FirmwareVariableMtrrCount
<= MTRR_NUMBER_OF_VARIABLE_MTRR
);
720 MemorySpaceMap
= NULL
;
723 // Initialize the valid bits mask and valid address mask for MTRRs
725 InitializeMtrrMask ();
728 // Get the memory attribute of variable MTRRs
730 MtrrGetMemoryAttributeInVariableMtrr (
732 mValidMtrrAddressMask
,
737 // Get the memory space map from GCD
739 Status
= gDS
->GetMemorySpaceMap (
740 &NumberOfDescriptors
,
743 ASSERT_EFI_ERROR (Status
);
745 DefaultMemoryType
= (UINT8
)MtrrGetDefaultMemoryType ();
746 DefaultAttributes
= GetMemorySpaceAttributeFromMtrrType (DefaultMemoryType
);
749 // Set default attributes to all spaces.
751 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
752 if (MemorySpaceMap
[Index
].GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
756 gDS
->SetMemorySpaceAttributes (
757 MemorySpaceMap
[Index
].BaseAddress
,
758 MemorySpaceMap
[Index
].Length
,
759 (MemorySpaceMap
[Index
].Attributes
& ~EFI_CACHE_ATTRIBUTE_MASK
) |
760 (MemorySpaceMap
[Index
].Capabilities
& DefaultAttributes
)
765 // Go for variable MTRRs with WB attribute
767 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
768 if (VariableMtrr
[Index
].Valid
&&
769 (VariableMtrr
[Index
].Type
== MTRR_CACHE_WRITE_BACK
))
771 SetGcdMemorySpaceAttributes (
774 VariableMtrr
[Index
].BaseAddress
,
775 VariableMtrr
[Index
].Length
,
782 // Go for variable MTRRs with the attribute except for WB and UC attributes
784 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
785 if (VariableMtrr
[Index
].Valid
&&
786 (VariableMtrr
[Index
].Type
!= MTRR_CACHE_WRITE_BACK
) &&
787 (VariableMtrr
[Index
].Type
!= MTRR_CACHE_UNCACHEABLE
))
789 Attributes
= GetMemorySpaceAttributeFromMtrrType ((UINT8
)VariableMtrr
[Index
].Type
);
790 SetGcdMemorySpaceAttributes (
793 VariableMtrr
[Index
].BaseAddress
,
794 VariableMtrr
[Index
].Length
,
801 // Go for variable MTRRs with UC attribute
803 for (Index
= 0; Index
< FirmwareVariableMtrrCount
; Index
++) {
804 if (VariableMtrr
[Index
].Valid
&&
805 (VariableMtrr
[Index
].Type
== MTRR_CACHE_UNCACHEABLE
))
807 SetGcdMemorySpaceAttributes (
810 VariableMtrr
[Index
].BaseAddress
,
811 VariableMtrr
[Index
].Length
,
818 // Go for fixed MTRRs
823 MtrrGetFixedMtrr (&MtrrFixedSettings
);
824 for (Index
= 0; Index
< MTRR_NUMBER_OF_FIXED_MTRR
; Index
++) {
825 RegValue
= MtrrFixedSettings
.Mtrr
[Index
];
827 // Check for continuous fixed MTRR sections
829 for (SubIndex
= 0; SubIndex
< 8; SubIndex
++) {
830 MtrrType
= (UINT8
)RShiftU64 (RegValue
, SubIndex
* 8);
831 CurrentAttributes
= GetMemorySpaceAttributeFromMtrrType (MtrrType
);
834 // A new MTRR attribute begins
836 Attributes
= CurrentAttributes
;
839 // If fixed MTRR attribute changed, then set memory attribute for previous attribute
841 if (CurrentAttributes
!= Attributes
) {
842 SetGcdMemorySpaceAttributes (
849 BaseAddress
= mFixedMtrrTable
[Index
].BaseAddress
+ mFixedMtrrTable
[Index
].Length
* SubIndex
;
851 Attributes
= CurrentAttributes
;
855 Length
+= mFixedMtrrTable
[Index
].Length
;
860 // Handle the last fixed MTRR region
862 SetGcdMemorySpaceAttributes (
871 // Free memory space map allocated by GCD service GetMemorySpaceMap ()
873 if (MemorySpaceMap
!= NULL
) {
874 FreePool (MemorySpaceMap
);
879 Check if paging is enabled or not.
882 IsPagingAndPageAddressExtensionsEnabled (
889 Cr0
.UintN
= AsmReadCr0 ();
890 Cr4
.UintN
= AsmReadCr4 ();
892 return ((Cr0
.Bits
.PG
!= 0) && (Cr4
.Bits
.PAE
!= 0));
896 Refreshes the GCD Memory Space attributes according to MTRRs and Paging.
898 This function refreshes the GCD Memory Space attributes according to MTRRs
903 RefreshGcdMemoryAttributes (
907 mIsFlushingGCD
= TRUE
;
909 if (IsMtrrSupported ()) {
910 RefreshMemoryAttributesFromMtrr ();
913 if (IsPagingAndPageAddressExtensionsEnabled ()) {
914 RefreshGcdMemoryAttributesFromPaging ();
917 mIsFlushingGCD
= FALSE
;
921 Initialize Interrupt Descriptor Table for interrupt handling.
925 InitInterruptDescriptorTable (
930 EFI_VECTOR_HANDOFF_INFO
*VectorInfoList
;
931 EFI_VECTOR_HANDOFF_INFO
*VectorInfo
;
932 IA32_IDT_GATE_DESCRIPTOR
*IdtTable
;
933 IA32_DESCRIPTOR IdtDescriptor
;
937 Status
= EfiGetSystemConfigurationTable (&gEfiVectorHandoffTableGuid
, (VOID
**)&VectorInfoList
);
938 if ((Status
== EFI_SUCCESS
) && (VectorInfoList
!= NULL
)) {
939 VectorInfo
= VectorInfoList
;
942 AsmReadIdtr (&IdtDescriptor
);
943 IdtEntryCount
= (IdtDescriptor
.Limit
+ 1) / sizeof (IA32_IDT_GATE_DESCRIPTOR
);
944 if (IdtEntryCount
< CPU_INTERRUPT_NUM
) {
946 // Increase Interrupt Descriptor Table and Copy the old IDT table in
948 IdtTable
= AllocateZeroPool (sizeof (IA32_IDT_GATE_DESCRIPTOR
) * CPU_INTERRUPT_NUM
);
949 ASSERT (IdtTable
!= NULL
);
950 CopyMem (IdtTable
, (VOID
*)IdtDescriptor
.Base
, sizeof (IA32_IDT_GATE_DESCRIPTOR
) * IdtEntryCount
);
953 // Load Interrupt Descriptor Table
955 IdtDescriptor
.Base
= (UINTN
)IdtTable
;
956 IdtDescriptor
.Limit
= (UINT16
)(sizeof (IA32_IDT_GATE_DESCRIPTOR
) * CPU_INTERRUPT_NUM
- 1);
957 AsmWriteIdtr (&IdtDescriptor
);
960 Status
= InitializeCpuExceptionHandlers (VectorInfo
);
961 ASSERT_EFI_ERROR (Status
);
965 Callback function for idle events.
967 @param Event Event whose notification function is being invoked.
968 @param Context The pointer to the notification function's context,
969 which is implementation-dependent.
974 IdleLoopEventCallback (
983 Ensure the compatibility of a memory space descriptor with the MMIO aperture.
985 The memory space descriptor can come from the GCD memory space map, or it can
986 represent a gap between two neighboring memory space descriptors. In the
987 latter case, the GcdMemoryType field is expected to be
988 EfiGcdMemoryTypeNonExistent.
990 If the memory space descriptor already has type
991 EfiGcdMemoryTypeMemoryMappedIo, and its capabilities are a superset of the
992 required capabilities, then no action is taken -- it is by definition
993 compatible with the aperture.
995 Otherwise, the intersection of the memory space descriptor is calculated with
996 the aperture. If the intersection is the empty set (no overlap), no action is
997 taken; the memory space descriptor is compatible with the aperture.
999 Otherwise, the type of the descriptor is investigated again. If the type is
1000 EfiGcdMemoryTypeNonExistent (representing a gap, or a genuine descriptor with
1001 such a type), then an attempt is made to add the intersection as MMIO space
1002 to the GCD memory space map, with the specified capabilities. This ensures
1003 continuity for the aperture, and the descriptor is deemed compatible with the
1006 Otherwise, the memory space descriptor is incompatible with the MMIO
1009 @param[in] Base Base address of the aperture.
1010 @param[in] Length Length of the aperture.
1011 @param[in] Capabilities Capabilities required by the aperture.
1012 @param[in] Descriptor The descriptor to ensure compatibility with the
1015 @retval EFI_SUCCESS The descriptor is compatible. The GCD memory
1016 space map may have been updated, for
1017 continuity within the aperture.
1018 @retval EFI_INVALID_PARAMETER The descriptor is incompatible.
1019 @return Error codes from gDS->AddMemorySpace().
1022 IntersectMemoryDescriptor (
1025 IN UINT64 Capabilities
,
1026 IN CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*Descriptor
1029 UINT64 IntersectionBase
;
1030 UINT64 IntersectionEnd
;
1033 if ((Descriptor
->GcdMemoryType
== EfiGcdMemoryTypeMemoryMappedIo
) &&
1034 ((Descriptor
->Capabilities
& Capabilities
) == Capabilities
))
1039 IntersectionBase
= MAX (Base
, Descriptor
->BaseAddress
);
1040 IntersectionEnd
= MIN (
1042 Descriptor
->BaseAddress
+ Descriptor
->Length
1044 if (IntersectionBase
>= IntersectionEnd
) {
1046 // The descriptor and the aperture don't overlap.
1051 if (Descriptor
->GcdMemoryType
== EfiGcdMemoryTypeNonExistent
) {
1052 Status
= gDS
->AddMemorySpace (
1053 EfiGcdMemoryTypeMemoryMappedIo
,
1055 IntersectionEnd
- IntersectionBase
,
1060 EFI_ERROR (Status
) ? DEBUG_ERROR
: DEBUG_VERBOSE
,
1061 "%a: %a: add [%Lx, %Lx): %r\n",
1073 "%a: %a: desc [%Lx, %Lx) type %u cap %Lx conflicts "
1074 "with aperture [%Lx, %Lx) cap %Lx\n",
1077 Descriptor
->BaseAddress
,
1078 Descriptor
->BaseAddress
+ Descriptor
->Length
,
1079 (UINT32
)Descriptor
->GcdMemoryType
,
1080 Descriptor
->Capabilities
,
1085 return EFI_INVALID_PARAMETER
;
1089 Add MMIO space to GCD.
1090 The routine checks the GCD database and only adds those which are
1091 not added in the specified range to GCD.
1093 @param Base Base address of the MMIO space.
1094 @param Length Length of the MMIO space.
1095 @param Capabilities Capabilities of the MMIO space.
1097 @retval EFI_SUCCESS The MMIO space was added successfully.
1100 AddMemoryMappedIoSpace (
1103 IN UINT64 Capabilities
1108 UINTN NumberOfDescriptors
;
1109 EFI_GCD_MEMORY_SPACE_DESCRIPTOR
*MemorySpaceMap
;
1111 Status
= gDS
->GetMemorySpaceMap (&NumberOfDescriptors
, &MemorySpaceMap
);
1112 if (EFI_ERROR (Status
)) {
1115 "%a: %a: GetMemorySpaceMap(): %r\n",
1123 for (Index
= 0; Index
< NumberOfDescriptors
; Index
++) {
1124 Status
= IntersectMemoryDescriptor (
1128 &MemorySpaceMap
[Index
]
1130 if (EFI_ERROR (Status
)) {
1131 goto FreeMemorySpaceMap
;
1135 DEBUG_CODE_BEGIN ();
1137 // Make sure there are adjacent descriptors covering [Base, Base + Length).
1138 // It is possible that they have not been merged; merging can be prevented
1139 // by allocation and different capabilities.
1142 EFI_STATUS CheckStatus
;
1143 EFI_GCD_MEMORY_SPACE_DESCRIPTOR Descriptor
;
1145 for (CheckBase
= Base
;
1146 CheckBase
< Base
+ Length
;
1147 CheckBase
= Descriptor
.BaseAddress
+ Descriptor
.Length
)
1149 CheckStatus
= gDS
->GetMemorySpaceDescriptor (CheckBase
, &Descriptor
);
1150 ASSERT_EFI_ERROR (CheckStatus
);
1151 ASSERT (Descriptor
.GcdMemoryType
== EfiGcdMemoryTypeMemoryMappedIo
);
1152 ASSERT ((Descriptor
.Capabilities
& Capabilities
) == Capabilities
);
1158 FreePool (MemorySpaceMap
);
1164 Add and allocate CPU local APIC memory mapped space.
1166 @param[in]ImageHandle Image handle this driver.
1170 AddLocalApicMemorySpace (
1171 IN EFI_HANDLE ImageHandle
1175 EFI_PHYSICAL_ADDRESS BaseAddress
;
1177 BaseAddress
= (EFI_PHYSICAL_ADDRESS
)GetLocalApicBaseAddress ();
1178 Status
= AddMemoryMappedIoSpace (BaseAddress
, SIZE_4KB
, EFI_MEMORY_UC
);
1179 ASSERT_EFI_ERROR (Status
);
1182 // Try to allocate APIC memory mapped space, does not check return
1183 // status because it may be allocated by other driver, or DXE Core if
1184 // this range is built into Memory Allocation HOB.
1186 Status
= gDS
->AllocateMemorySpace (
1187 EfiGcdAllocateAddress
,
1188 EfiGcdMemoryTypeMemoryMappedIo
,
1195 if (EFI_ERROR (Status
)) {
1198 "%a: %a: AllocateMemorySpace() Status - %r\n",
1207 Initialize the state information for the CPU Architectural Protocol.
1209 @param ImageHandle Image handle this driver.
1210 @param SystemTable Pointer to the System Table.
1212 @retval EFI_SUCCESS Thread can be successfully created
1213 @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure
1214 @retval EFI_DEVICE_ERROR Cannot create the thread
1220 IN EFI_HANDLE ImageHandle
,
1221 IN EFI_SYSTEM_TABLE
*SystemTable
1225 EFI_EVENT IdleLoopEvent
;
1227 InitializePageTableLib ();
1229 InitializeFloatingPointUnits ();
1232 // Make sure interrupts are disabled
1234 DisableInterrupts ();
1239 InitGlobalDescriptorTable ();
1242 // Setup IDT pointer, IDT and interrupt entry points
1244 InitInterruptDescriptorTable ();
1247 // Install CPU Architectural Protocol
1249 Status
= gBS
->InstallMultipleProtocolInterfaces (
1251 &gEfiCpuArchProtocolGuid
,
1255 ASSERT_EFI_ERROR (Status
);
1258 // Refresh GCD memory space map according to MTRR value.
1260 RefreshGcdMemoryAttributes ();
1263 // Add and allocate local APIC memory mapped space
1265 AddLocalApicMemorySpace (ImageHandle
);
1268 // Setup a callback for idle events
1270 Status
= gBS
->CreateEventEx (
1273 IdleLoopEventCallback
,
1275 &gIdleLoopEventGuid
,
1278 ASSERT_EFI_ERROR (Status
);
1280 InitializeMpSupport ();