2 CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.
4 Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 #include <Protocol/Cpu.h>
21 #include <Protocol/MpService.h>
22 #include <Register/Msr.h>
24 #include <Ppi/SecPlatformInformation.h>
25 #include <Ppi/SecPlatformInformation2.h>
27 #include <Library/UefiDriverEntryPoint.h>
28 #include <Library/UefiBootServicesTableLib.h>
29 #include <Library/DxeServicesTableLib.h>
30 #include <Library/BaseLib.h>
31 #include <Library/CpuLib.h>
32 #include <Library/BaseMemoryLib.h>
33 #include <Library/MemoryAllocationLib.h>
34 #include <Library/DebugLib.h>
35 #include <Library/MtrrLib.h>
36 #include <Library/LocalApicLib.h>
37 #include <Library/UefiCpuLib.h>
38 #include <Library/UefiLib.h>
39 #include <Library/CpuExceptionHandlerLib.h>
40 #include <Library/HobLib.h>
41 #include <Library/ReportStatusCodeLib.h>
42 #include <Library/MpInitLib.h>
43 #include <Library/TimerLib.h>
45 #include <Guid/IdleLoopEvent.h>
46 #include <Guid/VectorHandoffTable.h>
48 #define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \
55 #define EFI_MEMORY_PAGETYPE_MASK (EFI_MEMORY_RP | \
60 #define HEAP_GUARD_NONSTOP_MODE \
61 ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT4|BIT1|BIT0)) > BIT6)
63 #define NULL_DETECTION_NONSTOP_MODE \
64 ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT0)) > BIT6)
67 Flush CPU data cache. If the instruction cache is fully coherent
68 with all DMA operations then function can just return EFI_SUCCESS.
70 @param This Protocol instance structure
71 @param Start Physical address to start flushing from.
72 @param Length Number of bytes to flush. Round up to chipset
74 @param FlushType Specifies the type of flush operation to perform.
76 @retval EFI_SUCCESS If cache was flushed
77 @retval EFI_UNSUPPORTED If flush type is not supported.
78 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
83 CpuFlushCpuDataCache (
84 IN EFI_CPU_ARCH_PROTOCOL
*This
,
85 IN EFI_PHYSICAL_ADDRESS Start
,
87 IN EFI_CPU_FLUSH_TYPE FlushType
91 Enables CPU interrupts.
93 @param This Protocol instance structure
95 @retval EFI_SUCCESS If interrupts were enabled in the CPU
96 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
102 IN EFI_CPU_ARCH_PROTOCOL
*This
106 Disables CPU interrupts.
108 @param This Protocol instance structure
110 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
111 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
116 CpuDisableInterrupt (
117 IN EFI_CPU_ARCH_PROTOCOL
*This
121 Return the state of interrupts.
123 @param This Protocol instance structure
124 @param State Pointer to the CPU's current interrupt state
126 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
127 @retval EFI_INVALID_PARAMETER State is NULL.
132 CpuGetInterruptState (
133 IN EFI_CPU_ARCH_PROTOCOL
*This
,
138 Generates an INIT to the CPU.
140 @param This Protocol instance structure
141 @param InitType Type of CPU INIT to perform
143 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
145 @retval EFI_DEVICE_ERROR If CPU INIT failed.
146 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
152 IN EFI_CPU_ARCH_PROTOCOL
*This
,
153 IN EFI_CPU_INIT_TYPE InitType
157 Registers a function to be called from the CPU interrupt handler.
159 @param This Protocol instance structure
160 @param InterruptType Defines which interrupt to hook. IA-32
161 valid range is 0x00 through 0xFF
162 @param InterruptHandler A pointer to a function of type
163 EFI_CPU_INTERRUPT_HANDLER that is called
164 when a processor interrupt occurs. A null
165 pointer is an error condition.
167 @retval EFI_SUCCESS If handler installed or uninstalled.
168 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
169 for InterruptType was previously installed.
170 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
171 InterruptType was not previously installed.
172 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
178 CpuRegisterInterruptHandler (
179 IN EFI_CPU_ARCH_PROTOCOL
*This
,
180 IN EFI_EXCEPTION_TYPE InterruptType
,
181 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
185 Returns a timer value from one of the CPU's internal timers. There is no
186 inherent time interval between ticks but is a function of the CPU frequency.
188 @param This - Protocol instance structure.
189 @param TimerIndex - Specifies which CPU timer is requested.
190 @param TimerValue - Pointer to the returned timer value.
191 @param TimerPeriod - A pointer to the amount of time that passes
192 in femtoseconds (10-15) for each increment
193 of TimerValue. If TimerValue does not
194 increment at a predictable rate, then 0 is
195 returned. The amount of time that has
196 passed between two calls to GetTimerValue()
197 can be calculated with the formula
198 (TimerValue2 - TimerValue1) * TimerPeriod.
199 This parameter is optional and may be NULL.
201 @retval EFI_SUCCESS - If the CPU timer count was returned.
202 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
203 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
204 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
210 IN EFI_CPU_ARCH_PROTOCOL
*This
,
211 IN UINT32 TimerIndex
,
212 OUT UINT64
*TimerValue
,
213 OUT UINT64
*TimerPeriod OPTIONAL
217 Set memory cacheability attributes for given range of memeory.
219 @param This Protocol instance structure
220 @param BaseAddress Specifies the start address of the
222 @param Length Specifies the length of the memory range
223 @param Attributes The memory cacheability for the memory range
225 @retval EFI_SUCCESS If the cacheability of that memory range is
227 @retval EFI_UNSUPPORTED If the desired operation cannot be done
228 @retval EFI_INVALID_PARAMETER The input parameter is not correct,
234 CpuSetMemoryAttributes (
235 IN EFI_CPU_ARCH_PROTOCOL
*This
,
236 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
242 Initialize Global Descriptor Table.
246 InitGlobalDescriptorTable (
251 Sets the code selector (CS).
253 @param Selector Value of code selector.
263 Sets the data selector (DS).
265 @param Selector Value of data selector.
275 Update GCD memory space attributes according to current page table setup.
278 RefreshGcdMemoryAttributesFromPaging (
283 Special handler for #DB exception, which will restore the page attributes
284 (not-present). It should work with #PF handler which will set pages to
287 @param ExceptionType Exception type.
288 @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
293 DebugExceptionHandler (
294 IN EFI_EXCEPTION_TYPE ExceptionType
,
295 IN EFI_SYSTEM_CONTEXT SystemContext
299 Special handler for #PF exception, which will set the pages which caused
300 #PF to be 'present'. The attribute of those pages should be restored in
301 the subsequent #DB handler.
303 @param ExceptionType Exception type.
304 @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
309 PageFaultExceptionHandler (
310 IN EFI_EXCEPTION_TYPE ExceptionType
,
311 IN EFI_SYSTEM_CONTEXT SystemContext
314 extern BOOLEAN mIsAllocatingPageTable
;
315 extern UINTN mNumberOfProcessors
;