2 CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.
4 Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
14 #include <Protocol/Cpu.h>
15 #include <Protocol/MpService.h>
16 #include <Register/Intel/Msr.h>
18 #include <Ppi/SecPlatformInformation.h>
19 #include <Ppi/SecPlatformInformation2.h>
21 #include <Library/UefiDriverEntryPoint.h>
22 #include <Library/UefiBootServicesTableLib.h>
23 #include <Library/DxeServicesTableLib.h>
24 #include <Library/BaseLib.h>
25 #include <Library/CpuLib.h>
26 #include <Library/BaseMemoryLib.h>
27 #include <Library/MemoryAllocationLib.h>
28 #include <Library/DebugLib.h>
29 #include <Library/MtrrLib.h>
30 #include <Library/LocalApicLib.h>
31 #include <Library/UefiCpuLib.h>
32 #include <Library/UefiLib.h>
33 #include <Library/CpuExceptionHandlerLib.h>
34 #include <Library/HobLib.h>
35 #include <Library/ReportStatusCodeLib.h>
36 #include <Library/MpInitLib.h>
37 #include <Library/TimerLib.h>
39 #include <Guid/IdleLoopEvent.h>
40 #include <Guid/VectorHandoffTable.h>
42 #define HEAP_GUARD_NONSTOP_MODE \
43 ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT4|BIT1|BIT0)) > BIT6)
45 #define NULL_DETECTION_NONSTOP_MODE \
46 ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT0)) > BIT6)
49 Flush CPU data cache. If the instruction cache is fully coherent
50 with all DMA operations then function can just return EFI_SUCCESS.
52 @param This Protocol instance structure
53 @param Start Physical address to start flushing from.
54 @param Length Number of bytes to flush. Round up to chipset
56 @param FlushType Specifies the type of flush operation to perform.
58 @retval EFI_SUCCESS If cache was flushed
59 @retval EFI_UNSUPPORTED If flush type is not supported.
60 @retval EFI_DEVICE_ERROR If requested range could not be flushed.
65 CpuFlushCpuDataCache (
66 IN EFI_CPU_ARCH_PROTOCOL
*This
,
67 IN EFI_PHYSICAL_ADDRESS Start
,
69 IN EFI_CPU_FLUSH_TYPE FlushType
73 Enables CPU interrupts.
75 @param This Protocol instance structure
77 @retval EFI_SUCCESS If interrupts were enabled in the CPU
78 @retval EFI_DEVICE_ERROR If interrupts could not be enabled on the CPU.
84 IN EFI_CPU_ARCH_PROTOCOL
*This
88 Disables CPU interrupts.
90 @param This Protocol instance structure
92 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
93 @retval EFI_DEVICE_ERROR If interrupts could not be disabled on the CPU.
99 IN EFI_CPU_ARCH_PROTOCOL
*This
103 Return the state of interrupts.
105 @param This Protocol instance structure
106 @param State Pointer to the CPU's current interrupt state
108 @retval EFI_SUCCESS If interrupts were disabled in the CPU.
109 @retval EFI_INVALID_PARAMETER State is NULL.
114 CpuGetInterruptState (
115 IN EFI_CPU_ARCH_PROTOCOL
*This
,
120 Generates an INIT to the CPU.
122 @param This Protocol instance structure
123 @param InitType Type of CPU INIT to perform
125 @retval EFI_SUCCESS If CPU INIT occurred. This value should never be
127 @retval EFI_DEVICE_ERROR If CPU INIT failed.
128 @retval EFI_UNSUPPORTED Requested type of CPU INIT not supported.
134 IN EFI_CPU_ARCH_PROTOCOL
*This
,
135 IN EFI_CPU_INIT_TYPE InitType
139 Registers a function to be called from the CPU interrupt handler.
141 @param This Protocol instance structure
142 @param InterruptType Defines which interrupt to hook. IA-32
143 valid range is 0x00 through 0xFF
144 @param InterruptHandler A pointer to a function of type
145 EFI_CPU_INTERRUPT_HANDLER that is called
146 when a processor interrupt occurs. A null
147 pointer is an error condition.
149 @retval EFI_SUCCESS If handler installed or uninstalled.
150 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler
151 for InterruptType was previously installed.
152 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for
153 InterruptType was not previously installed.
154 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType
160 CpuRegisterInterruptHandler (
161 IN EFI_CPU_ARCH_PROTOCOL
*This
,
162 IN EFI_EXCEPTION_TYPE InterruptType
,
163 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
167 Returns a timer value from one of the CPU's internal timers. There is no
168 inherent time interval between ticks but is a function of the CPU frequency.
170 @param This - Protocol instance structure.
171 @param TimerIndex - Specifies which CPU timer is requested.
172 @param TimerValue - Pointer to the returned timer value.
173 @param TimerPeriod - A pointer to the amount of time that passes
174 in femtoseconds (10-15) for each increment
175 of TimerValue. If TimerValue does not
176 increment at a predictable rate, then 0 is
177 returned. The amount of time that has
178 passed between two calls to GetTimerValue()
179 can be calculated with the formula
180 (TimerValue2 - TimerValue1) * TimerPeriod.
181 This parameter is optional and may be NULL.
183 @retval EFI_SUCCESS - If the CPU timer count was returned.
184 @retval EFI_UNSUPPORTED - If the CPU does not have any readable timers.
185 @retval EFI_DEVICE_ERROR - If an error occurred while reading the timer.
186 @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.
192 IN EFI_CPU_ARCH_PROTOCOL
*This
,
193 IN UINT32 TimerIndex
,
194 OUT UINT64
*TimerValue
,
195 OUT UINT64
*TimerPeriod OPTIONAL
199 Set memory cacheability attributes for given range of memory.
201 @param This Protocol instance structure
202 @param BaseAddress Specifies the start address of the
204 @param Length Specifies the length of the memory range
205 @param Attributes The memory cacheability for the memory range
207 @retval EFI_SUCCESS If the cacheability of that memory range is
209 @retval EFI_UNSUPPORTED If the desired operation cannot be done
210 @retval EFI_INVALID_PARAMETER The input parameter is not correct,
216 CpuSetMemoryAttributes (
217 IN EFI_CPU_ARCH_PROTOCOL
*This
,
218 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
224 Initialize Global Descriptor Table.
228 InitGlobalDescriptorTable (
233 Sets the code selector (CS).
235 @param Selector Value of code selector.
245 Sets the data selector (DS).
247 @param Selector Value of data selector.
257 Update GCD memory space attributes according to current page table setup.
260 RefreshGcdMemoryAttributesFromPaging (
265 Special handler for #DB exception, which will restore the page attributes
266 (not-present). It should work with #PF handler which will set pages to
269 @param ExceptionType Exception type.
270 @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
275 DebugExceptionHandler (
276 IN EFI_EXCEPTION_TYPE ExceptionType
,
277 IN EFI_SYSTEM_CONTEXT SystemContext
281 Special handler for #PF exception, which will set the pages which caused
282 #PF to be 'present'. The attribute of those pages should be restored in
283 the subsequent #DB handler.
285 @param ExceptionType Exception type.
286 @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
291 PageFaultExceptionHandler (
292 IN EFI_EXCEPTION_TYPE ExceptionType
,
293 IN EFI_SYSTEM_CONTEXT SystemContext
296 extern BOOLEAN mIsAllocatingPageTable
;
297 extern UINTN mNumberOfProcessors
;