1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 ; This is the assembly code for MP support
19 ;-------------------------------------------------------------------------------
22 extern ASM_PFX(InitializeFloatingPointUnits)
28 ;-------------------------------------------------------------------------------------
29 ;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
30 ;procedure serializes all the AP processors through an Init sequence. It must be
31 ;noted that APs arrive here very raw...ie: real mode, no stack.
32 ;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
34 ;-------------------------------------------------------------------------------------
35 global ASM_PFX(RendezvousFunnelProc)
36 ASM_PFX(RendezvousFunnelProc):
37 RendezvousFunnelProcStart:
38 ; At this point CS = 0x(vv00) and ip= 0x0.
39 ; Save BIST information to ebp firstly
43 mov ebp, eax ; save BIST information
53 mov si, BufferStartLocation
56 mov di, PmodeOffsetLocation
63 mov di, LmodeOffsetLocation
72 mov ecx,[si] ; ECX is keeping the value of CR3
84 mov eax, cr0 ;Get control register 0
85 or eax, 000000003h ;Set PE bit (bit #0) & MP
88 jmp PROTECT_MODE_CS:strict dword 0 ; far jump to protected mode
90 Flat32Start: ; protected mode entry point
91 mov ax, PROTECT_MODE_DS
105 mov ecx, 0c0000080h ; EFER MSR number.
107 bts eax, 8 ; Set LME=1.
110 mov eax, cr0 ; Read CR0.
111 bts eax, 31 ; Set PG=1.
112 mov cr0, eax ; Write CR0.
114 jmp LONG_MODE_CS:strict dword 0 ; far jump to long mode
124 add edi, LockLocation
125 mov rax, NotVacantFlag
128 xchg qword [edi], rax
129 cmp rax, NotVacantFlag
133 add edi, NumApsExecutingLoction
139 add edi, StackSizeLocation
142 add edi, StackStartAddressLocation
150 add edi, LockLocation
151 xchg qword [edi], rax
154 push rbp ; push BIST data at top of AP stack
155 xor rbp, rbp ; clear ebp for call stack trace
159 mov rax, ASM_PFX(InitializeFloatingPointUnits)
161 call rax ; Call assembly function to initialize FPU per UEFI spec
164 mov edx, ebx ; edx is NumApsExecuting
166 add ecx, LockLocation ; rcx is address of exchange info data buffer
169 add edi, ApProcedureLocation
173 call rax ; invoke C function
176 RendezvousFunnelProcEnd:
178 global ASM_PFX(AsmCliHltLoop)
179 ASM_PFX(AsmCliHltLoop):
184 ;-------------------------------------------------------------------------------------
185 ; AsmGetAddressMap (&AddressMap);
186 ;-------------------------------------------------------------------------------------
187 global ASM_PFX(AsmGetAddressMap)
188 ASM_PFX(AsmGetAddressMap):
189 mov rax, ASM_PFX(RendezvousFunnelProc)
191 mov qword [rcx + 8h], Flat32Start - RendezvousFunnelProcStart
192 mov qword [rcx + 10h], LongModeStart - RendezvousFunnelProcStart
193 mov qword [rcx + 18h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
196 ;-------------------------------------------------------------------------------------
197 ;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
198 ;about to become an AP. It switches it'stack with the current AP.
199 ;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
200 ;-------------------------------------------------------------------------------------
201 global ASM_PFX(AsmExchangeRole)
202 ASM_PFX(AsmExchangeRole):
203 ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
204 ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
228 ; rsi contains MyInfo pointer
231 ; rdi contains OthersInfo pointer
234 ;Store EFLAGS, GDTR and IDTR regiter to stack
239 ; Store the its StackPointer
242 ; update its switch state to STORED
243 mov byte [rsi], CPU_SWITCH_STATE_STORED
246 ; wait until the other CPU finish storing its state
247 cmp byte [rdi], CPU_SWITCH_STATE_STORED
250 jmp WaitForOtherStored
253 ; Since another CPU already stored its state, load them
260 ; load its future StackPointer
263 ; update the other CPU's switch state to LOADED
264 mov byte [rdi], CPU_SWITCH_STATE_LOADED
267 ; wait until the other CPU finish loading new state,
268 ; otherwise the data in stack may corrupt
269 cmp byte [rsi], CPU_SWITCH_STATE_LOADED
272 jmp WaitForOtherLoaded
275 ; since the other CPU already get the data it want, leave this procedure
302 global ASM_PFX(AsmInitializeGdt)
303 ASM_PFX(AsmInitializeGdt):
307 lgdt [rcx] ; update the GDTR
310 mov rax, ASM_PFX(SetCodeSelectorFarJump)
312 mov rdx, LONG_MODE_CS
313 mov [rsp + 4], dx ; get new CS
314 jmp far dword [rsp] ; far jump with new CS
315 ASM_PFX(SetCodeSelectorFarJump):
318 mov rax, LONG_MODE_DS ; get new DS