2 Definitions for CPU S3 data.
4 Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef _ACPI_CPU_DATA_H_
10 #define _ACPI_CPU_DATA_H_
13 // Register types in register table
22 // Semaphore type used to control the execute sequence of the Msr.
23 // It will be insert between two Msr which has execute dependence.
30 // Describe the dependency type for different features.
31 // The value set to CPU_REGISTER_TABLE_ENTRY.Value when the REGISTER_TYPE is Semaphore.
39 } CPU_FEATURE_DEPENDENCE_TYPE
;
46 // Record the package count in this CPU.
50 // Record the max core count in this CPU.
51 // Different packages may have different core count, this value
52 // save the max core count in all the packages.
56 // Record the max thread count in this CPU.
57 // Different cores may have different thread count, this value
58 // save the max thread count in all the cores.
60 UINT32 MaxThreadCount
;
62 // This field points to an array.
63 // This array saves valid core count (type UINT32) of each package.
64 // The array has PackageCount elements.
66 // If the platform does not support MSR setting at S3 resume, and
67 // therefore it doesn't need the dependency semaphores, it should set
70 EFI_PHYSICAL_ADDRESS ValidCoreCountPerPackage
;
71 } CPU_STATUS_INFORMATION
;
74 // Element of register table entry
77 REGISTER_TYPE RegisterType
; // offset 0 - 3
78 UINT32 Index
; // offset 4 - 7
79 UINT8 ValidBitStart
; // offset 8
80 UINT8 ValidBitLength
; // offset 9
81 BOOLEAN TestThenWrite
; // offset 10
82 UINT8 Reserved1
; // offset 11
83 UINT32 HighIndex
; // offset 12-15, only valid for MemoryMapped
84 UINT64 Value
; // offset 16-23
85 } CPU_REGISTER_TABLE_ENTRY
;
88 // Register table definition, including current table length,
89 // allocated size of this table, and pointer to the list of table entries.
93 // The number of valid entries in the RegisterTableEntry buffer
96 UINT32 NumberBeforeReset
;
98 // The size, in bytes, of the RegisterTableEntry buffer
100 UINT32 AllocatedSize
;
102 // The initial APIC ID of the CPU this register table applies to
104 UINT32 InitialApicId
;
106 // Physical address of CPU_REGISTER_TABLE_ENTRY structures.
108 EFI_PHYSICAL_ADDRESS RegisterTableEntry
;
109 } CPU_REGISTER_TABLE
;
112 // Data structure that is required for ACPI S3 resume. The PCD
113 // PcdCpuS3DataAddress must be set to the physical address where this structure
118 // Physical address of 4KB buffer allocated below 1MB from memory of type
119 // EfiReservedMemoryType. The buffer is not required to be initialized, but
120 // it is recommended that the buffer be zero-filled. This buffer is used to
121 // wake APs during an ACPI S3 resume.
123 EFI_PHYSICAL_ADDRESS StartupVector
;
125 // Physical address of structure of type IA32_DESCRIPTOR. The
126 // IA32_DESCRIPTOR structure provides the base address and length of a GDT
127 // The GDT must be filled in with the GDT contents that are
128 // used during an ACPI S3 resume. This is typically the contents of the GDT
129 // used by the boot processor when the platform is booted.
131 EFI_PHYSICAL_ADDRESS GdtrProfile
;
133 // Physical address of structure of type IA32_DESCRIPTOR. The
134 // IA32_DESCRIPTOR structure provides the base address and length of an IDT.
135 // The IDT must be filled in with the IDT contents that are
136 // used during an ACPI S3 resume. This is typically the contents of the IDT
137 // used by the boot processor when the platform is booted.
139 EFI_PHYSICAL_ADDRESS IdtrProfile
;
141 // Physical address of a buffer that is used as stacks during ACPI S3 resume.
142 // The total size of this buffer, in bytes, is NumberOfCpus * StackSize. This
143 // structure must be allocated from memory of type EfiACPIMemoryNVS.
145 EFI_PHYSICAL_ADDRESS StackAddress
;
147 // The size, in bytes, of the stack provided to each CPU during ACPI S3 resume.
151 // The number of CPUs. If a platform does not support hot plug CPUs, then
152 // this is the number of CPUs detected when the platform is booted, regardless
153 // of being enabled or disabled. If a platform does support hot plug CPUs,
154 // then this is the maximum number of CPUs that the platform supports.
158 // Physical address of structure of type MTRR_SETTINGS that contains a copy
159 // of the MTRR settings that are compatible with the MTRR settings used by
160 // the boot processor when the platform was booted. These MTRR settings are
161 // used during an ACPI S3 resume.
163 EFI_PHYSICAL_ADDRESS MtrrTable
;
165 // Physical address of an array of CPU_REGISTER_TABLE structures, with
166 // NumberOfCpus entries. If a register table is not required, then the
167 // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
168 // If TableLength is > 0, then elements of RegisterTableEntry are used to
169 // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
170 // before SMBASE relocation is performed.
172 EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable
;
174 // Physical address of an array of CPU_REGISTER_TABLE structures, with
175 // NumberOfCpus entries. If a register table is not required, then the
176 // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.
177 // If TableLength is > 0, then elements of RegisterTableEntry are used to
178 // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,
179 // after SMBASE relocation is performed.
181 EFI_PHYSICAL_ADDRESS RegisterTable
;
183 // Physical address of a buffer that contains the machine check handler that
184 // is used during an ACPI S3 Resume. In order for this machine check
185 // handler to be active on an AP during an ACPI S3 resume, the machine check
186 // vector in the IDT provided by IdtrProfile must be initialized to transfer
187 // control to this physical address.
189 EFI_PHYSICAL_ADDRESS ApMachineCheckHandlerBase
;
191 // The size, in bytes, of the machine check handler that is used during an
192 // ACPI S3 Resume. If this field is 0, then a machine check handler is not
195 UINT32 ApMachineCheckHandlerSize
;
197 // CPU information which is required when set the register table.
199 CPU_STATUS_INFORMATION CpuStatus
;
201 // Location info for each AP.
202 // It points to an array which saves all APs location info.
203 // The array count is the AP count in this CPU.
205 // If the platform does not support MSR setting at S3 resume, and
206 // therefore it doesn't need the dependency semaphores, it should set
209 EFI_PHYSICAL_ADDRESS ApLocation
;