2 STM Resource Descriptor
4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 @par Specification Reference:
14 SMI Transfer Monitor (STM) User Guide Revision 1.00
18 #ifndef _STM_RESOURCE_DESCRIPTOR_H_
19 #define _STM_RESOURCE_DESCRIPTOR_H_
24 STM Resource Descriptor Header
29 UINT16 ReturnStatus
:1;
31 UINT16 IgnoreResource
:1;
32 } STM_RSC_DESC_HEADER
;
35 Define values for the RscType field of #STM_RSC_DESC_HEADER
38 #define END_OF_RESOURCES 0
42 #define MACHINE_SPECIFIC_REG 4
43 #define PCI_CFG_RANGE 5
44 #define TRAPPED_IO_RANGE 6
45 #define ALL_RESOURCES 7
46 #define REGISTER_VIOLATION 8
47 #define MAX_DESC_TYPE 8
51 STM Resource End Descriptor
54 STM_RSC_DESC_HEADER Hdr
;
55 UINT64 ResourceListContinuation
;
59 STM Resource Memory Descriptor
62 STM_RSC_DESC_HEADER Hdr
;
65 UINT32 RWXAttributes
:3;
71 Define values for the RWXAttributes field of #STM_RSC_MEM_DESC
74 #define STM_RSC_MEM_R 0x1
75 #define STM_RSC_MEM_W 0x2
76 #define STM_RSC_MEM_X 0x4
80 STM Resource I/O Descriptor
83 STM_RSC_DESC_HEADER Hdr
;
90 STM Resource MMIO Descriptor
93 STM_RSC_DESC_HEADER Hdr
;
96 UINT32 RWXAttributes
:3;
102 Define values for the RWXAttributes field of #STM_RSC_MMIO_DESC
105 #define STM_RSC_MMIO_R 0x1
106 #define STM_RSC_MMIO_W 0x2
107 #define STM_RSC_MMIO_X 0x4
111 STM Resource MSR Descriptor
114 STM_RSC_DESC_HEADER Hdr
;
116 UINT32 KernelModeProcessing
:1;
123 STM PCI Device Path node used for the PciDevicePath field of
124 #STM_RSC_PCI_CFG_DESC
128 /// Must be 1, indicating Hardware Device Path
132 /// Must be 1, indicating PCI
136 /// sizeof(STM_PCI_DEVICE_PATH_NODE) which is 6
141 } STM_PCI_DEVICE_PATH_NODE
;
144 STM Resource PCI Configuration Descriptor
147 STM_RSC_DESC_HEADER Hdr
;
148 UINT16 RWAttributes
:2;
152 UINT8 OriginatingBusNumber
;
154 STM_PCI_DEVICE_PATH_NODE PciDevicePath
[1];
155 //STM_PCI_DEVICE_PATH_NODE PciDevicePath[LastNodeIndex + 1];
156 } STM_RSC_PCI_CFG_DESC
;
159 Define values for the RWAttributes field of #STM_RSC_PCI_CFG_DESC
162 #define STM_RSC_PCI_CFG_R 0x1
163 #define STM_RSC_PCI_CFG_W 0x2
167 STM Resource Trapped I/O Descriptor
170 STM_RSC_DESC_HEADER Hdr
;
178 } STM_RSC_TRAPPED_IO_DESC
;
181 STM Resource All Descriptor
184 STM_RSC_DESC_HEADER Hdr
;
185 } STM_RSC_ALL_RESOURCES_DESC
;
188 STM Register Volation Descriptor
191 STM_RSC_DESC_HEADER Hdr
;
196 } STM_REGISTER_VIOLATION_DESC
;
199 Enum values for the RWAttributes field of #STM_REGISTER_VIOLATION_DESC
208 } STM_REGISTER_VIOLATION_TYPE
;
211 Union of all STM resource types
214 STM_RSC_DESC_HEADER Header
;
216 STM_RSC_MEM_DESC Mem
;
218 STM_RSC_MMIO_DESC Mmio
;
219 STM_RSC_MSR_DESC Msr
;
220 STM_RSC_PCI_CFG_DESC PciCfg
;
221 STM_RSC_TRAPPED_IO_DESC TrappedIo
;
222 STM_RSC_ALL_RESOURCES_DESC All
;
223 STM_REGISTER_VIOLATION_DESC RegisterViolation
;