2 Ia32 arch definition for CPU Exception Handler Library.
4 Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
10 #define _ARCH_CPU_INTERRUPT_DEFS_H_
13 EFI_SYSTEM_CONTEXT_IA32 SystemContext
;
14 BOOLEAN ExceptionDataFlag
;
16 } EXCEPTION_HANDLER_CONTEXT
;
19 // Register Structure Definitions
22 EFI_STATUS_CODE_DATA Header
;
23 EFI_SYSTEM_CONTEXT_IA32 SystemContext
;
24 } CPU_STATUS_CODE_TEMPLATE
;
30 UINTN ExceptonHandler
;
35 UINT8 HookAfterStubHeaderCode
[HOOKAFTER_STUB_SIZE
];
36 } RESERVED_VECTORS_DATA
;
38 #define CPU_TSS_DESC_SIZE \
39 (sizeof (IA32_TSS_DESCRIPTOR) * \
40 (FixedPcdGetSize (PcdCpuStackSwitchExceptionList) + 1))
42 #define CPU_TSS_SIZE \
43 (sizeof (IA32_TASK_STATE_SEGMENT) * \
44 (FixedPcdGetSize (PcdCpuStackSwitchExceptionList) + 1))