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1 /** @file
2 CPU exception handler library implementation for PEIM module.
3
4 Copyright (c) 2016 - 2022, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
6
7 **/
8
9 #include <PiPei.h>
10 #include "CpuExceptionCommon.h"
11 #include <Library/DebugLib.h>
12 #include <Library/HobLib.h>
13 #include <Library/MemoryAllocationLib.h>
14 #include <Library/PcdLib.h>
15
16 CONST UINTN mDoFarReturnFlag = 0;
17
18 typedef struct {
19 UINT8 ExceptionStubHeader[HOOKAFTER_STUB_SIZE];
20 EXCEPTION_HANDLER_DATA *ExceptionHandlerData;
21 } EXCEPTION0_STUB_HEADER;
22
23 /**
24 Get exception handler data pointer from IDT[0].
25
26 The exception #0 stub header is duplicated in an allocated pool with extra 4-byte/8-byte to store the
27 exception handler data. The new allocated memory layout follows structure EXCEPTION0_STUB_HEADER.
28 The code assumes that all processors uses the same exception handler for #0 exception.
29
30 @return pointer to exception handler data.
31 **/
32 EXCEPTION_HANDLER_DATA *
33 GetExceptionHandlerData (
34 VOID
35 )
36 {
37 IA32_DESCRIPTOR IdtDescriptor;
38 IA32_IDT_GATE_DESCRIPTOR *IdtTable;
39 EXCEPTION0_STUB_HEADER *Exception0StubHeader;
40
41 AsmReadIdtr (&IdtDescriptor);
42 IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
43
44 Exception0StubHeader = (EXCEPTION0_STUB_HEADER *)ArchGetIdtHandler (&IdtTable[0]);
45 return Exception0StubHeader->ExceptionHandlerData;
46 }
47
48 /**
49 Set exception handler data pointer to IDT[0].
50
51 The exception #0 stub header is duplicated in an allocated pool with extra 4-byte/8-byte to store the
52 exception handler data. The new allocated memory layout follows structure EXCEPTION0_STUB_HEADER.
53 The code assumes that all processors uses the same exception handler for #0 exception.
54
55 @param ExceptionHandlerData pointer to exception handler data.
56 **/
57 VOID
58 SetExceptionHandlerData (
59 IN EXCEPTION_HANDLER_DATA *ExceptionHandlerData
60 )
61 {
62 EXCEPTION0_STUB_HEADER *Exception0StubHeader;
63 IA32_DESCRIPTOR IdtDescriptor;
64 IA32_IDT_GATE_DESCRIPTOR *IdtTable;
65
66 //
67 // Duplicate the exception #0 stub header in pool and cache the ExceptionHandlerData just after the stub header.
68 // So AP can get the ExceptionHandlerData by reading the IDT[0].
69 //
70 AsmReadIdtr (&IdtDescriptor);
71 IdtTable = (IA32_IDT_GATE_DESCRIPTOR *)IdtDescriptor.Base;
72
73 Exception0StubHeader = AllocatePool (sizeof (*Exception0StubHeader));
74 ASSERT (Exception0StubHeader != NULL);
75 CopyMem (
76 Exception0StubHeader->ExceptionStubHeader,
77 (VOID *)ArchGetIdtHandler (&IdtTable[0]),
78 sizeof (Exception0StubHeader->ExceptionStubHeader)
79 );
80 Exception0StubHeader->ExceptionHandlerData = ExceptionHandlerData;
81 ArchUpdateIdtEntry (&IdtTable[0], (UINTN)Exception0StubHeader->ExceptionStubHeader);
82 }
83
84 /**
85 Common exception handler.
86
87 @param ExceptionType Exception type.
88 @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.
89 **/
90 VOID
91 EFIAPI
92 CommonExceptionHandler (
93 IN EFI_EXCEPTION_TYPE ExceptionType,
94 IN EFI_SYSTEM_CONTEXT SystemContext
95 )
96 {
97 EXCEPTION_HANDLER_DATA *ExceptionHandlerData;
98
99 ExceptionHandlerData = GetExceptionHandlerData ();
100 CommonExceptionHandlerWorker (ExceptionType, SystemContext, ExceptionHandlerData);
101 }
102
103 /**
104 Initializes all CPU exceptions entries and provides the default exception handlers.
105
106 Caller should try to get an array of interrupt and/or exception vectors that are in use and need to
107 persist by EFI_VECTOR_HANDOFF_INFO defined in PI 1.3 specification.
108 If caller cannot get reserved vector list or it does not exists, set VectorInfo to NULL.
109 If VectorInfo is not NULL, the exception vectors will be initialized per vector attribute accordingly.
110 Note: Before invoking this API, caller must allocate memory for IDT table and load
111 IDTR by AsmWriteIdtr().
112
113 @param[in] VectorInfo Pointer to reserved vector list.
114
115 @retval EFI_SUCCESS CPU Exception Entries have been successfully initialized
116 with default exception handlers.
117 @retval EFI_INVALID_PARAMETER VectorInfo includes the invalid content if VectorInfo is not NULL.
118 @retval EFI_UNSUPPORTED This function is not supported.
119
120 **/
121 EFI_STATUS
122 EFIAPI
123 InitializeCpuExceptionHandlers (
124 IN EFI_VECTOR_HANDOFF_INFO *VectorInfo OPTIONAL
125 )
126 {
127 EFI_STATUS Status;
128 EXCEPTION_HANDLER_DATA *ExceptionHandlerData;
129 RESERVED_VECTORS_DATA *ReservedVectors;
130
131 ReservedVectors = AllocatePool (sizeof (RESERVED_VECTORS_DATA) * CPU_EXCEPTION_NUM);
132 ASSERT (ReservedVectors != NULL);
133
134 ExceptionHandlerData = AllocatePool (sizeof (EXCEPTION_HANDLER_DATA));
135 ASSERT (ExceptionHandlerData != NULL);
136 ExceptionHandlerData->IdtEntryCount = CPU_EXCEPTION_NUM;
137 ExceptionHandlerData->ReservedVectors = ReservedVectors;
138 ExceptionHandlerData->ExternalInterruptHandler = NULL;
139 InitializeSpinLock (&ExceptionHandlerData->DisplayMessageSpinLock);
140
141 Status = InitializeCpuExceptionHandlersWorker (VectorInfo, ExceptionHandlerData);
142 if (EFI_ERROR (Status)) {
143 FreePool (ReservedVectors);
144 FreePool (ExceptionHandlerData);
145 return Status;
146 }
147
148 SetExceptionHandlerData (ExceptionHandlerData);
149 return EFI_SUCCESS;
150 }
151
152 /**
153 Setup separate stacks for certain exception handlers.
154 If the input Buffer and BufferSize are both NULL, use global variable if possible.
155
156 @param[in] Buffer Point to buffer used to separate exception stack.
157 @param[in, out] BufferSize On input, it indicates the byte size of Buffer.
158 If the size is not enough, the return status will
159 be EFI_BUFFER_TOO_SMALL, and output BufferSize
160 will be the size it needs.
161
162 @retval EFI_SUCCESS The stacks are assigned successfully.
163 @retval EFI_UNSUPPORTED This function is not supported.
164 @retval EFI_BUFFER_TOO_SMALL This BufferSize is too small.
165 **/
166 EFI_STATUS
167 EFIAPI
168 InitializeSeparateExceptionStacks (
169 IN VOID *Buffer,
170 IN OUT UINTN *BufferSize
171 )
172 {
173 CPU_EXCEPTION_INIT_DATA EssData;
174 IA32_DESCRIPTOR Idtr;
175 IA32_DESCRIPTOR Gdtr;
176 UINTN NeedBufferSize;
177 UINTN StackTop;
178 UINT8 *NewGdtTable;
179
180 //
181 // X64 needs only one TSS of current task working for all exceptions
182 // because of its IST feature. IA32 needs one TSS for each exception
183 // in addition to current task. To simplify the code, we report the
184 // needed memory for IA32 case to cover both IA32 and X64 exception
185 // stack switch.
186 //
187 // Layout of memory needed for each processor:
188 // --------------------------------
189 // | Alignment | (just in case)
190 // --------------------------------
191 // | |
192 // | Original GDT |
193 // | |
194 // --------------------------------
195 // | Current task descriptor |
196 // --------------------------------
197 // | |
198 // | Exception task descriptors | X ExceptionNumber
199 // | |
200 // --------------------------------
201 // | Current task-state segment |
202 // --------------------------------
203 // | |
204 // | Exception task-state segment | X ExceptionNumber
205 // | |
206 // --------------------------------
207 //
208
209 if ((Buffer == NULL) && (BufferSize == NULL)) {
210 return EFI_UNSUPPORTED;
211 }
212
213 if (BufferSize == NULL) {
214 return EFI_INVALID_PARAMETER;
215 }
216
217 AsmReadGdtr (&Gdtr);
218 //
219 // Total needed size includes stack size, new GDT table size, TSS size.
220 // Add another DESCRIPTOR size for alignment requiremet.
221 //
222 NeedBufferSize = CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE +
223 CPU_TSS_DESC_SIZE + Gdtr.Limit + 1 +
224 CPU_TSS_SIZE +
225 sizeof (IA32_TSS_DESCRIPTOR);
226 if (*BufferSize < NeedBufferSize) {
227 *BufferSize = NeedBufferSize;
228 return EFI_BUFFER_TOO_SMALL;
229 }
230
231 if (Buffer == NULL) {
232 return EFI_INVALID_PARAMETER;
233 }
234
235 StackTop = (UINTN)Buffer + CPU_STACK_SWITCH_EXCEPTION_NUMBER * CPU_KNOWN_GOOD_STACK_SIZE;
236 NewGdtTable = ALIGN_POINTER (StackTop, sizeof (IA32_TSS_DESCRIPTOR));
237
238 AsmReadIdtr (&Idtr);
239 EssData.X64.Revision = CPU_EXCEPTION_INIT_DATA_REV;
240 EssData.X64.KnownGoodStackTop = StackTop;
241 EssData.X64.KnownGoodStackSize = CPU_KNOWN_GOOD_STACK_SIZE;
242 EssData.X64.StackSwitchExceptions = CPU_STACK_SWITCH_EXCEPTION_LIST;
243 EssData.X64.StackSwitchExceptionNumber = CPU_STACK_SWITCH_EXCEPTION_NUMBER;
244 EssData.X64.IdtTable = (VOID *)Idtr.Base;
245 EssData.X64.IdtTableSize = Idtr.Limit + 1;
246 EssData.X64.GdtTable = NewGdtTable;
247 EssData.X64.GdtTableSize = CPU_TSS_DESC_SIZE + Gdtr.Limit + 1;
248 EssData.X64.ExceptionTssDesc = NewGdtTable + Gdtr.Limit + 1;
249 EssData.X64.ExceptionTssDescSize = CPU_TSS_DESC_SIZE;
250 EssData.X64.ExceptionTss = NewGdtTable + Gdtr.Limit + 1 + CPU_TSS_DESC_SIZE;
251 EssData.X64.ExceptionTssSize = CPU_TSS_SIZE;
252
253 return ArchSetupExceptionStack (&EssData);
254 }