1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
3 ; SPDX-License-Identifier: BSD-2-Clause-Patent
11 ; Exception handlers used in SM mode
13 ;-------------------------------------------------------------------------------
15 %include "StuffRsbNasm.inc"
17 global ASM_PFX(gcStmPsd)
19 extern ASM_PFX(SmmStmExceptionHandler)
20 extern ASM_PFX(SmmStmSetup)
21 extern ASM_PFX(SmmStmTeardown)
22 extern ASM_PFX(gStmXdSupported)
23 extern ASM_PFX(gStmSmiHandlerIdtr)
25 %define MSR_IA32_MISC_ENABLE 0x1A0
26 %define MSR_EFER 0xc0000080
27 %define MSR_EFER_XD 0x800
40 DB 0x05 ; Cr4Pse;Cr4Pae;Intel64Mode;ExecutionDisableOutsideSmrr
51 DD ASM_PFX(OnStmSetup)
53 DD ASM_PFX(OnStmTeardown)
55 DQ 0 ; SmmSmiHandlerRip - SMM guest entrypoint
56 DQ 0 ; SmmSmiHandlerRsp
59 DD 0x80010100 ; RequiredStmSmmRevId
60 DD ASM_PFX(OnException)
64 DW 0x01F ; ExceptionFilter
68 DQ 0 ; BiosHwResourceRequirementsPtr
70 DB 0 ; PhysicalAddressBits
71 PSD_SIZE equ $ - ASM_PFX(gcStmPsd)
74 ;------------------------------------------------------------------------------
75 ; SMM Exception handlers
76 ;------------------------------------------------------------------------------
77 global ASM_PFX(OnException)
81 call ASM_PFX(SmmStmExceptionHandler)
89 global ASM_PFX(OnStmSetup)
92 ; Check XD disable bit
95 mov eax, ASM_PFX(gStmXdSupported)
99 mov ecx, MSR_IA32_MISC_ENABLE
101 mov esi, edx ; save MSR_IA32_MISC_ENABLE[63-32]
102 test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34]
104 and dx, 0xFFFB ; clear XD Disable bit if it is set
109 or ax, MSR_EFER_XD ; enable NXE
114 call ASM_PFX(SmmStmSetup)
116 mov eax, ASM_PFX(gStmXdSupported)
120 pop edx ; get saved MSR_IA32_MISC_ENABLE[63-32]
123 mov ecx, MSR_IA32_MISC_ENABLE
125 or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM
132 global ASM_PFX(OnStmTeardown)
133 ASM_PFX(OnStmTeardown):
135 ; Check XD disable bit
138 mov eax, ASM_PFX(gStmXdSupported)
142 mov ecx, MSR_IA32_MISC_ENABLE
144 mov esi, edx ; save MSR_IA32_MISC_ENABLE[63-32]
145 test edx, BIT2 ; MSR_IA32_MISC_ENABLE[34]
147 and dx, 0xFFFB ; clear XD Disable bit if it is set
152 or ax, MSR_EFER_XD ; enable NXE
157 call ASM_PFX(SmmStmTeardown)
159 mov eax, ASM_PFX(gStmXdSupported)
163 pop edx ; get saved MSR_IA32_MISC_ENABLE[63-32]
166 mov ecx, MSR_IA32_MISC_ENABLE
168 or dx, BIT2 ; set XD Disable bit if it was set before entering into SMM