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UefiCpuPkg: Fix potential spinLock issue in SmmStartupThisAp
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1 /** @file
2 SMM MP service implementation
3
4 Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #include "PiSmmCpuDxeSmm.h"
12
13 //
14 // Slots for all MTRR( FIXED MTRR + VARIABLE MTRR + MTRR_LIB_IA32_MTRR_DEF_TYPE)
15 //
16 MTRR_SETTINGS gSmiMtrrs;
17 UINT64 gPhyMask;
18 SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData = NULL;
19 UINTN mSmmMpSyncDataSize;
20 SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
21 UINTN mSemaphoreSize;
22 SPIN_LOCK *mPFLock = NULL;
23 SMM_CPU_SYNC_MODE mCpuSmmSyncMode;
24 BOOLEAN mMachineCheckSupported = FALSE;
25
26 /**
27 Performs an atomic compare exchange operation to get semaphore.
28 The compare exchange operation must be performed using
29 MP safe mechanisms.
30
31 @param Sem IN: 32-bit unsigned integer
32 OUT: original integer - 1
33 @return Original integer - 1
34
35 **/
36 UINT32
37 WaitForSemaphore (
38 IN OUT volatile UINT32 *Sem
39 )
40 {
41 UINT32 Value;
42
43 do {
44 Value = *Sem;
45 } while (Value == 0 ||
46 InterlockedCompareExchange32 (
47 (UINT32*)Sem,
48 Value,
49 Value - 1
50 ) != Value);
51 return Value - 1;
52 }
53
54
55 /**
56 Performs an atomic compare exchange operation to release semaphore.
57 The compare exchange operation must be performed using
58 MP safe mechanisms.
59
60 @param Sem IN: 32-bit unsigned integer
61 OUT: original integer + 1
62 @return Original integer + 1
63
64 **/
65 UINT32
66 ReleaseSemaphore (
67 IN OUT volatile UINT32 *Sem
68 )
69 {
70 UINT32 Value;
71
72 do {
73 Value = *Sem;
74 } while (Value + 1 != 0 &&
75 InterlockedCompareExchange32 (
76 (UINT32*)Sem,
77 Value,
78 Value + 1
79 ) != Value);
80 return Value + 1;
81 }
82
83 /**
84 Performs an atomic compare exchange operation to lock semaphore.
85 The compare exchange operation must be performed using
86 MP safe mechanisms.
87
88 @param Sem IN: 32-bit unsigned integer
89 OUT: -1
90 @return Original integer
91
92 **/
93 UINT32
94 LockdownSemaphore (
95 IN OUT volatile UINT32 *Sem
96 )
97 {
98 UINT32 Value;
99
100 do {
101 Value = *Sem;
102 } while (InterlockedCompareExchange32 (
103 (UINT32*)Sem,
104 Value, (UINT32)-1
105 ) != Value);
106 return Value;
107 }
108
109 /**
110 Wait all APs to performs an atomic compare exchange operation to release semaphore.
111
112 @param NumberOfAPs AP number
113
114 **/
115 VOID
116 WaitForAllAPs (
117 IN UINTN NumberOfAPs
118 )
119 {
120 UINTN BspIndex;
121
122 BspIndex = mSmmMpSyncData->BspIndex;
123 while (NumberOfAPs-- > 0) {
124 WaitForSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
125 }
126 }
127
128 /**
129 Performs an atomic compare exchange operation to release semaphore
130 for each AP.
131
132 **/
133 VOID
134 ReleaseAllAPs (
135 VOID
136 )
137 {
138 UINTN Index;
139
140 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
141 if (IsPresentAp (Index)) {
142 ReleaseSemaphore (mSmmMpSyncData->CpuData[Index].Run);
143 }
144 }
145 }
146
147 /**
148 Checks if all CPUs (with certain exceptions) have checked in for this SMI run
149
150 @param Exceptions CPU Arrival exception flags.
151
152 @retval TRUE if all CPUs the have checked in.
153 @retval FALSE if at least one Normal AP hasn't checked in.
154
155 **/
156 BOOLEAN
157 AllCpusInSmmWithExceptions (
158 SMM_CPU_ARRIVAL_EXCEPTIONS Exceptions
159 )
160 {
161 UINTN Index;
162 SMM_CPU_DATA_BLOCK *CpuData;
163 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
164
165 ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);
166
167 if (*mSmmMpSyncData->Counter == mNumberOfCpus) {
168 return TRUE;
169 }
170
171 CpuData = mSmmMpSyncData->CpuData;
172 ProcessorInfo = gSmmCpuPrivate->ProcessorInfo;
173 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
174 if (!(*(CpuData[Index].Present)) && ProcessorInfo[Index].ProcessorId != INVALID_APIC_ID) {
175 if (((Exceptions & ARRIVAL_EXCEPTION_DELAYED) != 0) && SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmDelayed) != 0) {
176 continue;
177 }
178 if (((Exceptions & ARRIVAL_EXCEPTION_BLOCKED) != 0) && SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmBlocked) != 0) {
179 continue;
180 }
181 if (((Exceptions & ARRIVAL_EXCEPTION_SMI_DISABLED) != 0) && SmmCpuFeaturesGetSmmRegister (Index, SmmRegSmmEnable) != 0) {
182 continue;
183 }
184 return FALSE;
185 }
186 }
187
188
189 return TRUE;
190 }
191
192 /**
193 Has OS enabled Lmce in the MSR_IA32_MCG_EXT_CTL
194
195 @retval TRUE Os enable lmce.
196 @retval FALSE Os not enable lmce.
197
198 **/
199 BOOLEAN
200 IsLmceOsEnabled (
201 VOID
202 )
203 {
204 MSR_IA32_MCG_CAP_REGISTER McgCap;
205 MSR_IA32_FEATURE_CONTROL_REGISTER FeatureCtrl;
206 MSR_IA32_MCG_EXT_CTL_REGISTER McgExtCtrl;
207
208 McgCap.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_CAP);
209 if (McgCap.Bits.MCG_LMCE_P == 0) {
210 return FALSE;
211 }
212
213 FeatureCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_FEATURE_CONTROL);
214 if (FeatureCtrl.Bits.LmceOn == 0) {
215 return FALSE;
216 }
217
218 McgExtCtrl.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_EXT_CTL);
219 return (BOOLEAN) (McgExtCtrl.Bits.LMCE_EN == 1);
220 }
221
222 /**
223 Return if Local machine check exception signaled.
224
225 Indicates (when set) that a local machine check exception was generated. This indicates that the current machine-check event was
226 delivered to only the logical processor.
227
228 @retval TRUE LMCE was signaled.
229 @retval FALSE LMCE was not signaled.
230
231 **/
232 BOOLEAN
233 IsLmceSignaled (
234 VOID
235 )
236 {
237 MSR_IA32_MCG_STATUS_REGISTER McgStatus;
238
239 McgStatus.Uint64 = AsmReadMsr64 (MSR_IA32_MCG_STATUS);
240 return (BOOLEAN) (McgStatus.Bits.LMCE_S == 1);
241 }
242
243 /**
244 Given timeout constraint, wait for all APs to arrive, and insure when this function returns, no AP will execute normal mode code before
245 entering SMM, except SMI disabled APs.
246
247 **/
248 VOID
249 SmmWaitForApArrival (
250 VOID
251 )
252 {
253 UINT64 Timer;
254 UINTN Index;
255 BOOLEAN LmceEn;
256 BOOLEAN LmceSignal;
257
258 ASSERT (*mSmmMpSyncData->Counter <= mNumberOfCpus);
259
260 LmceEn = FALSE;
261 LmceSignal = FALSE;
262 if (mMachineCheckSupported) {
263 LmceEn = IsLmceOsEnabled ();
264 LmceSignal = IsLmceSignaled();
265 }
266
267 //
268 // Platform implementor should choose a timeout value appropriately:
269 // - The timeout value should balance the SMM time constrains and the likelihood that delayed CPUs are excluded in the SMM run. Note
270 // the SMI Handlers must ALWAYS take into account the cases that not all APs are available in an SMI run.
271 // - The timeout value must, in the case of 2nd timeout, be at least long enough to give time for all APs to receive the SMI IPI
272 // and either enter SMM or buffer the SMI, to insure there is no CPU running normal mode code when SMI handling starts. This will
273 // be TRUE even if a blocked CPU is brought out of the blocked state by a normal mode CPU (before the normal mode CPU received the
274 // SMI IPI), because with a buffered SMI, and CPU will enter SMM immediately after it is brought out of the blocked state.
275 // - The timeout value must be longer than longest possible IO operation in the system
276 //
277
278 //
279 // Sync with APs 1st timeout
280 //
281 for (Timer = StartSyncTimer ();
282 !IsSyncTimerTimeout (Timer) && !(LmceEn && LmceSignal) &&
283 !AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED );
284 ) {
285 CpuPause ();
286 }
287
288 //
289 // Not all APs have arrived, so we need 2nd round of timeout. IPIs should be sent to ALL none present APs,
290 // because:
291 // a) Delayed AP may have just come out of the delayed state. Blocked AP may have just been brought out of blocked state by some AP running
292 // normal mode code. These APs need to be guaranteed to have an SMI pending to insure that once they are out of delayed / blocked state, they
293 // enter SMI immediately without executing instructions in normal mode. Note traditional flow requires there are no APs doing normal mode
294 // work while SMI handling is on-going.
295 // b) As a consequence of SMI IPI sending, (spurious) SMI may occur after this SMM run.
296 // c) ** NOTE **: Use SMI disabling feature VERY CAREFULLY (if at all) for traditional flow, because a processor in SMI-disabled state
297 // will execute normal mode code, which breaks the traditional SMI handlers' assumption that no APs are doing normal
298 // mode work while SMI handling is on-going.
299 // d) We don't add code to check SMI disabling status to skip sending IPI to SMI disabled APs, because:
300 // - In traditional flow, SMI disabling is discouraged.
301 // - In relaxed flow, CheckApArrival() will check SMI disabling status before calling this function.
302 // In both cases, adding SMI-disabling checking code increases overhead.
303 //
304 if (*mSmmMpSyncData->Counter < mNumberOfCpus) {
305 //
306 // Send SMI IPIs to bring outside processors in
307 //
308 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
309 if (!(*(mSmmMpSyncData->CpuData[Index].Present)) && gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId != INVALID_APIC_ID) {
310 SendSmiIpi ((UINT32)gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId);
311 }
312 }
313
314 //
315 // Sync with APs 2nd timeout.
316 //
317 for (Timer = StartSyncTimer ();
318 !IsSyncTimerTimeout (Timer) &&
319 !AllCpusInSmmWithExceptions (ARRIVAL_EXCEPTION_BLOCKED | ARRIVAL_EXCEPTION_SMI_DISABLED );
320 ) {
321 CpuPause ();
322 }
323 }
324
325 return;
326 }
327
328
329 /**
330 Replace OS MTRR's with SMI MTRR's.
331
332 @param CpuIndex Processor Index
333
334 **/
335 VOID
336 ReplaceOSMtrrs (
337 IN UINTN CpuIndex
338 )
339 {
340 SmmCpuFeaturesDisableSmrr ();
341
342 //
343 // Replace all MTRRs registers
344 //
345 MtrrSetAllMtrrs (&gSmiMtrrs);
346 }
347
348 /**
349 Wheck whether task has been finished by all APs.
350
351 @param BlockMode Whether did it in block mode or non-block mode.
352
353 @retval TRUE Task has been finished by all APs.
354 @retval FALSE Task not has been finished by all APs.
355
356 **/
357 BOOLEAN
358 WaitForAllAPsNotBusy (
359 IN BOOLEAN BlockMode
360 )
361 {
362 UINTN Index;
363
364 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
365 //
366 // Ignore BSP and APs which not call in SMM.
367 //
368 if (!IsPresentAp(Index)) {
369 continue;
370 }
371
372 if (BlockMode) {
373 AcquireSpinLock(mSmmMpSyncData->CpuData[Index].Busy);
374 ReleaseSpinLock(mSmmMpSyncData->CpuData[Index].Busy);
375 } else {
376 if (AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[Index].Busy)) {
377 ReleaseSpinLock(mSmmMpSyncData->CpuData[Index].Busy);
378 } else {
379 return FALSE;
380 }
381 }
382 }
383
384 return TRUE;
385 }
386
387 /**
388 Check whether it is an present AP.
389
390 @param CpuIndex The AP index which calls this function.
391
392 @retval TRUE It's a present AP.
393 @retval TRUE This is not an AP or it is not present.
394
395 **/
396 BOOLEAN
397 IsPresentAp (
398 IN UINTN CpuIndex
399 )
400 {
401 return ((CpuIndex != gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) &&
402 *(mSmmMpSyncData->CpuData[CpuIndex].Present));
403 }
404
405 /**
406 Check whether execute in single AP or all APs.
407
408 Compare two Tokens used by different APs to know whether in StartAllAps call.
409
410 Whether is an valid AP base on AP's Present flag.
411
412 @retval TRUE IN StartAllAps call.
413 @retval FALSE Not in StartAllAps call.
414
415 **/
416 BOOLEAN
417 InStartAllApsCall (
418 VOID
419 )
420 {
421 UINTN ApIndex;
422 UINTN ApIndex2;
423
424 for (ApIndex = mMaxNumberOfCpus; ApIndex-- > 0;) {
425 if (IsPresentAp (ApIndex) && (mSmmMpSyncData->CpuData[ApIndex].Token != NULL)) {
426 for (ApIndex2 = ApIndex; ApIndex2-- > 0;) {
427 if (IsPresentAp (ApIndex2) && (mSmmMpSyncData->CpuData[ApIndex2].Token != NULL)) {
428 return mSmmMpSyncData->CpuData[ApIndex2].Token == mSmmMpSyncData->CpuData[ApIndex].Token;
429 }
430 }
431 }
432 }
433
434 return FALSE;
435 }
436
437 /**
438 Clean up the status flags used during executing the procedure.
439
440 @param CpuIndex The AP index which calls this function.
441
442 **/
443 VOID
444 ReleaseToken (
445 IN UINTN CpuIndex
446 )
447 {
448 UINTN Index;
449 BOOLEAN Released;
450
451 if (InStartAllApsCall ()) {
452 //
453 // In Start All APs mode, make sure all APs have finished task.
454 //
455 if (WaitForAllAPsNotBusy (FALSE)) {
456 //
457 // Clean the flags update in the function call.
458 //
459 Released = FALSE;
460 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
461 //
462 // Only In SMM APs need to be clean up.
463 //
464 if (mSmmMpSyncData->CpuData[Index].Present && mSmmMpSyncData->CpuData[Index].Token != NULL) {
465 if (!Released) {
466 ReleaseSpinLock (mSmmMpSyncData->CpuData[Index].Token);
467 Released = TRUE;
468 }
469 mSmmMpSyncData->CpuData[Index].Token = NULL;
470 }
471 }
472 }
473 } else {
474 //
475 // In single AP mode.
476 //
477 if (mSmmMpSyncData->CpuData[CpuIndex].Token != NULL) {
478 ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Token);
479 mSmmMpSyncData->CpuData[CpuIndex].Token = NULL;
480 }
481 }
482 }
483
484 /**
485 Free the tokens in the maintained list.
486
487 **/
488 VOID
489 FreeTokens (
490 VOID
491 )
492 {
493 LIST_ENTRY *Link;
494 PROCEDURE_TOKEN *ProcToken;
495
496 while (!IsListEmpty (&gSmmCpuPrivate->TokenList)) {
497 Link = GetFirstNode (&gSmmCpuPrivate->TokenList);
498 ProcToken = PROCEDURE_TOKEN_FROM_LINK (Link);
499
500 RemoveEntryList (&ProcToken->Link);
501
502 FreePool ((VOID *)ProcToken->ProcedureToken);
503 FreePool (ProcToken);
504 }
505 }
506
507 /**
508 SMI handler for BSP.
509
510 @param CpuIndex BSP processor Index
511 @param SyncMode SMM MP sync mode
512
513 **/
514 VOID
515 BSPHandler (
516 IN UINTN CpuIndex,
517 IN SMM_CPU_SYNC_MODE SyncMode
518 )
519 {
520 UINTN Index;
521 MTRR_SETTINGS Mtrrs;
522 UINTN ApCount;
523 BOOLEAN ClearTopLevelSmiResult;
524 UINTN PresentCount;
525
526 ASSERT (CpuIndex == mSmmMpSyncData->BspIndex);
527 ApCount = 0;
528
529 //
530 // Flag BSP's presence
531 //
532 *mSmmMpSyncData->InsideSmm = TRUE;
533
534 //
535 // Initialize Debug Agent to start source level debug in BSP handler
536 //
537 InitializeDebugAgent (DEBUG_AGENT_INIT_ENTER_SMI, NULL, NULL);
538
539 //
540 // Mark this processor's presence
541 //
542 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = TRUE;
543
544 //
545 // Clear platform top level SMI status bit before calling SMI handlers. If
546 // we cleared it after SMI handlers are run, we would miss the SMI that
547 // occurs after SMI handlers are done and before SMI status bit is cleared.
548 //
549 ClearTopLevelSmiResult = ClearTopLevelSmiStatus();
550 ASSERT (ClearTopLevelSmiResult == TRUE);
551
552 //
553 // Set running processor index
554 //
555 gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu = CpuIndex;
556
557 //
558 // If Traditional Sync Mode or need to configure MTRRs: gather all available APs.
559 //
560 if (SyncMode == SmmCpuSyncModeTradition || SmmCpuFeaturesNeedConfigureMtrrs()) {
561
562 //
563 // Wait for APs to arrive
564 //
565 SmmWaitForApArrival();
566
567 //
568 // Lock the counter down and retrieve the number of APs
569 //
570 *mSmmMpSyncData->AllCpusInSync = TRUE;
571 ApCount = LockdownSemaphore (mSmmMpSyncData->Counter) - 1;
572
573 //
574 // Wait for all APs to get ready for programming MTRRs
575 //
576 WaitForAllAPs (ApCount);
577
578 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
579 //
580 // Signal all APs it's time for backup MTRRs
581 //
582 ReleaseAllAPs ();
583
584 //
585 // WaitForSemaphore() may wait for ever if an AP happens to enter SMM at
586 // exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set
587 // to a large enough value to avoid this situation.
588 // Note: For HT capable CPUs, threads within a core share the same set of MTRRs.
589 // We do the backup first and then set MTRR to avoid race condition for threads
590 // in the same core.
591 //
592 MtrrGetAllMtrrs(&Mtrrs);
593
594 //
595 // Wait for all APs to complete their MTRR saving
596 //
597 WaitForAllAPs (ApCount);
598
599 //
600 // Let all processors program SMM MTRRs together
601 //
602 ReleaseAllAPs ();
603
604 //
605 // WaitForSemaphore() may wait for ever if an AP happens to enter SMM at
606 // exactly this point. Please make sure PcdCpuSmmMaxSyncLoops has been set
607 // to a large enough value to avoid this situation.
608 //
609 ReplaceOSMtrrs (CpuIndex);
610
611 //
612 // Wait for all APs to complete their MTRR programming
613 //
614 WaitForAllAPs (ApCount);
615 }
616 }
617
618 //
619 // The BUSY lock is initialized to Acquired state
620 //
621 AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
622
623 //
624 // Perform the pre tasks
625 //
626 PerformPreTasks ();
627
628 //
629 // Invoke SMM Foundation EntryPoint with the processor information context.
630 //
631 gSmmCpuPrivate->SmmCoreEntry (&gSmmCpuPrivate->SmmCoreEntryContext);
632
633 //
634 // Make sure all APs have completed their pending none-block tasks
635 //
636 WaitForAllAPsNotBusy (TRUE);
637
638 //
639 // Perform the remaining tasks
640 //
641 PerformRemainingTasks ();
642
643 //
644 // If Relaxed-AP Sync Mode: gather all available APs after BSP SMM handlers are done, and
645 // make those APs to exit SMI synchronously. APs which arrive later will be excluded and
646 // will run through freely.
647 //
648 if (SyncMode != SmmCpuSyncModeTradition && !SmmCpuFeaturesNeedConfigureMtrrs()) {
649
650 //
651 // Lock the counter down and retrieve the number of APs
652 //
653 *mSmmMpSyncData->AllCpusInSync = TRUE;
654 ApCount = LockdownSemaphore (mSmmMpSyncData->Counter) - 1;
655 //
656 // Make sure all APs have their Present flag set
657 //
658 while (TRUE) {
659 PresentCount = 0;
660 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
661 if (*(mSmmMpSyncData->CpuData[Index].Present)) {
662 PresentCount ++;
663 }
664 }
665 if (PresentCount > ApCount) {
666 break;
667 }
668 }
669 }
670
671 //
672 // Notify all APs to exit
673 //
674 *mSmmMpSyncData->InsideSmm = FALSE;
675 ReleaseAllAPs ();
676
677 //
678 // Wait for all APs to complete their pending tasks
679 //
680 WaitForAllAPs (ApCount);
681
682 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
683 //
684 // Signal APs to restore MTRRs
685 //
686 ReleaseAllAPs ();
687
688 //
689 // Restore OS MTRRs
690 //
691 SmmCpuFeaturesReenableSmrr ();
692 MtrrSetAllMtrrs(&Mtrrs);
693
694 //
695 // Wait for all APs to complete MTRR programming
696 //
697 WaitForAllAPs (ApCount);
698 }
699
700 //
701 // Stop source level debug in BSP handler, the code below will not be
702 // debugged.
703 //
704 InitializeDebugAgent (DEBUG_AGENT_INIT_EXIT_SMI, NULL, NULL);
705
706 //
707 // Signal APs to Reset states/semaphore for this processor
708 //
709 ReleaseAllAPs ();
710
711 //
712 // Perform pending operations for hot-plug
713 //
714 SmmCpuUpdate ();
715
716 //
717 // Clear the Present flag of BSP
718 //
719 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;
720
721 //
722 // Gather APs to exit SMM synchronously. Note the Present flag is cleared by now but
723 // WaitForAllAps does not depend on the Present flag.
724 //
725 WaitForAllAPs (ApCount);
726
727 //
728 // Clean the tokens buffer.
729 //
730 FreeTokens ();
731
732 //
733 // Reset BspIndex to -1, meaning BSP has not been elected.
734 //
735 if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {
736 mSmmMpSyncData->BspIndex = (UINT32)-1;
737 }
738
739 //
740 // Allow APs to check in from this point on
741 //
742 *mSmmMpSyncData->Counter = 0;
743 *mSmmMpSyncData->AllCpusInSync = FALSE;
744 }
745
746 /**
747 SMI handler for AP.
748
749 @param CpuIndex AP processor Index.
750 @param ValidSmi Indicates that current SMI is a valid SMI or not.
751 @param SyncMode SMM MP sync mode.
752
753 **/
754 VOID
755 APHandler (
756 IN UINTN CpuIndex,
757 IN BOOLEAN ValidSmi,
758 IN SMM_CPU_SYNC_MODE SyncMode
759 )
760 {
761 UINT64 Timer;
762 UINTN BspIndex;
763 MTRR_SETTINGS Mtrrs;
764 EFI_STATUS ProcedureStatus;
765
766 //
767 // Timeout BSP
768 //
769 for (Timer = StartSyncTimer ();
770 !IsSyncTimerTimeout (Timer) &&
771 !(*mSmmMpSyncData->InsideSmm);
772 ) {
773 CpuPause ();
774 }
775
776 if (!(*mSmmMpSyncData->InsideSmm)) {
777 //
778 // BSP timeout in the first round
779 //
780 if (mSmmMpSyncData->BspIndex != -1) {
781 //
782 // BSP Index is known
783 //
784 BspIndex = mSmmMpSyncData->BspIndex;
785 ASSERT (CpuIndex != BspIndex);
786
787 //
788 // Send SMI IPI to bring BSP in
789 //
790 SendSmiIpi ((UINT32)gSmmCpuPrivate->ProcessorInfo[BspIndex].ProcessorId);
791
792 //
793 // Now clock BSP for the 2nd time
794 //
795 for (Timer = StartSyncTimer ();
796 !IsSyncTimerTimeout (Timer) &&
797 !(*mSmmMpSyncData->InsideSmm);
798 ) {
799 CpuPause ();
800 }
801
802 if (!(*mSmmMpSyncData->InsideSmm)) {
803 //
804 // Give up since BSP is unable to enter SMM
805 // and signal the completion of this AP
806 WaitForSemaphore (mSmmMpSyncData->Counter);
807 return;
808 }
809 } else {
810 //
811 // Don't know BSP index. Give up without sending IPI to BSP.
812 //
813 WaitForSemaphore (mSmmMpSyncData->Counter);
814 return;
815 }
816 }
817
818 //
819 // BSP is available
820 //
821 BspIndex = mSmmMpSyncData->BspIndex;
822 ASSERT (CpuIndex != BspIndex);
823
824 //
825 // Mark this processor's presence
826 //
827 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = TRUE;
828
829 if (SyncMode == SmmCpuSyncModeTradition || SmmCpuFeaturesNeedConfigureMtrrs()) {
830 //
831 // Notify BSP of arrival at this point
832 //
833 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
834 }
835
836 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
837 //
838 // Wait for the signal from BSP to backup MTRRs
839 //
840 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
841
842 //
843 // Backup OS MTRRs
844 //
845 MtrrGetAllMtrrs(&Mtrrs);
846
847 //
848 // Signal BSP the completion of this AP
849 //
850 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
851
852 //
853 // Wait for BSP's signal to program MTRRs
854 //
855 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
856
857 //
858 // Replace OS MTRRs with SMI MTRRs
859 //
860 ReplaceOSMtrrs (CpuIndex);
861
862 //
863 // Signal BSP the completion of this AP
864 //
865 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
866 }
867
868 while (TRUE) {
869 //
870 // Wait for something to happen
871 //
872 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
873
874 //
875 // Check if BSP wants to exit SMM
876 //
877 if (!(*mSmmMpSyncData->InsideSmm)) {
878 break;
879 }
880
881 //
882 // BUSY should be acquired by SmmStartupThisAp()
883 //
884 ASSERT (
885 !AcquireSpinLockOrFail (mSmmMpSyncData->CpuData[CpuIndex].Busy)
886 );
887
888 //
889 // Invoke the scheduled procedure
890 //
891 ProcedureStatus = (*mSmmMpSyncData->CpuData[CpuIndex].Procedure) (
892 (VOID*)mSmmMpSyncData->CpuData[CpuIndex].Parameter
893 );
894 if (mSmmMpSyncData->CpuData[CpuIndex].Status != NULL) {
895 *mSmmMpSyncData->CpuData[CpuIndex].Status = ProcedureStatus;
896 }
897
898 //
899 // Release BUSY
900 //
901 ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
902
903 ReleaseToken (CpuIndex);
904 }
905
906 if (SmmCpuFeaturesNeedConfigureMtrrs()) {
907 //
908 // Notify BSP the readiness of this AP to program MTRRs
909 //
910 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
911
912 //
913 // Wait for the signal from BSP to program MTRRs
914 //
915 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
916
917 //
918 // Restore OS MTRRs
919 //
920 SmmCpuFeaturesReenableSmrr ();
921 MtrrSetAllMtrrs(&Mtrrs);
922 }
923
924 //
925 // Notify BSP the readiness of this AP to Reset states/semaphore for this processor
926 //
927 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
928
929 //
930 // Wait for the signal from BSP to Reset states/semaphore for this processor
931 //
932 WaitForSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
933
934 //
935 // Reset states/semaphore for this processor
936 //
937 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;
938
939 //
940 // Notify BSP the readiness of this AP to exit SMM
941 //
942 ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run);
943
944 }
945
946 /**
947 Create 4G PageTable in SMRAM.
948
949 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
950 @return PageTable Address
951
952 **/
953 UINT32
954 Gen4GPageTable (
955 IN BOOLEAN Is32BitPageTable
956 )
957 {
958 VOID *PageTable;
959 UINTN Index;
960 UINT64 *Pte;
961 UINTN PagesNeeded;
962 UINTN Low2MBoundary;
963 UINTN High2MBoundary;
964 UINTN Pages;
965 UINTN GuardPage;
966 UINT64 *Pdpte;
967 UINTN PageIndex;
968 UINTN PageAddress;
969
970 Low2MBoundary = 0;
971 High2MBoundary = 0;
972 PagesNeeded = 0;
973 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {
974 //
975 // Add one more page for known good stack, then find the lower 2MB aligned address.
976 //
977 Low2MBoundary = (mSmmStackArrayBase + EFI_PAGE_SIZE) & ~(SIZE_2MB-1);
978 //
979 // Add two more pages for known good stack and stack guard page,
980 // then find the lower 2MB aligned address.
981 //
982 High2MBoundary = (mSmmStackArrayEnd - mSmmStackSize + EFI_PAGE_SIZE * 2) & ~(SIZE_2MB-1);
983 PagesNeeded = ((High2MBoundary - Low2MBoundary) / SIZE_2MB) + 1;
984 }
985 //
986 // Allocate the page table
987 //
988 PageTable = AllocatePageTableMemory (5 + PagesNeeded);
989 ASSERT (PageTable != NULL);
990
991 PageTable = (VOID *)((UINTN)PageTable);
992 Pte = (UINT64*)PageTable;
993
994 //
995 // Zero out all page table entries first
996 //
997 ZeroMem (Pte, EFI_PAGES_TO_SIZE (1));
998
999 //
1000 // Set Page Directory Pointers
1001 //
1002 for (Index = 0; Index < 4; Index++) {
1003 Pte[Index] = ((UINTN)PageTable + EFI_PAGE_SIZE * (Index + 1)) | mAddressEncMask |
1004 (Is32BitPageTable ? IA32_PAE_PDPTE_ATTRIBUTE_BITS : PAGE_ATTRIBUTE_BITS);
1005 }
1006 Pte += EFI_PAGE_SIZE / sizeof (*Pte);
1007
1008 //
1009 // Fill in Page Directory Entries
1010 //
1011 for (Index = 0; Index < EFI_PAGE_SIZE * 4 / sizeof (*Pte); Index++) {
1012 Pte[Index] = (Index << 21) | mAddressEncMask | IA32_PG_PS | PAGE_ATTRIBUTE_BITS;
1013 }
1014
1015 Pdpte = (UINT64*)PageTable;
1016 if (FeaturePcdGet (PcdCpuSmmStackGuard)) {
1017 Pages = (UINTN)PageTable + EFI_PAGES_TO_SIZE (5);
1018 GuardPage = mSmmStackArrayBase + EFI_PAGE_SIZE;
1019 for (PageIndex = Low2MBoundary; PageIndex <= High2MBoundary; PageIndex += SIZE_2MB) {
1020 Pte = (UINT64*)(UINTN)(Pdpte[BitFieldRead32 ((UINT32)PageIndex, 30, 31)] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));
1021 Pte[BitFieldRead32 ((UINT32)PageIndex, 21, 29)] = (UINT64)Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS;
1022 //
1023 // Fill in Page Table Entries
1024 //
1025 Pte = (UINT64*)Pages;
1026 PageAddress = PageIndex;
1027 for (Index = 0; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) {
1028 if (PageAddress == GuardPage) {
1029 //
1030 // Mark the guard page as non-present
1031 //
1032 Pte[Index] = PageAddress | mAddressEncMask;
1033 GuardPage += mSmmStackSize;
1034 if (GuardPage > mSmmStackArrayEnd) {
1035 GuardPage = 0;
1036 }
1037 } else {
1038 Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS;
1039 }
1040 PageAddress+= EFI_PAGE_SIZE;
1041 }
1042 Pages += EFI_PAGE_SIZE;
1043 }
1044 }
1045
1046 if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0) {
1047 Pte = (UINT64*)(UINTN)(Pdpte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));
1048 if ((Pte[0] & IA32_PG_PS) == 0) {
1049 // 4K-page entries are already mapped. Just hide the first one anyway.
1050 Pte = (UINT64*)(UINTN)(Pte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1));
1051 Pte[0] &= ~(UINT64)IA32_PG_P; // Hide page 0
1052 } else {
1053 // Create 4K-page entries
1054 Pages = (UINTN)AllocatePageTableMemory (1);
1055 ASSERT (Pages != 0);
1056
1057 Pte[0] = (UINT64)(Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS);
1058
1059 Pte = (UINT64*)Pages;
1060 PageAddress = 0;
1061 Pte[0] = PageAddress | mAddressEncMask; // Hide page 0 but present left
1062 for (Index = 1; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) {
1063 PageAddress += EFI_PAGE_SIZE;
1064 Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS;
1065 }
1066 }
1067 }
1068
1069 return (UINT32)(UINTN)PageTable;
1070 }
1071
1072 /**
1073 Checks whether the input token is the current used token.
1074
1075 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1076 BroadcastProcedure.
1077
1078 @retval TRUE The input token is the current used token.
1079 @retval FALSE The input token is not the current used token.
1080 **/
1081 BOOLEAN
1082 IsTokenInUse (
1083 IN SPIN_LOCK *Token
1084 )
1085 {
1086 LIST_ENTRY *Link;
1087 PROCEDURE_TOKEN *ProcToken;
1088
1089 if (Token == NULL) {
1090 return FALSE;
1091 }
1092
1093 Link = GetFirstNode (&gSmmCpuPrivate->TokenList);
1094 while (!IsNull (&gSmmCpuPrivate->TokenList, Link)) {
1095 ProcToken = PROCEDURE_TOKEN_FROM_LINK (Link);
1096
1097 if (ProcToken->ProcedureToken == Token) {
1098 return TRUE;
1099 }
1100
1101 Link = GetNextNode (&gSmmCpuPrivate->TokenList, Link);
1102 }
1103
1104 return FALSE;
1105 }
1106
1107 /**
1108 create token and save it to the maintain list.
1109
1110 @retval return the spin lock used as token.
1111
1112 **/
1113 SPIN_LOCK *
1114 CreateToken (
1115 VOID
1116 )
1117 {
1118 PROCEDURE_TOKEN *ProcToken;
1119 SPIN_LOCK *CpuToken;
1120 UINTN SpinLockSize;
1121
1122 SpinLockSize = GetSpinLockProperties ();
1123 CpuToken = AllocatePool (SpinLockSize);
1124 ASSERT (CpuToken != NULL);
1125 InitializeSpinLock (CpuToken);
1126 AcquireSpinLock (CpuToken);
1127
1128 ProcToken = AllocatePool (sizeof (PROCEDURE_TOKEN));
1129 ASSERT (ProcToken != NULL);
1130 ProcToken->Signature = PROCEDURE_TOKEN_SIGNATURE;
1131 ProcToken->ProcedureToken = CpuToken;
1132
1133 InsertTailList (&gSmmCpuPrivate->TokenList, &ProcToken->Link);
1134
1135 return CpuToken;
1136 }
1137
1138 /**
1139 Checks status of specified AP.
1140
1141 This function checks whether the specified AP has finished the task assigned
1142 by StartupThisAP(), and whether timeout expires.
1143
1144 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1145 BroadcastProcedure.
1146
1147 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().
1148 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.
1149 **/
1150 EFI_STATUS
1151 IsApReady (
1152 IN SPIN_LOCK *Token
1153 )
1154 {
1155 if (AcquireSpinLockOrFail (Token)) {
1156 ReleaseSpinLock (Token);
1157 return EFI_SUCCESS;
1158 }
1159
1160 return EFI_NOT_READY;
1161 }
1162
1163 /**
1164 Schedule a procedure to run on the specified CPU.
1165
1166 @param[in] Procedure The address of the procedure to run
1167 @param[in] CpuIndex Target CPU Index
1168 @param[in,out] ProcArguments The parameter to pass to the procedure
1169 @param[in] Token This is an optional parameter that allows the caller to execute the
1170 procedure in a blocking or non-blocking fashion. If it is NULL the
1171 call is blocking, and the call will not return until the AP has
1172 completed the procedure. If the token is not NULL, the call will
1173 return immediately. The caller can check whether the procedure has
1174 completed with CheckOnProcedure or WaitForProcedure.
1175 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish
1176 execution of Procedure, either for blocking or non-blocking mode.
1177 Zero means infinity. If the timeout expires before all APs return
1178 from Procedure, then Procedure on the failed APs is terminated. If
1179 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.
1180 If the timeout expires in non-blocking mode, the timeout determined
1181 can be through CheckOnProcedure or WaitForProcedure.
1182 Note that timeout support is optional. Whether an implementation
1183 supports this feature can be determined via the Attributes data
1184 member.
1185 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned
1186 by Procedure when it completes execution on the target AP, or with
1187 EFI_TIMEOUT if the Procedure fails to complete within the optional
1188 timeout. The implementation will update this variable with
1189 EFI_NOT_READY prior to starting Procedure on the target AP.
1190
1191 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1192 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1193 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1194 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1195 @retval EFI_SUCCESS The procedure has been successfully scheduled
1196
1197 **/
1198 EFI_STATUS
1199 InternalSmmStartupThisAp (
1200 IN EFI_AP_PROCEDURE2 Procedure,
1201 IN UINTN CpuIndex,
1202 IN OUT VOID *ProcArguments OPTIONAL,
1203 IN MM_COMPLETION *Token,
1204 IN UINTN TimeoutInMicroseconds,
1205 IN OUT EFI_STATUS *CpuStatus
1206 )
1207 {
1208 if (CpuIndex >= gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus) {
1209 DEBUG((DEBUG_ERROR, "CpuIndex(%d) >= gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus(%d)\n", CpuIndex, gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus));
1210 return EFI_INVALID_PARAMETER;
1211 }
1212 if (CpuIndex == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) {
1213 DEBUG((DEBUG_ERROR, "CpuIndex(%d) == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu\n", CpuIndex));
1214 return EFI_INVALID_PARAMETER;
1215 }
1216 if (gSmmCpuPrivate->ProcessorInfo[CpuIndex].ProcessorId == INVALID_APIC_ID) {
1217 return EFI_INVALID_PARAMETER;
1218 }
1219 if (!(*(mSmmMpSyncData->CpuData[CpuIndex].Present))) {
1220 if (mSmmMpSyncData->EffectiveSyncMode == SmmCpuSyncModeTradition) {
1221 DEBUG((DEBUG_ERROR, "!mSmmMpSyncData->CpuData[%d].Present\n", CpuIndex));
1222 }
1223 return EFI_INVALID_PARAMETER;
1224 }
1225 if (gSmmCpuPrivate->Operation[CpuIndex] == SmmCpuRemove) {
1226 if (!FeaturePcdGet (PcdCpuHotPlugSupport)) {
1227 DEBUG((DEBUG_ERROR, "gSmmCpuPrivate->Operation[%d] == SmmCpuRemove\n", CpuIndex));
1228 }
1229 return EFI_INVALID_PARAMETER;
1230 }
1231 if ((TimeoutInMicroseconds != 0) && ((mSmmMp.Attributes & EFI_MM_MP_TIMEOUT_SUPPORTED) == 0)) {
1232 return EFI_INVALID_PARAMETER;
1233 }
1234 if (Procedure == NULL) {
1235 return EFI_INVALID_PARAMETER;
1236 }
1237
1238 AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1239
1240 if (Token != NULL) {
1241 *Token = (MM_COMPLETION) CreateToken ();
1242 }
1243
1244 mSmmMpSyncData->CpuData[CpuIndex].Procedure = Procedure;
1245 mSmmMpSyncData->CpuData[CpuIndex].Parameter = ProcArguments;
1246 if (Token != NULL) {
1247 mSmmMpSyncData->CpuData[CpuIndex].Token = (SPIN_LOCK *)(*Token);
1248 }
1249 mSmmMpSyncData->CpuData[CpuIndex].Status = CpuStatus;
1250 if (mSmmMpSyncData->CpuData[CpuIndex].Status != NULL) {
1251 *mSmmMpSyncData->CpuData[CpuIndex].Status = EFI_NOT_READY;
1252 }
1253
1254 ReleaseSemaphore (mSmmMpSyncData->CpuData[CpuIndex].Run);
1255
1256 if (Token == NULL) {
1257 AcquireSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1258 ReleaseSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1259 }
1260
1261 return EFI_SUCCESS;
1262 }
1263
1264 /**
1265 Worker function to execute a caller provided function on all enabled APs.
1266
1267 @param[in] Procedure A pointer to the function to be run on
1268 enabled APs of the system.
1269 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
1270 APs to return from Procedure, either for
1271 blocking or non-blocking mode.
1272 @param[in,out] ProcedureArguments The parameter passed into Procedure for
1273 all APs.
1274 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1275 procedure in a blocking or non-blocking fashion. If it is NULL the
1276 call is blocking, and the call will not return until the AP has
1277 completed the procedure. If the token is not NULL, the call will
1278 return immediately. The caller can check whether the procedure has
1279 completed with CheckOnProcedure or WaitForProcedure.
1280 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned
1281 by Procedure when it completes execution on the target AP, or with
1282 EFI_TIMEOUT if the Procedure fails to complete within the optional
1283 timeout. The implementation will update this variable with
1284 EFI_NOT_READY prior to starting Procedure on the target AP.
1285
1286
1287 @retval EFI_SUCCESS In blocking mode, all APs have finished before
1288 the timeout expired.
1289 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
1290 to all enabled APs.
1291 @retval others Failed to Startup all APs.
1292
1293 **/
1294 EFI_STATUS
1295 InternalSmmStartupAllAPs (
1296 IN EFI_AP_PROCEDURE2 Procedure,
1297 IN UINTN TimeoutInMicroseconds,
1298 IN OUT VOID *ProcedureArguments OPTIONAL,
1299 IN OUT MM_COMPLETION *Token,
1300 IN OUT EFI_STATUS *CPUStatus
1301 )
1302 {
1303 UINTN Index;
1304 UINTN CpuCount;
1305
1306 if ((TimeoutInMicroseconds != 0) && ((mSmmMp.Attributes & EFI_MM_MP_TIMEOUT_SUPPORTED) == 0)) {
1307 return EFI_INVALID_PARAMETER;
1308 }
1309 if (Procedure == NULL) {
1310 return EFI_INVALID_PARAMETER;
1311 }
1312
1313 CpuCount = 0;
1314 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
1315 if (IsPresentAp (Index)) {
1316 CpuCount ++;
1317
1318 if (gSmmCpuPrivate->Operation[Index] == SmmCpuRemove) {
1319 return EFI_INVALID_PARAMETER;
1320 }
1321
1322 if (!AcquireSpinLockOrFail(mSmmMpSyncData->CpuData[Index].Busy)) {
1323 return EFI_NOT_READY;
1324 }
1325 ReleaseSpinLock (mSmmMpSyncData->CpuData[Index].Busy);
1326 }
1327 }
1328 if (CpuCount == 0) {
1329 return EFI_NOT_STARTED;
1330 }
1331
1332 if (Token != NULL) {
1333 *Token = (MM_COMPLETION) CreateToken ();
1334 }
1335
1336 //
1337 // Make sure all BUSY should be acquired.
1338 //
1339 // Because former code already check mSmmMpSyncData->CpuData[***].Busy for each AP.
1340 // Here code always use AcquireSpinLock instead of AcquireSpinLockOrFail for not
1341 // block mode.
1342 //
1343 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
1344 if (IsPresentAp (Index)) {
1345 AcquireSpinLock (mSmmMpSyncData->CpuData[Index].Busy);
1346 }
1347 }
1348
1349 for (Index = mMaxNumberOfCpus; Index-- > 0;) {
1350 if (IsPresentAp (Index)) {
1351 mSmmMpSyncData->CpuData[Index].Procedure = (EFI_AP_PROCEDURE2) Procedure;
1352 mSmmMpSyncData->CpuData[Index].Parameter = ProcedureArguments;
1353 if (Token != NULL) {
1354 mSmmMpSyncData->CpuData[Index].Token = (SPIN_LOCK *)(*Token);
1355 }
1356 if (CPUStatus != NULL) {
1357 mSmmMpSyncData->CpuData[Index].Status = &CPUStatus[Index];
1358 if (mSmmMpSyncData->CpuData[Index].Status != NULL) {
1359 *mSmmMpSyncData->CpuData[Index].Status = EFI_NOT_READY;
1360 }
1361 }
1362 } else {
1363 //
1364 // PI spec requirement:
1365 // For every excluded processor, the array entry must contain a value of EFI_NOT_STARTED.
1366 //
1367 if (CPUStatus != NULL) {
1368 CPUStatus[Index] = EFI_NOT_STARTED;
1369 }
1370 }
1371 }
1372
1373 ReleaseAllAPs ();
1374
1375 if (Token == NULL) {
1376 //
1377 // Make sure all APs have completed their tasks.
1378 //
1379 WaitForAllAPsNotBusy (TRUE);
1380 }
1381
1382 return EFI_SUCCESS;
1383 }
1384
1385 /**
1386 ISO C99 6.5.2.2 "Function calls", paragraph 9:
1387 If the function is defined with a type that is not compatible with
1388 the type (of the expression) pointed to by the expression that
1389 denotes the called function, the behavior is undefined.
1390
1391 So add below wrapper function to convert between EFI_AP_PROCEDURE
1392 and EFI_AP_PROCEDURE2.
1393
1394 Wrapper for Procedures.
1395
1396 @param[in] Buffer Pointer to PROCEDURE_WRAPPER buffer.
1397
1398 **/
1399 EFI_STATUS
1400 EFIAPI
1401 ProcedureWrapper (
1402 IN VOID *Buffer
1403 )
1404 {
1405 PROCEDURE_WRAPPER *Wrapper;
1406
1407 Wrapper = Buffer;
1408 Wrapper->Procedure (Wrapper->ProcedureArgument);
1409
1410 return EFI_SUCCESS;
1411 }
1412
1413 /**
1414 Schedule a procedure to run on the specified CPU in blocking mode.
1415
1416 @param[in] Procedure The address of the procedure to run
1417 @param[in] CpuIndex Target CPU Index
1418 @param[in, out] ProcArguments The parameter to pass to the procedure
1419
1420 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1421 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1422 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1423 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1424 @retval EFI_SUCCESS The procedure has been successfully scheduled
1425
1426 **/
1427 EFI_STATUS
1428 EFIAPI
1429 SmmBlockingStartupThisAp (
1430 IN EFI_AP_PROCEDURE Procedure,
1431 IN UINTN CpuIndex,
1432 IN OUT VOID *ProcArguments OPTIONAL
1433 )
1434 {
1435 PROCEDURE_WRAPPER Wrapper;
1436
1437 Wrapper.Procedure = Procedure;
1438 Wrapper.ProcedureArgument = ProcArguments;
1439
1440 //
1441 // Use wrapper function to convert EFI_AP_PROCEDURE to EFI_AP_PROCEDURE2.
1442 //
1443 return InternalSmmStartupThisAp (ProcedureWrapper, CpuIndex, &Wrapper, NULL, 0, NULL);
1444 }
1445
1446 /**
1447 Schedule a procedure to run on the specified CPU.
1448
1449 @param Procedure The address of the procedure to run
1450 @param CpuIndex Target CPU Index
1451 @param ProcArguments The parameter to pass to the procedure
1452
1453 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1454 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1455 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1456 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1457 @retval EFI_SUCCESS The procedure has been successfully scheduled
1458
1459 **/
1460 EFI_STATUS
1461 EFIAPI
1462 SmmStartupThisAp (
1463 IN EFI_AP_PROCEDURE Procedure,
1464 IN UINTN CpuIndex,
1465 IN OUT VOID *ProcArguments OPTIONAL
1466 )
1467 {
1468 MM_COMPLETION Token;
1469
1470 gSmmCpuPrivate->ApWrapperFunc[CpuIndex].Procedure = Procedure;
1471 gSmmCpuPrivate->ApWrapperFunc[CpuIndex].ProcedureArgument = ProcArguments;
1472
1473 //
1474 // Use wrapper function to convert EFI_AP_PROCEDURE to EFI_AP_PROCEDURE2.
1475 //
1476 return InternalSmmStartupThisAp (
1477 ProcedureWrapper,
1478 CpuIndex,
1479 &gSmmCpuPrivate->ApWrapperFunc[CpuIndex],
1480 FeaturePcdGet (PcdCpuSmmBlockStartupThisAp) ? NULL : &Token,
1481 0,
1482 NULL
1483 );
1484 }
1485
1486 /**
1487 This function sets DR6 & DR7 according to SMM save state, before running SMM C code.
1488 They are useful when you want to enable hardware breakpoints in SMM without entry SMM mode.
1489
1490 NOTE: It might not be appreciated in runtime since it might
1491 conflict with OS debugging facilities. Turn them off in RELEASE.
1492
1493 @param CpuIndex CPU Index
1494
1495 **/
1496 VOID
1497 EFIAPI
1498 CpuSmmDebugEntry (
1499 IN UINTN CpuIndex
1500 )
1501 {
1502 SMRAM_SAVE_STATE_MAP *CpuSaveState;
1503
1504 if (FeaturePcdGet (PcdCpuSmmDebug)) {
1505 ASSERT(CpuIndex < mMaxNumberOfCpus);
1506 CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
1507 if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
1508 AsmWriteDr6 (CpuSaveState->x86._DR6);
1509 AsmWriteDr7 (CpuSaveState->x86._DR7);
1510 } else {
1511 AsmWriteDr6 ((UINTN)CpuSaveState->x64._DR6);
1512 AsmWriteDr7 ((UINTN)CpuSaveState->x64._DR7);
1513 }
1514 }
1515 }
1516
1517 /**
1518 This function restores DR6 & DR7 to SMM save state.
1519
1520 NOTE: It might not be appreciated in runtime since it might
1521 conflict with OS debugging facilities. Turn them off in RELEASE.
1522
1523 @param CpuIndex CPU Index
1524
1525 **/
1526 VOID
1527 EFIAPI
1528 CpuSmmDebugExit (
1529 IN UINTN CpuIndex
1530 )
1531 {
1532 SMRAM_SAVE_STATE_MAP *CpuSaveState;
1533
1534 if (FeaturePcdGet (PcdCpuSmmDebug)) {
1535 ASSERT(CpuIndex < mMaxNumberOfCpus);
1536 CpuSaveState = (SMRAM_SAVE_STATE_MAP *)gSmmCpuPrivate->CpuSaveState[CpuIndex];
1537 if (mSmmSaveStateRegisterLma == EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT) {
1538 CpuSaveState->x86._DR7 = (UINT32)AsmReadDr7 ();
1539 CpuSaveState->x86._DR6 = (UINT32)AsmReadDr6 ();
1540 } else {
1541 CpuSaveState->x64._DR7 = AsmReadDr7 ();
1542 CpuSaveState->x64._DR6 = AsmReadDr6 ();
1543 }
1544 }
1545 }
1546
1547 /**
1548 C function for SMI entry, each processor comes here upon SMI trigger.
1549
1550 @param CpuIndex CPU Index
1551
1552 **/
1553 VOID
1554 EFIAPI
1555 SmiRendezvous (
1556 IN UINTN CpuIndex
1557 )
1558 {
1559 EFI_STATUS Status;
1560 BOOLEAN ValidSmi;
1561 BOOLEAN IsBsp;
1562 BOOLEAN BspInProgress;
1563 UINTN Index;
1564 UINTN Cr2;
1565
1566 ASSERT(CpuIndex < mMaxNumberOfCpus);
1567
1568 //
1569 // Save Cr2 because Page Fault exception in SMM may override its value,
1570 // when using on-demand paging for above 4G memory.
1571 //
1572 Cr2 = 0;
1573 SaveCr2 (&Cr2);
1574
1575 //
1576 // Call the user register Startup function first.
1577 //
1578 if (mSmmMpSyncData->StartupProcedure != NULL) {
1579 mSmmMpSyncData->StartupProcedure (mSmmMpSyncData->StartupProcArgs);
1580 }
1581
1582 //
1583 // Perform CPU specific entry hooks
1584 //
1585 SmmCpuFeaturesRendezvousEntry (CpuIndex);
1586
1587 //
1588 // Determine if this is a valid SMI
1589 //
1590 ValidSmi = PlatformValidSmi();
1591
1592 //
1593 // Determine if BSP has been already in progress. Note this must be checked after
1594 // ValidSmi because BSP may clear a valid SMI source after checking in.
1595 //
1596 BspInProgress = *mSmmMpSyncData->InsideSmm;
1597
1598 if (!BspInProgress && !ValidSmi) {
1599 //
1600 // If we reach here, it means when we sampled the ValidSmi flag, SMI status had not
1601 // been cleared by BSP in a new SMI run (so we have a truly invalid SMI), or SMI
1602 // status had been cleared by BSP and an existing SMI run has almost ended. (Note
1603 // we sampled ValidSmi flag BEFORE judging BSP-in-progress status.) In both cases, there
1604 // is nothing we need to do.
1605 //
1606 goto Exit;
1607 } else {
1608 //
1609 // Signal presence of this processor
1610 //
1611 if (ReleaseSemaphore (mSmmMpSyncData->Counter) == 0) {
1612 //
1613 // BSP has already ended the synchronization, so QUIT!!!
1614 //
1615
1616 //
1617 // Wait for BSP's signal to finish SMI
1618 //
1619 while (*mSmmMpSyncData->AllCpusInSync) {
1620 CpuPause ();
1621 }
1622 goto Exit;
1623 } else {
1624
1625 //
1626 // The BUSY lock is initialized to Released state.
1627 // This needs to be done early enough to be ready for BSP's SmmStartupThisAp() call.
1628 // E.g., with Relaxed AP flow, SmmStartupThisAp() may be called immediately
1629 // after AP's present flag is detected.
1630 //
1631 InitializeSpinLock (mSmmMpSyncData->CpuData[CpuIndex].Busy);
1632 }
1633
1634 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
1635 ActivateSmmProfile (CpuIndex);
1636 }
1637
1638 if (BspInProgress) {
1639 //
1640 // BSP has been elected. Follow AP path, regardless of ValidSmi flag
1641 // as BSP may have cleared the SMI status
1642 //
1643 APHandler (CpuIndex, ValidSmi, mSmmMpSyncData->EffectiveSyncMode);
1644 } else {
1645 //
1646 // We have a valid SMI
1647 //
1648
1649 //
1650 // Elect BSP
1651 //
1652 IsBsp = FALSE;
1653 if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {
1654 if (!mSmmMpSyncData->SwitchBsp || mSmmMpSyncData->CandidateBsp[CpuIndex]) {
1655 //
1656 // Call platform hook to do BSP election
1657 //
1658 Status = PlatformSmmBspElection (&IsBsp);
1659 if (EFI_SUCCESS == Status) {
1660 //
1661 // Platform hook determines successfully
1662 //
1663 if (IsBsp) {
1664 mSmmMpSyncData->BspIndex = (UINT32)CpuIndex;
1665 }
1666 } else {
1667 //
1668 // Platform hook fails to determine, use default BSP election method
1669 //
1670 InterlockedCompareExchange32 (
1671 (UINT32*)&mSmmMpSyncData->BspIndex,
1672 (UINT32)-1,
1673 (UINT32)CpuIndex
1674 );
1675 }
1676 }
1677 }
1678
1679 //
1680 // "mSmmMpSyncData->BspIndex == CpuIndex" means this is the BSP
1681 //
1682 if (mSmmMpSyncData->BspIndex == CpuIndex) {
1683
1684 //
1685 // Clear last request for SwitchBsp.
1686 //
1687 if (mSmmMpSyncData->SwitchBsp) {
1688 mSmmMpSyncData->SwitchBsp = FALSE;
1689 for (Index = 0; Index < mMaxNumberOfCpus; Index++) {
1690 mSmmMpSyncData->CandidateBsp[Index] = FALSE;
1691 }
1692 }
1693
1694 if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {
1695 SmmProfileRecordSmiNum ();
1696 }
1697
1698 //
1699 // BSP Handler is always called with a ValidSmi == TRUE
1700 //
1701 BSPHandler (CpuIndex, mSmmMpSyncData->EffectiveSyncMode);
1702 } else {
1703 APHandler (CpuIndex, ValidSmi, mSmmMpSyncData->EffectiveSyncMode);
1704 }
1705 }
1706
1707 ASSERT (*mSmmMpSyncData->CpuData[CpuIndex].Run == 0);
1708
1709 //
1710 // Wait for BSP's signal to exit SMI
1711 //
1712 while (*mSmmMpSyncData->AllCpusInSync) {
1713 CpuPause ();
1714 }
1715 }
1716
1717 Exit:
1718 SmmCpuFeaturesRendezvousExit (CpuIndex);
1719
1720 //
1721 // Restore Cr2
1722 //
1723 RestoreCr2 (Cr2);
1724 }
1725
1726 /**
1727 Allocate buffer for SpinLock and Wrapper function buffer.
1728
1729 **/
1730 VOID
1731 InitializeDataForMmMp (
1732 VOID
1733 )
1734 {
1735 gSmmCpuPrivate->ApWrapperFunc = AllocatePool (sizeof (PROCEDURE_WRAPPER) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus);
1736 ASSERT (gSmmCpuPrivate->ApWrapperFunc != NULL);
1737
1738 InitializeListHead (&gSmmCpuPrivate->TokenList);
1739 }
1740
1741 /**
1742 Allocate buffer for all semaphores and spin locks.
1743
1744 **/
1745 VOID
1746 InitializeSmmCpuSemaphores (
1747 VOID
1748 )
1749 {
1750 UINTN ProcessorCount;
1751 UINTN TotalSize;
1752 UINTN GlobalSemaphoresSize;
1753 UINTN CpuSemaphoresSize;
1754 UINTN SemaphoreSize;
1755 UINTN Pages;
1756 UINTN *SemaphoreBlock;
1757 UINTN SemaphoreAddr;
1758
1759 SemaphoreSize = GetSpinLockProperties ();
1760 ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
1761 GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;
1762 CpuSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_CPU) / sizeof (VOID *)) * ProcessorCount * SemaphoreSize;
1763 TotalSize = GlobalSemaphoresSize + CpuSemaphoresSize;
1764 DEBUG((EFI_D_INFO, "One Semaphore Size = 0x%x\n", SemaphoreSize));
1765 DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));
1766 Pages = EFI_SIZE_TO_PAGES (TotalSize);
1767 SemaphoreBlock = AllocatePages (Pages);
1768 ASSERT (SemaphoreBlock != NULL);
1769 ZeroMem (SemaphoreBlock, TotalSize);
1770
1771 SemaphoreAddr = (UINTN)SemaphoreBlock;
1772 mSmmCpuSemaphores.SemaphoreGlobal.Counter = (UINT32 *)SemaphoreAddr;
1773 SemaphoreAddr += SemaphoreSize;
1774 mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm = (BOOLEAN *)SemaphoreAddr;
1775 SemaphoreAddr += SemaphoreSize;
1776 mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync = (BOOLEAN *)SemaphoreAddr;
1777 SemaphoreAddr += SemaphoreSize;
1778 mSmmCpuSemaphores.SemaphoreGlobal.PFLock = (SPIN_LOCK *)SemaphoreAddr;
1779 SemaphoreAddr += SemaphoreSize;
1780 mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock
1781 = (SPIN_LOCK *)SemaphoreAddr;
1782 SemaphoreAddr += SemaphoreSize;
1783
1784 SemaphoreAddr = (UINTN)SemaphoreBlock + GlobalSemaphoresSize;
1785 mSmmCpuSemaphores.SemaphoreCpu.Busy = (SPIN_LOCK *)SemaphoreAddr;
1786 SemaphoreAddr += ProcessorCount * SemaphoreSize;
1787 mSmmCpuSemaphores.SemaphoreCpu.Run = (UINT32 *)SemaphoreAddr;
1788 SemaphoreAddr += ProcessorCount * SemaphoreSize;
1789 mSmmCpuSemaphores.SemaphoreCpu.Present = (BOOLEAN *)SemaphoreAddr;
1790
1791 mPFLock = mSmmCpuSemaphores.SemaphoreGlobal.PFLock;
1792 mConfigSmmCodeAccessCheckLock = mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock;
1793
1794 mSemaphoreSize = SemaphoreSize;
1795 }
1796
1797 /**
1798 Initialize un-cacheable data.
1799
1800 **/
1801 VOID
1802 EFIAPI
1803 InitializeMpSyncData (
1804 VOID
1805 )
1806 {
1807 UINTN CpuIndex;
1808
1809 if (mSmmMpSyncData != NULL) {
1810 //
1811 // mSmmMpSyncDataSize includes one structure of SMM_DISPATCHER_MP_SYNC_DATA, one
1812 // CpuData array of SMM_CPU_DATA_BLOCK and one CandidateBsp array of BOOLEAN.
1813 //
1814 ZeroMem (mSmmMpSyncData, mSmmMpSyncDataSize);
1815 mSmmMpSyncData->CpuData = (SMM_CPU_DATA_BLOCK *)((UINT8 *)mSmmMpSyncData + sizeof (SMM_DISPATCHER_MP_SYNC_DATA));
1816 mSmmMpSyncData->CandidateBsp = (BOOLEAN *)(mSmmMpSyncData->CpuData + gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus);
1817 if (FeaturePcdGet (PcdCpuSmmEnableBspElection)) {
1818 //
1819 // Enable BSP election by setting BspIndex to -1
1820 //
1821 mSmmMpSyncData->BspIndex = (UINT32)-1;
1822 }
1823 mSmmMpSyncData->EffectiveSyncMode = mCpuSmmSyncMode;
1824
1825 mSmmMpSyncData->Counter = mSmmCpuSemaphores.SemaphoreGlobal.Counter;
1826 mSmmMpSyncData->InsideSmm = mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm;
1827 mSmmMpSyncData->AllCpusInSync = mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync;
1828 ASSERT (mSmmMpSyncData->Counter != NULL && mSmmMpSyncData->InsideSmm != NULL &&
1829 mSmmMpSyncData->AllCpusInSync != NULL);
1830 *mSmmMpSyncData->Counter = 0;
1831 *mSmmMpSyncData->InsideSmm = FALSE;
1832 *mSmmMpSyncData->AllCpusInSync = FALSE;
1833
1834 for (CpuIndex = 0; CpuIndex < gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus; CpuIndex ++) {
1835 mSmmMpSyncData->CpuData[CpuIndex].Busy =
1836 (SPIN_LOCK *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Busy + mSemaphoreSize * CpuIndex);
1837 mSmmMpSyncData->CpuData[CpuIndex].Run =
1838 (UINT32 *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Run + mSemaphoreSize * CpuIndex);
1839 mSmmMpSyncData->CpuData[CpuIndex].Present =
1840 (BOOLEAN *)((UINTN)mSmmCpuSemaphores.SemaphoreCpu.Present + mSemaphoreSize * CpuIndex);
1841 *(mSmmMpSyncData->CpuData[CpuIndex].Busy) = 0;
1842 *(mSmmMpSyncData->CpuData[CpuIndex].Run) = 0;
1843 *(mSmmMpSyncData->CpuData[CpuIndex].Present) = FALSE;
1844 }
1845 }
1846 }
1847
1848 /**
1849 Initialize global data for MP synchronization.
1850
1851 @param Stacks Base address of SMI stack buffer for all processors.
1852 @param StackSize Stack size for each processor in SMM.
1853 @param ShadowStackSize Shadow Stack size for each processor in SMM.
1854
1855 **/
1856 UINT32
1857 InitializeMpServiceData (
1858 IN VOID *Stacks,
1859 IN UINTN StackSize,
1860 IN UINTN ShadowStackSize
1861 )
1862 {
1863 UINT32 Cr3;
1864 UINTN Index;
1865 UINT8 *GdtTssTables;
1866 UINTN GdtTableStepSize;
1867 CPUID_VERSION_INFO_EDX RegEdx;
1868
1869 //
1870 // Determine if this CPU supports machine check
1871 //
1872 AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx.Uint32);
1873 mMachineCheckSupported = (BOOLEAN)(RegEdx.Bits.MCA == 1);
1874
1875 //
1876 // Allocate memory for all locks and semaphores
1877 //
1878 InitializeSmmCpuSemaphores ();
1879
1880 //
1881 // Initialize mSmmMpSyncData
1882 //
1883 mSmmMpSyncDataSize = sizeof (SMM_DISPATCHER_MP_SYNC_DATA) +
1884 (sizeof (SMM_CPU_DATA_BLOCK) + sizeof (BOOLEAN)) * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
1885 mSmmMpSyncData = (SMM_DISPATCHER_MP_SYNC_DATA*) AllocatePages (EFI_SIZE_TO_PAGES (mSmmMpSyncDataSize));
1886 ASSERT (mSmmMpSyncData != NULL);
1887 mCpuSmmSyncMode = (SMM_CPU_SYNC_MODE)PcdGet8 (PcdCpuSmmSyncMode);
1888 InitializeMpSyncData ();
1889
1890 //
1891 // Initialize physical address mask
1892 // NOTE: Physical memory above virtual address limit is not supported !!!
1893 //
1894 AsmCpuid (0x80000008, (UINT32*)&Index, NULL, NULL, NULL);
1895 gPhyMask = LShiftU64 (1, (UINT8)Index) - 1;
1896 gPhyMask &= (1ull << 48) - EFI_PAGE_SIZE;
1897
1898 //
1899 // Create page tables
1900 //
1901 Cr3 = SmmInitPageTable ();
1902
1903 GdtTssTables = InitGdt (Cr3, &GdtTableStepSize);
1904
1905 //
1906 // Install SMI handler for each CPU
1907 //
1908 for (Index = 0; Index < mMaxNumberOfCpus; Index++) {
1909 InstallSmiHandler (
1910 Index,
1911 (UINT32)mCpuHotPlugData.SmBase[Index],
1912 (VOID*)((UINTN)Stacks + (StackSize + ShadowStackSize) * Index),
1913 StackSize,
1914 (UINTN)(GdtTssTables + GdtTableStepSize * Index),
1915 gcSmiGdtr.Limit + 1,
1916 gcSmiIdtr.Base,
1917 gcSmiIdtr.Limit + 1,
1918 Cr3
1919 );
1920 }
1921
1922 //
1923 // Record current MTRR settings
1924 //
1925 ZeroMem (&gSmiMtrrs, sizeof (gSmiMtrrs));
1926 MtrrGetAllMtrrs (&gSmiMtrrs);
1927
1928 return Cr3;
1929 }
1930
1931 /**
1932
1933 Register the SMM Foundation entry point.
1934
1935 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
1936 @param SmmEntryPoint SMM Foundation EntryPoint
1937
1938 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
1939
1940 **/
1941 EFI_STATUS
1942 EFIAPI
1943 RegisterSmmEntry (
1944 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
1945 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
1946 )
1947 {
1948 //
1949 // Record SMM Foundation EntryPoint, later invoke it on SMI entry vector.
1950 //
1951 gSmmCpuPrivate->SmmCoreEntry = SmmEntryPoint;
1952 return EFI_SUCCESS;
1953 }
1954
1955 /**
1956
1957 Register the SMM Foundation entry point.
1958
1959 @param[in] Procedure A pointer to the code stream to be run on the designated target AP
1960 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2
1961 with the related definitions of
1962 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.
1963 If caller may pass a value of NULL to deregister any existing
1964 startup procedure.
1965 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is
1966 run by the AP. It is an optional common mailbox between APs and
1967 the caller to share information
1968
1969 @retval EFI_SUCCESS The Procedure has been set successfully.
1970 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.
1971
1972 **/
1973 EFI_STATUS
1974 RegisterStartupProcedure (
1975 IN EFI_AP_PROCEDURE Procedure,
1976 IN OUT VOID *ProcedureArguments OPTIONAL
1977 )
1978 {
1979 if (Procedure == NULL && ProcedureArguments != NULL) {
1980 return EFI_INVALID_PARAMETER;
1981 }
1982 if (mSmmMpSyncData == NULL) {
1983 return EFI_NOT_READY;
1984 }
1985
1986 mSmmMpSyncData->StartupProcedure = Procedure;
1987 mSmmMpSyncData->StartupProcArgs = ProcedureArguments;
1988
1989 return EFI_SUCCESS;
1990 }