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1 /** @file
2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
3
4 Copyright (c) 2009 - 2022, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef _CPU_PISMMCPUDXESMM_H_
12 #define _CPU_PISMMCPUDXESMM_H_
13
14 #include <PiSmm.h>
15
16 #include <Protocol/MpService.h>
17 #include <Protocol/SmmConfiguration.h>
18 #include <Protocol/SmmCpu.h>
19 #include <Protocol/SmmAccess2.h>
20 #include <Protocol/SmmReadyToLock.h>
21 #include <Protocol/SmmCpuService.h>
22 #include <Protocol/SmmMemoryAttribute.h>
23 #include <Protocol/MmMp.h>
24
25 #include <Guid/AcpiS3Context.h>
26 #include <Guid/MemoryAttributesTable.h>
27 #include <Guid/PiSmmMemoryAttributesTable.h>
28
29 #include <Library/BaseLib.h>
30 #include <Library/IoLib.h>
31 #include <Library/TimerLib.h>
32 #include <Library/SynchronizationLib.h>
33 #include <Library/DebugLib.h>
34 #include <Library/BaseMemoryLib.h>
35 #include <Library/PcdLib.h>
36 #include <Library/MtrrLib.h>
37 #include <Library/SmmCpuPlatformHookLib.h>
38 #include <Library/SmmServicesTableLib.h>
39 #include <Library/MemoryAllocationLib.h>
40 #include <Library/UefiBootServicesTableLib.h>
41 #include <Library/UefiRuntimeServicesTableLib.h>
42 #include <Library/DebugAgentLib.h>
43 #include <Library/UefiLib.h>
44 #include <Library/HobLib.h>
45 #include <Library/LocalApicLib.h>
46 #include <Library/CpuLib.h>
47 #include <Library/UefiCpuLib.h>
48 #include <Library/CpuExceptionHandlerLib.h>
49 #include <Library/ReportStatusCodeLib.h>
50 #include <Library/SmmCpuFeaturesLib.h>
51 #include <Library/PeCoffGetEntryPointLib.h>
52 #include <Library/RegisterCpuFeaturesLib.h>
53
54 #include <AcpiCpuData.h>
55 #include <CpuHotPlugData.h>
56
57 #include <Register/Intel/Cpuid.h>
58 #include <Register/Intel/Msr.h>
59
60 #include "CpuService.h"
61 #include "SmmProfile.h"
62
63 //
64 // CET definition
65 //
66 #define CPUID_CET_SS BIT7
67 #define CPUID_CET_IBT BIT20
68
69 #define CR4_CET_ENABLE BIT23
70
71 #define MSR_IA32_S_CET 0x6A2
72 #define MSR_IA32_PL0_SSP 0x6A4
73 #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
74
75 typedef union {
76 struct {
77 // enable shadow stacks
78 UINT32 SH_STK_ENP : 1;
79 // enable the WRSS{D,Q}W instructions.
80 UINT32 WR_SHSTK_EN : 1;
81 // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
82 UINT32 ENDBR_EN : 1;
83 // enable legacy compatibility treatment for indirect call/jmp tracking.
84 UINT32 LEG_IW_EN : 1;
85 // enable use of no-track prefix on indirect call/jmp.
86 UINT32 NO_TRACK_EN : 1;
87 // disable suppression of CET indirect branch tracking on legacy compatibility.
88 UINT32 SUPPRESS_DIS : 1;
89 UINT32 RSVD : 4;
90 // indirect branch tracking is suppressed.
91 // This bit can be written to 1 only if TRACKER is written as IDLE.
92 UINT32 SUPPRESS : 1;
93 // Value of the endbranch state machine
94 // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
95 UINT32 TRACKER : 1;
96 // linear address of a bitmap in memory indicating valid
97 // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
98 // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
99 // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
100 // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
101 // (this automatically aligns the address on a 4-Kbyte boundary).
102 UINT32 EB_LEG_BITMAP_BASE_low : 12;
103 UINT32 EB_LEG_BITMAP_BASE_high : 32;
104 } Bits;
105 UINT64 Uint64;
106 } MSR_IA32_CET;
107
108 //
109 // MSRs required for configuration of SMM Code Access Check
110 //
111 #define EFI_MSR_SMM_MCA_CAP 0x17D
112 #define SMM_CODE_ACCESS_CHK_BIT BIT58
113
114 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
115 #define SMM_CODE_CHK_EN_BIT BIT2
116
117 ///
118 /// Page Table Entry
119 ///
120 #define IA32_PG_P BIT0
121 #define IA32_PG_RW BIT1
122 #define IA32_PG_U BIT2
123 #define IA32_PG_WT BIT3
124 #define IA32_PG_CD BIT4
125 #define IA32_PG_A BIT5
126 #define IA32_PG_D BIT6
127 #define IA32_PG_PS BIT7
128 #define IA32_PG_PAT_2M BIT12
129 #define IA32_PG_PAT_4K IA32_PG_PS
130 #define IA32_PG_PMNT BIT62
131 #define IA32_PG_NX BIT63
132
133 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
134 //
135 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
136 // X64 PAE PDPTE does not have such restriction
137 //
138 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
139
140 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
141
142 #define PAGING_4K_MASK 0xFFF
143 #define PAGING_2M_MASK 0x1FFFFF
144 #define PAGING_1G_MASK 0x3FFFFFFF
145
146 #define PAGING_PAE_INDEX_MASK 0x1FF
147
148 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
149 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
150 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
151
152 #define SMRR_MAX_ADDRESS BASE_4GB
153
154 typedef enum {
155 PageNone,
156 Page4K,
157 Page2M,
158 Page1G,
159 } PAGE_ATTRIBUTE;
160
161 typedef struct {
162 PAGE_ATTRIBUTE Attribute;
163 UINT64 Length;
164 UINT64 AddressMask;
165 } PAGE_ATTRIBUTE_TABLE;
166
167 //
168 // Size of Task-State Segment defined in IA32 Manual
169 //
170 #define TSS_SIZE 104
171 #define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP
172 #define TSS_X64_IST1_OFFSET 36
173 #define TSS_IA32_CR3_OFFSET 28
174 #define TSS_IA32_ESP_OFFSET 56
175 #define TSS_IA32_SSP_OFFSET 104
176
177 #define CR0_WP BIT16
178
179 //
180 // Code select value
181 //
182 #define PROTECT_MODE_CODE_SEGMENT 0x08
183 #define LONG_MODE_CODE_SEGMENT 0x38
184
185 //
186 // The size 0x20 must be bigger than
187 // the size of template code of SmmInit. Currently,
188 // the size of SmmInit requires the 0x16 Bytes buffer
189 // at least.
190 //
191 #define BACK_BUF_SIZE 0x20
192
193 #define EXCEPTION_VECTOR_NUMBER 0x20
194
195 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
196
197 //
198 // Wrapper used to convert EFI_AP_PROCEDURE2 and EFI_AP_PROCEDURE.
199 //
200 typedef struct {
201 EFI_AP_PROCEDURE Procedure;
202 VOID *ProcedureArgument;
203 } PROCEDURE_WRAPPER;
204
205 #define PROCEDURE_TOKEN_SIGNATURE SIGNATURE_32 ('P', 'R', 'T', 'S')
206
207 typedef struct {
208 UINTN Signature;
209 LIST_ENTRY Link;
210
211 SPIN_LOCK *SpinLock;
212 volatile UINT32 RunningApCount;
213 } PROCEDURE_TOKEN;
214
215 #define PROCEDURE_TOKEN_FROM_LINK(a) CR (a, PROCEDURE_TOKEN, Link, PROCEDURE_TOKEN_SIGNATURE)
216
217 #define TOKEN_BUFFER_SIGNATURE SIGNATURE_32 ('T', 'K', 'B', 'S')
218
219 typedef struct {
220 UINTN Signature;
221 LIST_ENTRY Link;
222
223 UINT8 *Buffer;
224 } TOKEN_BUFFER;
225
226 #define TOKEN_BUFFER_FROM_LINK(a) CR (a, TOKEN_BUFFER, Link, TOKEN_BUFFER_SIGNATURE)
227
228 //
229 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
230 // Contains the SMM Configuration Protocols that is produced.
231 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
232 //
233 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
234
235 typedef struct {
236 UINTN Signature;
237
238 EFI_HANDLE SmmCpuHandle;
239
240 EFI_PROCESSOR_INFORMATION *ProcessorInfo;
241 SMM_CPU_OPERATION *Operation;
242 UINTN *CpuSaveStateSize;
243 VOID **CpuSaveState;
244
245 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion[1];
246 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext;
247 EFI_SMM_ENTRY_POINT SmmCoreEntry;
248
249 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration;
250
251 PROCEDURE_WRAPPER *ApWrapperFunc;
252 LIST_ENTRY TokenList;
253 LIST_ENTRY *FirstFreeToken;
254 } SMM_CPU_PRIVATE_DATA;
255
256 extern SMM_CPU_PRIVATE_DATA *gSmmCpuPrivate;
257 extern CPU_HOT_PLUG_DATA mCpuHotPlugData;
258 extern UINTN mMaxNumberOfCpus;
259 extern UINTN mNumberOfCpus;
260 extern EFI_SMM_CPU_PROTOCOL mSmmCpu;
261 extern EFI_MM_MP_PROTOCOL mSmmMp;
262 extern BOOLEAN m5LevelPagingNeeded;
263
264 ///
265 /// The mode of the CPU at the time an SMI occurs
266 ///
267 extern UINT8 mSmmSaveStateRegisterLma;
268
269 //
270 // SMM CPU Protocol function prototypes.
271 //
272
273 /**
274 Read information from the CPU save state.
275
276 @param This EFI_SMM_CPU_PROTOCOL instance
277 @param Width The number of bytes to read from the CPU save state.
278 @param Register Specifies the CPU register to read form the save state.
279 @param CpuIndex Specifies the zero-based index of the CPU save state
280 @param Buffer Upon return, this holds the CPU register value read from the save state.
281
282 @retval EFI_SUCCESS The register was read from Save State
283 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
284 @retval EFI_INVALID_PARAMETER This or Buffer is NULL.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 SmmReadSaveState (
290 IN CONST EFI_SMM_CPU_PROTOCOL *This,
291 IN UINTN Width,
292 IN EFI_SMM_SAVE_STATE_REGISTER Register,
293 IN UINTN CpuIndex,
294 OUT VOID *Buffer
295 );
296
297 /**
298 Write data to the CPU save state.
299
300 @param This EFI_SMM_CPU_PROTOCOL instance
301 @param Width The number of bytes to read from the CPU save state.
302 @param Register Specifies the CPU register to write to the save state.
303 @param CpuIndex Specifies the zero-based index of the CPU save state
304 @param Buffer Upon entry, this holds the new CPU register value.
305
306 @retval EFI_SUCCESS The register was written from Save State
307 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
308 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct
309
310 **/
311 EFI_STATUS
312 EFIAPI
313 SmmWriteSaveState (
314 IN CONST EFI_SMM_CPU_PROTOCOL *This,
315 IN UINTN Width,
316 IN EFI_SMM_SAVE_STATE_REGISTER Register,
317 IN UINTN CpuIndex,
318 IN CONST VOID *Buffer
319 );
320
321 /**
322 Read a CPU Save State register on the target processor.
323
324 This function abstracts the differences that whether the CPU Save State register is in the
325 IA32 CPU Save State Map or X64 CPU Save State Map.
326
327 This function supports reading a CPU Save State register in SMBase relocation handler.
328
329 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
330 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
331 @param[in] Width The number of bytes to read from the CPU save state.
332 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
333
334 @retval EFI_SUCCESS The register was read from Save State.
335 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
336 @retval EFI_INVALID_PARAMETER Buffer is NULL, or Width does not meet requirement per Register type.
337
338 **/
339 EFI_STATUS
340 EFIAPI
341 ReadSaveStateRegister (
342 IN UINTN CpuIndex,
343 IN EFI_SMM_SAVE_STATE_REGISTER Register,
344 IN UINTN Width,
345 OUT VOID *Buffer
346 );
347
348 /**
349 Write value to a CPU Save State register on the target processor.
350
351 This function abstracts the differences that whether the CPU Save State register is in the
352 IA32 CPU Save State Map or X64 CPU Save State Map.
353
354 This function supports writing a CPU Save State register in SMBase relocation handler.
355
356 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
357 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
358 @param[in] Width The number of bytes to read from the CPU save state.
359 @param[in] Buffer Upon entry, this holds the new CPU register value.
360
361 @retval EFI_SUCCESS The register was written to Save State.
362 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
363 @retval EFI_INVALID_PARAMETER ProcessorIndex or Width is not correct.
364
365 **/
366 EFI_STATUS
367 EFIAPI
368 WriteSaveStateRegister (
369 IN UINTN CpuIndex,
370 IN EFI_SMM_SAVE_STATE_REGISTER Register,
371 IN UINTN Width,
372 IN CONST VOID *Buffer
373 );
374
375 extern CONST UINT8 gcSmmInitTemplate[];
376 extern CONST UINT16 gcSmmInitSize;
377 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0;
378 extern UINT32 mSmmCr0;
379 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3;
380 extern UINT32 mSmmCr4;
381 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4;
382 X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack;
383 X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported;
384 extern BOOLEAN mCetSupported;
385
386 /**
387 Semaphore operation for all processor relocate SMMBase.
388 **/
389 VOID
390 EFIAPI
391 SmmRelocationSemaphoreComplete (
392 VOID
393 );
394
395 ///
396 /// The type of SMM CPU Information
397 ///
398 typedef struct {
399 SPIN_LOCK *Busy;
400 volatile EFI_AP_PROCEDURE2 Procedure;
401 volatile VOID *Parameter;
402 volatile UINT32 *Run;
403 volatile BOOLEAN *Present;
404 PROCEDURE_TOKEN *Token;
405 EFI_STATUS *Status;
406 } SMM_CPU_DATA_BLOCK;
407
408 typedef enum {
409 SmmCpuSyncModeTradition,
410 SmmCpuSyncModeRelaxedAp,
411 SmmCpuSyncModeMax
412 } SMM_CPU_SYNC_MODE;
413
414 typedef struct {
415 //
416 // Pointer to an array. The array should be located immediately after this structure
417 // so that UC cache-ability can be set together.
418 //
419 SMM_CPU_DATA_BLOCK *CpuData;
420 volatile UINT32 *Counter;
421 volatile UINT32 BspIndex;
422 volatile BOOLEAN *InsideSmm;
423 volatile BOOLEAN *AllCpusInSync;
424 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode;
425 volatile BOOLEAN SwitchBsp;
426 volatile BOOLEAN *CandidateBsp;
427 volatile BOOLEAN AllApArrivedWithException;
428 EFI_AP_PROCEDURE StartupProcedure;
429 VOID *StartupProcArgs;
430 } SMM_DISPATCHER_MP_SYNC_DATA;
431
432 #define SMM_PSD_OFFSET 0xfb00
433
434 ///
435 /// All global semaphores' pointer
436 ///
437 typedef struct {
438 volatile UINT32 *Counter;
439 volatile BOOLEAN *InsideSmm;
440 volatile BOOLEAN *AllCpusInSync;
441 SPIN_LOCK *PFLock;
442 SPIN_LOCK *CodeAccessCheckLock;
443 } SMM_CPU_SEMAPHORE_GLOBAL;
444
445 ///
446 /// All semaphores for each processor
447 ///
448 typedef struct {
449 SPIN_LOCK *Busy;
450 volatile UINT32 *Run;
451 volatile BOOLEAN *Present;
452 SPIN_LOCK *Token;
453 } SMM_CPU_SEMAPHORE_CPU;
454
455 ///
456 /// All semaphores' information
457 ///
458 typedef struct {
459 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
460 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu;
461 } SMM_CPU_SEMAPHORES;
462
463 extern IA32_DESCRIPTOR gcSmiGdtr;
464 extern EFI_PHYSICAL_ADDRESS mGdtBuffer;
465 extern UINTN mGdtBufferSize;
466 extern IA32_DESCRIPTOR gcSmiIdtr;
467 extern VOID *gcSmiIdtrPtr;
468 extern UINT64 gPhyMask;
469 extern SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData;
470 extern UINTN mSmmStackArrayBase;
471 extern UINTN mSmmStackArrayEnd;
472 extern UINTN mSmmStackSize;
473 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService;
474 extern IA32_DESCRIPTOR gcSmiInitGdtr;
475 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
476 extern UINTN mSemaphoreSize;
477 extern SPIN_LOCK *mPFLock;
478 extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
479 extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
480 extern UINTN mSmmCpuSmramRangeCount;
481 extern UINT8 mPhysicalAddressBits;
482
483 //
484 // Copy of the PcdPteMemoryEncryptionAddressOrMask
485 //
486 extern UINT64 mAddressEncMask;
487
488 /**
489 Create 4G PageTable in SMRAM.
490
491 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
492 @return PageTable Address
493
494 **/
495 UINT32
496 Gen4GPageTable (
497 IN BOOLEAN Is32BitPageTable
498 );
499
500 /**
501 Initialize global data for MP synchronization.
502
503 @param Stacks Base address of SMI stack buffer for all processors.
504 @param StackSize Stack size for each processor in SMM.
505 @param ShadowStackSize Shadow Stack size for each processor in SMM.
506
507 **/
508 UINT32
509 InitializeMpServiceData (
510 IN VOID *Stacks,
511 IN UINTN StackSize,
512 IN UINTN ShadowStackSize
513 );
514
515 /**
516 Initialize Timer for SMM AP Sync.
517
518 **/
519 VOID
520 InitializeSmmTimer (
521 VOID
522 );
523
524 /**
525 Start Timer for SMM AP Sync.
526
527 **/
528 UINT64
529 EFIAPI
530 StartSyncTimer (
531 VOID
532 );
533
534 /**
535 Check if the SMM AP Sync timer is timeout.
536
537 @param Timer The start timer from the begin.
538
539 **/
540 BOOLEAN
541 EFIAPI
542 IsSyncTimerTimeout (
543 IN UINT64 Timer
544 );
545
546 /**
547 Initialize IDT for SMM Stack Guard.
548
549 **/
550 VOID
551 EFIAPI
552 InitializeIDTSmmStackGuard (
553 VOID
554 );
555
556 /**
557 Initialize IDT IST Field.
558
559 @param[in] ExceptionType Exception type.
560 @param[in] Ist IST value.
561
562 **/
563 VOID
564 EFIAPI
565 InitializeIdtIst (
566 IN EFI_EXCEPTION_TYPE ExceptionType,
567 IN UINT8 Ist
568 );
569
570 /**
571 Initialize Gdt for all processors.
572
573 @param[in] Cr3 CR3 value.
574 @param[out] GdtStepSize The step size for GDT table.
575
576 @return GdtBase for processor 0.
577 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
578 **/
579 VOID *
580 InitGdt (
581 IN UINTN Cr3,
582 OUT UINTN *GdtStepSize
583 );
584
585 /**
586
587 Register the SMM Foundation entry point.
588
589 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
590 @param SmmEntryPoint SMM Foundation EntryPoint
591
592 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
593
594 **/
595 EFI_STATUS
596 EFIAPI
597 RegisterSmmEntry (
598 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL *This,
599 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
600 );
601
602 /**
603 Create PageTable for SMM use.
604
605 @return PageTable Address
606
607 **/
608 UINT32
609 SmmInitPageTable (
610 VOID
611 );
612
613 /**
614 Schedule a procedure to run on the specified CPU.
615
616 @param Procedure The address of the procedure to run
617 @param CpuIndex Target CPU number
618 @param ProcArguments The parameter to pass to the procedure
619
620 @retval EFI_INVALID_PARAMETER CpuNumber not valid
621 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
622 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
623 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
624 @retval EFI_SUCCESS - The procedure has been successfully scheduled
625
626 **/
627 EFI_STATUS
628 EFIAPI
629 SmmStartupThisAp (
630 IN EFI_AP_PROCEDURE Procedure,
631 IN UINTN CpuIndex,
632 IN OUT VOID *ProcArguments OPTIONAL
633 );
634
635 /**
636 Schedule a procedure to run on the specified CPU in a blocking fashion.
637
638 @param Procedure The address of the procedure to run
639 @param CpuIndex Target CPU Index
640 @param ProcArguments The parameter to pass to the procedure
641
642 @retval EFI_INVALID_PARAMETER CpuNumber not valid
643 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
644 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
645 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
646 @retval EFI_SUCCESS The procedure has been successfully scheduled
647
648 **/
649 EFI_STATUS
650 EFIAPI
651 SmmBlockingStartupThisAp (
652 IN EFI_AP_PROCEDURE Procedure,
653 IN UINTN CpuIndex,
654 IN OUT VOID *ProcArguments OPTIONAL
655 );
656
657 /**
658 This function sets the attributes for the memory region specified by BaseAddress and
659 Length from their current attributes to the attributes specified by Attributes.
660
661 @param[in] BaseAddress The physical address that is the start address of a memory region.
662 @param[in] Length The size in bytes of the memory region.
663 @param[in] Attributes The bit mask of attributes to set for the memory region.
664
665 @retval EFI_SUCCESS The attributes were set for the memory region.
666 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
667 BaseAddress and Length cannot be modified.
668 @retval EFI_INVALID_PARAMETER Length is zero.
669 Attributes specified an illegal combination of attributes that
670 cannot be set together.
671 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
672 the memory resource range.
673 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
674 resource range specified by BaseAddress and Length.
675 The bit mask of attributes is not support for the memory resource
676 range specified by BaseAddress and Length.
677
678 **/
679 EFI_STATUS
680 SmmSetMemoryAttributes (
681 IN EFI_PHYSICAL_ADDRESS BaseAddress,
682 IN UINT64 Length,
683 IN UINT64 Attributes
684 );
685
686 /**
687 This function clears the attributes for the memory region specified by BaseAddress and
688 Length from their current attributes to the attributes specified by Attributes.
689
690 @param[in] BaseAddress The physical address that is the start address of a memory region.
691 @param[in] Length The size in bytes of the memory region.
692 @param[in] Attributes The bit mask of attributes to clear for the memory region.
693
694 @retval EFI_SUCCESS The attributes were cleared for the memory region.
695 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
696 BaseAddress and Length cannot be modified.
697 @retval EFI_INVALID_PARAMETER Length is zero.
698 Attributes specified an illegal combination of attributes that
699 cannot be set together.
700 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
701 the memory resource range.
702 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
703 resource range specified by BaseAddress and Length.
704 The bit mask of attributes is not support for the memory resource
705 range specified by BaseAddress and Length.
706
707 **/
708 EFI_STATUS
709 SmmClearMemoryAttributes (
710 IN EFI_PHYSICAL_ADDRESS BaseAddress,
711 IN UINT64 Length,
712 IN UINT64 Attributes
713 );
714
715 /**
716 Initialize MP synchronization data.
717
718 **/
719 VOID
720 EFIAPI
721 InitializeMpSyncData (
722 VOID
723 );
724
725 /**
726
727 Find out SMRAM information including SMRR base and SMRR size.
728
729 @param SmrrBase SMRR base
730 @param SmrrSize SMRR size
731
732 **/
733 VOID
734 FindSmramInfo (
735 OUT UINT32 *SmrrBase,
736 OUT UINT32 *SmrrSize
737 );
738
739 /**
740 Relocate SmmBases for each processor.
741
742 Execute on first boot and all S3 resumes
743
744 **/
745 VOID
746 EFIAPI
747 SmmRelocateBases (
748 VOID
749 );
750
751 /**
752 Page Fault handler for SMM use.
753
754 @param InterruptType Defines the type of interrupt or exception that
755 occurred on the processor.This parameter is processor architecture specific.
756 @param SystemContext A pointer to the processor context when
757 the interrupt occurred on the processor.
758 **/
759 VOID
760 EFIAPI
761 SmiPFHandler (
762 IN EFI_EXCEPTION_TYPE InterruptType,
763 IN EFI_SYSTEM_CONTEXT SystemContext
764 );
765
766 /**
767 Perform the remaining tasks.
768
769 **/
770 VOID
771 PerformRemainingTasks (
772 VOID
773 );
774
775 /**
776 Perform the pre tasks.
777
778 **/
779 VOID
780 PerformPreTasks (
781 VOID
782 );
783
784 /**
785 Initialize MSR spin lock by MSR index.
786
787 @param MsrIndex MSR index value.
788
789 **/
790 VOID
791 InitMsrSpinLockByIndex (
792 IN UINT32 MsrIndex
793 );
794
795 /**
796 Hook return address of SMM Save State so that semaphore code
797 can be executed immediately after AP exits SMM to indicate to
798 the BSP that an AP has exited SMM after SMBASE relocation.
799
800 @param[in] CpuIndex The processor index.
801 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
802 immediately after AP exits SMM.
803
804 **/
805 VOID
806 SemaphoreHook (
807 IN UINTN CpuIndex,
808 IN volatile BOOLEAN *RebasedFlag
809 );
810
811 /**
812 Configure SMM Code Access Check feature for all processors.
813 SMM Feature Control MSR will be locked after configuration.
814 **/
815 VOID
816 ConfigSmmCodeAccessCheck (
817 VOID
818 );
819
820 /**
821 Hook the code executed immediately after an RSM instruction on the currently
822 executing CPU. The mode of code executed immediately after RSM must be
823 detected, and the appropriate hook must be selected. Always clear the auto
824 HALT restart flag if it is set.
825
826 @param[in] CpuIndex The processor index for the currently
827 executing CPU.
828 @param[in] CpuState Pointer to SMRAM Save State Map for the
829 currently executing CPU.
830 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
831 32-bit mode from 64-bit SMM.
832 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
833 same mode as SMM.
834
835 @retval The value of the original instruction pointer before it was hooked.
836
837 **/
838 UINT64
839 EFIAPI
840 HookReturnFromSmm (
841 IN UINTN CpuIndex,
842 SMRAM_SAVE_STATE_MAP *CpuState,
843 UINT64 NewInstructionPointer32,
844 UINT64 NewInstructionPointer
845 );
846
847 /**
848 Get the size of the SMI Handler in bytes.
849
850 @retval The size, in bytes, of the SMI Handler.
851
852 **/
853 UINTN
854 EFIAPI
855 GetSmiHandlerSize (
856 VOID
857 );
858
859 /**
860 Install the SMI handler for the CPU specified by CpuIndex. This function
861 is called by the CPU that was elected as monarch during System Management
862 Mode initialization.
863
864 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
865 The value must be between 0 and the NumberOfCpus field
866 in the System Management System Table (SMST).
867 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
868 @param[in] SmiStack The stack to use when an SMI is processed by the
869 the CPU specified by CpuIndex.
870 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
871 processed by the CPU specified by CpuIndex.
872 @param[in] GdtBase The base address of the GDT to use when an SMI is
873 processed by the CPU specified by CpuIndex.
874 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
875 processed by the CPU specified by CpuIndex.
876 @param[in] IdtBase The base address of the IDT to use when an SMI is
877 processed by the CPU specified by CpuIndex.
878 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
879 processed by the CPU specified by CpuIndex.
880 @param[in] Cr3 The base address of the page tables to use when an SMI
881 is processed by the CPU specified by CpuIndex.
882 **/
883 VOID
884 EFIAPI
885 InstallSmiHandler (
886 IN UINTN CpuIndex,
887 IN UINT32 SmBase,
888 IN VOID *SmiStack,
889 IN UINTN StackSize,
890 IN UINTN GdtBase,
891 IN UINTN GdtSize,
892 IN UINTN IdtBase,
893 IN UINTN IdtSize,
894 IN UINT32 Cr3
895 );
896
897 /**
898 Search module name by input IP address and output it.
899
900 @param CallerIpAddress Caller instruction pointer.
901
902 **/
903 VOID
904 DumpModuleInfoByIp (
905 IN UINTN CallerIpAddress
906 );
907
908 /**
909 This function sets memory attribute according to MemoryAttributesTable.
910 **/
911 VOID
912 SetMemMapAttributes (
913 VOID
914 );
915
916 /**
917 This function sets UEFI memory attribute according to UEFI memory map.
918 **/
919 VOID
920 SetUefiMemMapAttributes (
921 VOID
922 );
923
924 /**
925 Return if the Address is forbidden as SMM communication buffer.
926
927 @param[in] Address the address to be checked
928
929 @return TRUE The address is forbidden as SMM communication buffer.
930 @return FALSE The address is allowed as SMM communication buffer.
931 **/
932 BOOLEAN
933 IsSmmCommBufferForbiddenAddress (
934 IN UINT64 Address
935 );
936
937 /**
938 This function caches the UEFI memory map information.
939 **/
940 VOID
941 GetUefiMemoryMap (
942 VOID
943 );
944
945 /**
946 This function sets memory attribute for page table.
947 **/
948 VOID
949 SetPageTableAttributes (
950 VOID
951 );
952
953 /**
954 This function sets the attributes for the memory region specified by BaseAddress and
955 Length from their current attributes to the attributes specified by Attributes.
956
957 @param[in] PageTableBase The page table base.
958 @param[in] EnablePML5Paging If PML5 paging is enabled.
959 @param[in] BaseAddress The physical address that is the start address of a memory region.
960 @param[in] Length The size in bytes of the memory region.
961 @param[in] Attributes The bit mask of attributes to set for the memory region.
962 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
963
964 @retval EFI_SUCCESS The attributes were set for the memory region.
965 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
966 BaseAddress and Length cannot be modified.
967 @retval EFI_INVALID_PARAMETER Length is zero.
968 Attributes specified an illegal combination of attributes that
969 cannot be set together.
970 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
971 the memory resource range.
972 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
973 resource range specified by BaseAddress and Length.
974 The bit mask of attributes is not support for the memory resource
975 range specified by BaseAddress and Length.
976
977 **/
978 EFI_STATUS
979 SmmSetMemoryAttributesEx (
980 IN UINTN PageTableBase,
981 IN BOOLEAN EnablePML5Paging,
982 IN EFI_PHYSICAL_ADDRESS BaseAddress,
983 IN UINT64 Length,
984 IN UINT64 Attributes,
985 OUT BOOLEAN *IsSplitted OPTIONAL
986 );
987
988 /**
989 This function clears the attributes for the memory region specified by BaseAddress and
990 Length from their current attributes to the attributes specified by Attributes.
991
992 @param[in] PageTableBase The page table base.
993 @param[in] EnablePML5Paging If PML5 paging is enabled.
994 @param[in] BaseAddress The physical address that is the start address of a memory region.
995 @param[in] Length The size in bytes of the memory region.
996 @param[in] Attributes The bit mask of attributes to clear for the memory region.
997 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
998
999 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1000 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
1001 BaseAddress and Length cannot be modified.
1002 @retval EFI_INVALID_PARAMETER Length is zero.
1003 Attributes specified an illegal combination of attributes that
1004 cannot be set together.
1005 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
1006 the memory resource range.
1007 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
1008 resource range specified by BaseAddress and Length.
1009 The bit mask of attributes is not support for the memory resource
1010 range specified by BaseAddress and Length.
1011
1012 **/
1013 EFI_STATUS
1014 SmmClearMemoryAttributesEx (
1015 IN UINTN PageTableBase,
1016 IN BOOLEAN EnablePML5Paging,
1017 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1018 IN UINT64 Length,
1019 IN UINT64 Attributes,
1020 OUT BOOLEAN *IsSplitted OPTIONAL
1021 );
1022
1023 /**
1024 This API provides a way to allocate memory for page table.
1025
1026 This API can be called more once to allocate memory for page tables.
1027
1028 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
1029 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
1030 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
1031 returned.
1032
1033 @param Pages The number of 4 KB pages to allocate.
1034
1035 @return A pointer to the allocated buffer or NULL if allocation fails.
1036
1037 **/
1038 VOID *
1039 AllocatePageTableMemory (
1040 IN UINTN Pages
1041 );
1042
1043 /**
1044 Allocate pages for code.
1045
1046 @param[in] Pages Number of pages to be allocated.
1047
1048 @return Allocated memory.
1049 **/
1050 VOID *
1051 AllocateCodePages (
1052 IN UINTN Pages
1053 );
1054
1055 /**
1056 Allocate aligned pages for code.
1057
1058 @param[in] Pages Number of pages to be allocated.
1059 @param[in] Alignment The requested alignment of the allocation.
1060 Must be a power of two.
1061 If Alignment is zero, then byte alignment is used.
1062
1063 @return Allocated memory.
1064 **/
1065 VOID *
1066 AllocateAlignedCodePages (
1067 IN UINTN Pages,
1068 IN UINTN Alignment
1069 );
1070
1071 //
1072 // S3 related global variable and function prototype.
1073 //
1074
1075 extern BOOLEAN mSmmS3Flag;
1076
1077 /**
1078 Initialize SMM S3 resume state structure used during S3 Resume.
1079
1080 @param[in] Cr3 The base address of the page tables to use in SMM.
1081
1082 **/
1083 VOID
1084 InitSmmS3ResumeState (
1085 IN UINT32 Cr3
1086 );
1087
1088 /**
1089 Get ACPI CPU data.
1090
1091 **/
1092 VOID
1093 GetAcpiCpuData (
1094 VOID
1095 );
1096
1097 /**
1098 Restore SMM Configuration in S3 boot path.
1099
1100 **/
1101 VOID
1102 RestoreSmmConfigurationInS3 (
1103 VOID
1104 );
1105
1106 /**
1107 Get ACPI S3 enable flag.
1108
1109 **/
1110 VOID
1111 GetAcpiS3EnableFlag (
1112 VOID
1113 );
1114
1115 /**
1116 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1117
1118 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1119 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1120 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1121
1122 **/
1123 VOID
1124 TransferApToSafeState (
1125 IN UINTN ApHltLoopCode,
1126 IN UINTN TopOfStack,
1127 IN UINTN NumberToFinishAddress
1128 );
1129
1130 /**
1131 Set ShadowStack memory.
1132
1133 @param[in] Cr3 The page table base address.
1134 @param[in] BaseAddress The physical address that is the start address of a memory region.
1135 @param[in] Length The size in bytes of the memory region.
1136
1137 @retval EFI_SUCCESS The shadow stack memory is set.
1138 **/
1139 EFI_STATUS
1140 SetShadowStack (
1141 IN UINTN Cr3,
1142 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1143 IN UINT64 Length
1144 );
1145
1146 /**
1147 Set not present memory.
1148
1149 @param[in] Cr3 The page table base address.
1150 @param[in] BaseAddress The physical address that is the start address of a memory region.
1151 @param[in] Length The size in bytes of the memory region.
1152
1153 @retval EFI_SUCCESS The not present memory is set.
1154 **/
1155 EFI_STATUS
1156 SetNotPresentPage (
1157 IN UINTN Cr3,
1158 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1159 IN UINT64 Length
1160 );
1161
1162 /**
1163 Initialize the shadow stack related data structure.
1164
1165 @param CpuIndex The index of CPU.
1166 @param ShadowStack The bottom of the shadow stack for this CPU.
1167 **/
1168 VOID
1169 InitShadowStack (
1170 IN UINTN CpuIndex,
1171 IN VOID *ShadowStack
1172 );
1173
1174 /**
1175 This function set given attributes of the memory region specified by
1176 BaseAddress and Length.
1177
1178 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1179 @param BaseAddress The physical address that is the start address of
1180 a memory region.
1181 @param Length The size in bytes of the memory region.
1182 @param Attributes The bit mask of attributes to set for the memory
1183 region.
1184
1185 @retval EFI_SUCCESS The attributes were set for the memory region.
1186 @retval EFI_INVALID_PARAMETER Length is zero.
1187 Attributes specified an illegal combination of
1188 attributes that cannot be set together.
1189 @retval EFI_UNSUPPORTED The processor does not support one or more
1190 bytes of the memory resource range specified
1191 by BaseAddress and Length.
1192 The bit mask of attributes is not supported for
1193 the memory resource range specified by
1194 BaseAddress and Length.
1195
1196 **/
1197 EFI_STATUS
1198 EFIAPI
1199 EdkiiSmmSetMemoryAttributes (
1200 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1201 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1202 IN UINT64 Length,
1203 IN UINT64 Attributes
1204 );
1205
1206 /**
1207 This function clears given attributes of the memory region specified by
1208 BaseAddress and Length.
1209
1210 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1211 @param BaseAddress The physical address that is the start address of
1212 a memory region.
1213 @param Length The size in bytes of the memory region.
1214 @param Attributes The bit mask of attributes to clear for the memory
1215 region.
1216
1217 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1218 @retval EFI_INVALID_PARAMETER Length is zero.
1219 Attributes specified an illegal combination of
1220 attributes that cannot be cleared together.
1221 @retval EFI_UNSUPPORTED The processor does not support one or more
1222 bytes of the memory resource range specified
1223 by BaseAddress and Length.
1224 The bit mask of attributes is not supported for
1225 the memory resource range specified by
1226 BaseAddress and Length.
1227
1228 **/
1229 EFI_STATUS
1230 EFIAPI
1231 EdkiiSmmClearMemoryAttributes (
1232 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1233 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1234 IN UINT64 Length,
1235 IN UINT64 Attributes
1236 );
1237
1238 /**
1239 This function retrieves the attributes of the memory region specified by
1240 BaseAddress and Length. If different attributes are got from different part
1241 of the memory region, EFI_NO_MAPPING will be returned.
1242
1243 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1244 @param BaseAddress The physical address that is the start address of
1245 a memory region.
1246 @param Length The size in bytes of the memory region.
1247 @param Attributes Pointer to attributes returned.
1248
1249 @retval EFI_SUCCESS The attributes got for the memory region.
1250 @retval EFI_INVALID_PARAMETER Length is zero.
1251 Attributes is NULL.
1252 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1253 region.
1254 @retval EFI_UNSUPPORTED The processor does not support one or more
1255 bytes of the memory resource range specified
1256 by BaseAddress and Length.
1257
1258 **/
1259 EFI_STATUS
1260 EFIAPI
1261 EdkiiSmmGetMemoryAttributes (
1262 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL *This,
1263 IN EFI_PHYSICAL_ADDRESS BaseAddress,
1264 IN UINT64 Length,
1265 IN UINT64 *Attributes
1266 );
1267
1268 /**
1269 This function fixes up the address of the global variable or function
1270 referred in SmmInit assembly files to be the absolute address.
1271 **/
1272 VOID
1273 EFIAPI
1274 PiSmmCpuSmmInitFixupAddress (
1275 );
1276
1277 /**
1278 This function fixes up the address of the global variable or function
1279 referred in SmiEntry assembly files to be the absolute address.
1280 **/
1281 VOID
1282 EFIAPI
1283 PiSmmCpuSmiEntryFixupAddress (
1284 );
1285
1286 /**
1287 This function reads CR2 register when on-demand paging is enabled
1288 for 64 bit and no action for 32 bit.
1289
1290 @param[out] *Cr2 Pointer to variable to hold CR2 register value.
1291 **/
1292 VOID
1293 SaveCr2 (
1294 OUT UINTN *Cr2
1295 );
1296
1297 /**
1298 This function writes into CR2 register when on-demand paging is enabled
1299 for 64 bit and no action for 32 bit.
1300
1301 @param[in] Cr2 Value to write into CR2 register.
1302 **/
1303 VOID
1304 RestoreCr2 (
1305 IN UINTN Cr2
1306 );
1307
1308 /**
1309 Schedule a procedure to run on the specified CPU.
1310
1311 @param[in] Procedure The address of the procedure to run
1312 @param[in] CpuIndex Target CPU Index
1313 @param[in,out] ProcArguments The parameter to pass to the procedure
1314 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1315 procedure in a blocking or non-blocking fashion. If it is NULL the
1316 call is blocking, and the call will not return until the AP has
1317 completed the procedure. If the token is not NULL, the call will
1318 return immediately. The caller can check whether the procedure has
1319 completed with CheckOnProcedure or WaitForProcedure.
1320 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for the APs to finish
1321 execution of Procedure, either for blocking or non-blocking mode.
1322 Zero means infinity. If the timeout expires before all APs return
1323 from Procedure, then Procedure on the failed APs is terminated. If
1324 the timeout expires in blocking mode, the call returns EFI_TIMEOUT.
1325 If the timeout expires in non-blocking mode, the timeout determined
1326 can be through CheckOnProcedure or WaitForProcedure.
1327 Note that timeout support is optional. Whether an implementation
1328 supports this feature can be determined via the Attributes data
1329 member.
1330 @param[in,out] CpuStatus This optional pointer may be used to get the status code returned
1331 by Procedure when it completes execution on the target AP, or with
1332 EFI_TIMEOUT if the Procedure fails to complete within the optional
1333 timeout. The implementation will update this variable with
1334 EFI_NOT_READY prior to starting Procedure on the target AP.
1335
1336 @retval EFI_INVALID_PARAMETER CpuNumber not valid
1337 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
1338 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
1339 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
1340 @retval EFI_SUCCESS The procedure has been successfully scheduled
1341
1342 **/
1343 EFI_STATUS
1344 InternalSmmStartupThisAp (
1345 IN EFI_AP_PROCEDURE2 Procedure,
1346 IN UINTN CpuIndex,
1347 IN OUT VOID *ProcArguments OPTIONAL,
1348 IN OUT MM_COMPLETION *Token,
1349 IN UINTN TimeoutInMicroseconds,
1350 IN OUT EFI_STATUS *CpuStatus
1351 );
1352
1353 /**
1354 Checks whether the input token is the current used token.
1355
1356 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1357 BroadcastProcedure.
1358
1359 @retval TRUE The input token is the current used token.
1360 @retval FALSE The input token is not the current used token.
1361 **/
1362 BOOLEAN
1363 IsTokenInUse (
1364 IN SPIN_LOCK *Token
1365 );
1366
1367 /**
1368 Checks status of specified AP.
1369
1370 This function checks whether the specified AP has finished the task assigned
1371 by StartupThisAP(), and whether timeout expires.
1372
1373 @param[in] Token This parameter describes the token that was passed into DispatchProcedure or
1374 BroadcastProcedure.
1375
1376 @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().
1377 @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.
1378 **/
1379 EFI_STATUS
1380 IsApReady (
1381 IN SPIN_LOCK *Token
1382 );
1383
1384 /**
1385 Check whether it is an present AP.
1386
1387 @param CpuIndex The AP index which calls this function.
1388
1389 @retval TRUE It's a present AP.
1390 @retval TRUE This is not an AP or it is not present.
1391
1392 **/
1393 BOOLEAN
1394 IsPresentAp (
1395 IN UINTN CpuIndex
1396 );
1397
1398 /**
1399 Worker function to execute a caller provided function on all enabled APs.
1400
1401 @param[in] Procedure A pointer to the function to be run on
1402 enabled APs of the system.
1403 @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for
1404 APs to return from Procedure, either for
1405 blocking or non-blocking mode.
1406 @param[in,out] ProcedureArguments The parameter passed into Procedure for
1407 all APs.
1408 @param[in,out] Token This is an optional parameter that allows the caller to execute the
1409 procedure in a blocking or non-blocking fashion. If it is NULL the
1410 call is blocking, and the call will not return until the AP has
1411 completed the procedure. If the token is not NULL, the call will
1412 return immediately. The caller can check whether the procedure has
1413 completed with CheckOnProcedure or WaitForProcedure.
1414 @param[in,out] CPUStatus This optional pointer may be used to get the status code returned
1415 by Procedure when it completes execution on the target AP, or with
1416 EFI_TIMEOUT if the Procedure fails to complete within the optional
1417 timeout. The implementation will update this variable with
1418 EFI_NOT_READY prior to starting Procedure on the target AP.
1419
1420 @retval EFI_SUCCESS In blocking mode, all APs have finished before
1421 the timeout expired.
1422 @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
1423 to all enabled APs.
1424 @retval others Failed to Startup all APs.
1425
1426 **/
1427 EFI_STATUS
1428 InternalSmmStartupAllAPs (
1429 IN EFI_AP_PROCEDURE2 Procedure,
1430 IN UINTN TimeoutInMicroseconds,
1431 IN OUT VOID *ProcedureArguments OPTIONAL,
1432 IN OUT MM_COMPLETION *Token,
1433 IN OUT EFI_STATUS *CPUStatus
1434 );
1435
1436 /**
1437
1438 Register the SMM Foundation entry point.
1439
1440 @param[in] Procedure A pointer to the code stream to be run on the designated target AP
1441 of the system. Type EFI_AP_PROCEDURE is defined below in Volume 2
1442 with the related definitions of
1443 EFI_MP_SERVICES_PROTOCOL.StartupAllAPs.
1444 If caller may pass a value of NULL to deregister any existing
1445 startup procedure.
1446 @param[in,out] ProcedureArguments Allows the caller to pass a list of parameters to the code that is
1447 run by the AP. It is an optional common mailbox between APs and
1448 the caller to share information
1449
1450 @retval EFI_SUCCESS The Procedure has been set successfully.
1451 @retval EFI_INVALID_PARAMETER The Procedure is NULL but ProcedureArguments not NULL.
1452
1453 **/
1454 EFI_STATUS
1455 RegisterStartupProcedure (
1456 IN EFI_AP_PROCEDURE Procedure,
1457 IN OUT VOID *ProcedureArguments OPTIONAL
1458 );
1459
1460 /**
1461 Initialize PackageBsp Info. Processor specified by mPackageFirstThreadIndex[PackageIndex]
1462 will do the package-scope register programming. Set default CpuIndex to (UINT32)-1, which
1463 means not specified yet.
1464
1465 **/
1466 VOID
1467 InitPackageFirstThreadIndexInfo (
1468 VOID
1469 );
1470
1471 /**
1472 Allocate buffer for SpinLock and Wrapper function buffer.
1473
1474 **/
1475 VOID
1476 InitializeDataForMmMp (
1477 VOID
1478 );
1479
1480 /**
1481 Return whether access to non-SMRAM is restricted.
1482
1483 @retval TRUE Access to non-SMRAM is restricted.
1484 @retval FALSE Access to non-SMRAM is not restricted.
1485 **/
1486 BOOLEAN
1487 IsRestrictedMemoryAccess (
1488 VOID
1489 );
1490
1491 /**
1492 Choose blocking or non-blocking mode to Wait for all APs.
1493
1494 @param[in] This A pointer to the EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL instance.
1495 @param[in] BlockingMode Blocking or non-blocking mode.
1496
1497 @retval EFI_SUCCESS All APs have arrived SMM mode except SMI disabled APs.
1498 @retval EFI_TIMEOUT There are APs not in SMM mode in given timeout constraint.
1499
1500 **/
1501 EFI_STATUS
1502 EFIAPI
1503 SmmCpuRendezvous (
1504 IN EDKII_SMM_CPU_RENDEZVOUS_PROTOCOL *This,
1505 IN BOOLEAN BlockingMode
1506 );
1507
1508 /**
1509 Insure when this function returns, no AP will execute normal mode code before entering SMM, except SMI disabled APs.
1510
1511 **/
1512 VOID
1513 SmmWaitForApArrival (
1514 VOID
1515 );
1516
1517 #endif