2 Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
4 Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>
5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
7 SPDX-License-Identifier: BSD-2-Clause-Patent
11 #ifndef _CPU_PISMMCPUDXESMM_H_
12 #define _CPU_PISMMCPUDXESMM_H_
16 #include <Protocol/MpService.h>
17 #include <Protocol/SmmConfiguration.h>
18 #include <Protocol/SmmCpu.h>
19 #include <Protocol/SmmAccess2.h>
20 #include <Protocol/SmmReadyToLock.h>
21 #include <Protocol/SmmCpuService.h>
22 #include <Protocol/SmmMemoryAttribute.h>
24 #include <Guid/AcpiS3Context.h>
25 #include <Guid/MemoryAttributesTable.h>
26 #include <Guid/PiSmmMemoryAttributesTable.h>
28 #include <Library/BaseLib.h>
29 #include <Library/IoLib.h>
30 #include <Library/TimerLib.h>
31 #include <Library/SynchronizationLib.h>
32 #include <Library/DebugLib.h>
33 #include <Library/BaseMemoryLib.h>
34 #include <Library/PcdLib.h>
35 #include <Library/MtrrLib.h>
36 #include <Library/SmmCpuPlatformHookLib.h>
37 #include <Library/SmmServicesTableLib.h>
38 #include <Library/MemoryAllocationLib.h>
39 #include <Library/UefiBootServicesTableLib.h>
40 #include <Library/UefiRuntimeServicesTableLib.h>
41 #include <Library/DebugAgentLib.h>
42 #include <Library/UefiLib.h>
43 #include <Library/HobLib.h>
44 #include <Library/LocalApicLib.h>
45 #include <Library/UefiCpuLib.h>
46 #include <Library/CpuExceptionHandlerLib.h>
47 #include <Library/ReportStatusCodeLib.h>
48 #include <Library/SmmCpuFeaturesLib.h>
49 #include <Library/PeCoffGetEntryPointLib.h>
50 #include <Library/RegisterCpuFeaturesLib.h>
52 #include <AcpiCpuData.h>
53 #include <CpuHotPlugData.h>
55 #include <Register/Cpuid.h>
56 #include <Register/Msr.h>
58 #include "CpuService.h"
59 #include "SmmProfile.h"
64 #define CPUID_CET_SS BIT7
65 #define CPUID_CET_IBT BIT20
67 #define CR4_CET_ENABLE BIT23
69 #define MSR_IA32_S_CET 0x6A2
70 #define MSR_IA32_PL0_SSP 0x6A4
71 #define MSR_IA32_INTERRUPT_SSP_TABLE_ADDR 0x6A8
75 // enable shadow stacks
77 // enable the WRSS{D,Q}W instructions.
79 // enable tracking of indirect call/jmp targets to be ENDBRANCH instruction.
81 // enable legacy compatibility treatment for indirect call/jmp tracking.
83 // enable use of no-track prefix on indirect call/jmp.
85 // disable suppression of CET indirect branch tracking on legacy compatibility.
86 UINT32 SUPPRESS_DIS
:1;
88 // indirect branch tracking is suppressed.
89 // This bit can be written to 1 only if TRACKER is written as IDLE.
91 // Value of the endbranch state machine
92 // Values: IDLE (0), WAIT_FOR_ENDBRANCH(1).
94 // linear address of a bitmap in memory indicating valid
95 // pages as target of CALL/JMP_indirect that do not land on ENDBRANCH when CET is enabled
96 // and not suppressed. Valid when ENDBR_EN is 1. Must be machine canonical when written on
97 // parts that support 64 bit mode. On parts that do not support 64 bit mode, the bits 63:32 are
98 // reserved and must be 0. This value is extended by 12 bits at the low end to form the base address
99 // (this automatically aligns the address on a 4-Kbyte boundary).
100 UINT32 EB_LEG_BITMAP_BASE_low
:12;
101 UINT32 EB_LEG_BITMAP_BASE_high
:32;
107 // MSRs required for configuration of SMM Code Access Check
109 #define EFI_MSR_SMM_MCA_CAP 0x17D
110 #define SMM_CODE_ACCESS_CHK_BIT BIT58
112 #define SMM_FEATURE_CONTROL_LOCK_BIT BIT0
113 #define SMM_CODE_CHK_EN_BIT BIT2
118 #define IA32_PG_P BIT0
119 #define IA32_PG_RW BIT1
120 #define IA32_PG_U BIT2
121 #define IA32_PG_WT BIT3
122 #define IA32_PG_CD BIT4
123 #define IA32_PG_A BIT5
124 #define IA32_PG_D BIT6
125 #define IA32_PG_PS BIT7
126 #define IA32_PG_PAT_2M BIT12
127 #define IA32_PG_PAT_4K IA32_PG_PS
128 #define IA32_PG_PMNT BIT62
129 #define IA32_PG_NX BIT63
131 #define PAGE_ATTRIBUTE_BITS (IA32_PG_D | IA32_PG_A | IA32_PG_U | IA32_PG_RW | IA32_PG_P)
133 // Bits 1, 2, 5, 6 are reserved in the IA32 PAE PDPTE
134 // X64 PAE PDPTE does not have such restriction
136 #define IA32_PAE_PDPTE_ATTRIBUTE_BITS (IA32_PG_P)
138 #define PAGE_PROGATE_BITS (IA32_PG_NX | PAGE_ATTRIBUTE_BITS)
140 #define PAGING_4K_MASK 0xFFF
141 #define PAGING_2M_MASK 0x1FFFFF
142 #define PAGING_1G_MASK 0x3FFFFFFF
144 #define PAGING_PAE_INDEX_MASK 0x1FF
146 #define PAGING_4K_ADDRESS_MASK_64 0x000FFFFFFFFFF000ull
147 #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
148 #define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
150 #define SMRR_MAX_ADDRESS BASE_4GB
160 PAGE_ATTRIBUTE Attribute
;
163 } PAGE_ATTRIBUTE_TABLE
;
166 // Size of Task-State Segment defined in IA32 Manual
169 #define EXCEPTION_TSS_SIZE (TSS_SIZE + 4) // Add 4 bytes SSP
170 #define TSS_X64_IST1_OFFSET 36
171 #define TSS_IA32_CR3_OFFSET 28
172 #define TSS_IA32_ESP_OFFSET 56
173 #define TSS_IA32_SSP_OFFSET 104
180 #define PROTECT_MODE_CODE_SEGMENT 0x08
181 #define LONG_MODE_CODE_SEGMENT 0x38
184 // The size 0x20 must be bigger than
185 // the size of template code of SmmInit. Currently,
186 // the size of SmmInit requires the 0x16 Bytes buffer
189 #define BACK_BUF_SIZE 0x20
191 #define EXCEPTION_VECTOR_NUMBER 0x20
193 #define INVALID_APIC_ID 0xFFFFFFFFFFFFFFFFULL
195 typedef UINT32 SMM_CPU_ARRIVAL_EXCEPTIONS
;
196 #define ARRIVAL_EXCEPTION_BLOCKED 0x1
197 #define ARRIVAL_EXCEPTION_DELAYED 0x2
198 #define ARRIVAL_EXCEPTION_SMI_DISABLED 0x4
201 // Private structure for the SMM CPU module that is stored in DXE Runtime memory
202 // Contains the SMM Configuration Protocols that is produced.
203 // Contains a mix of DXE and SMM contents. All the fields must be used properly.
205 #define SMM_CPU_PRIVATE_DATA_SIGNATURE SIGNATURE_32 ('s', 'c', 'p', 'u')
210 EFI_HANDLE SmmCpuHandle
;
212 EFI_PROCESSOR_INFORMATION
*ProcessorInfo
;
213 SMM_CPU_OPERATION
*Operation
;
214 UINTN
*CpuSaveStateSize
;
217 EFI_SMM_RESERVED_SMRAM_REGION SmmReservedSmramRegion
[1];
218 EFI_SMM_ENTRY_CONTEXT SmmCoreEntryContext
;
219 EFI_SMM_ENTRY_POINT SmmCoreEntry
;
221 EFI_SMM_CONFIGURATION_PROTOCOL SmmConfiguration
;
222 } SMM_CPU_PRIVATE_DATA
;
224 extern SMM_CPU_PRIVATE_DATA
*gSmmCpuPrivate
;
225 extern CPU_HOT_PLUG_DATA mCpuHotPlugData
;
226 extern UINTN mMaxNumberOfCpus
;
227 extern UINTN mNumberOfCpus
;
228 extern EFI_SMM_CPU_PROTOCOL mSmmCpu
;
231 /// The mode of the CPU at the time an SMI occurs
233 extern UINT8 mSmmSaveStateRegisterLma
;
236 // SMM CPU Protocol function prototypes.
240 Read information from the CPU save state.
242 @param This EFI_SMM_CPU_PROTOCOL instance
243 @param Width The number of bytes to read from the CPU save state.
244 @param Register Specifies the CPU register to read form the save state.
245 @param CpuIndex Specifies the zero-based index of the CPU save state
246 @param Buffer Upon return, this holds the CPU register value read from the save state.
248 @retval EFI_SUCCESS The register was read from Save State
249 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
250 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
256 IN CONST EFI_SMM_CPU_PROTOCOL
*This
,
258 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
264 Write data to the CPU save state.
266 @param This EFI_SMM_CPU_PROTOCOL instance
267 @param Width The number of bytes to read from the CPU save state.
268 @param Register Specifies the CPU register to write to the save state.
269 @param CpuIndex Specifies the zero-based index of the CPU save state
270 @param Buffer Upon entry, this holds the new CPU register value.
272 @retval EFI_SUCCESS The register was written from Save State
273 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor
274 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct
280 IN CONST EFI_SMM_CPU_PROTOCOL
*This
,
282 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
284 IN CONST VOID
*Buffer
288 Read a CPU Save State register on the target processor.
290 This function abstracts the differences that whether the CPU Save State register is in the
291 IA32 CPU Save State Map or X64 CPU Save State Map.
293 This function supports reading a CPU Save State register in SMBase relocation handler.
295 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
296 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
297 @param[in] Width The number of bytes to read from the CPU save state.
298 @param[out] Buffer Upon return, this holds the CPU register value read from the save state.
300 @retval EFI_SUCCESS The register was read from Save State.
301 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
302 @retval EFI_INVALID_PARAMTER This or Buffer is NULL.
307 ReadSaveStateRegister (
309 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
315 Write value to a CPU Save State register on the target processor.
317 This function abstracts the differences that whether the CPU Save State register is in the
318 IA32 CPU Save State Map or X64 CPU Save State Map.
320 This function supports writing a CPU Save State register in SMBase relocation handler.
322 @param[in] CpuIndex Specifies the zero-based index of the CPU save state.
323 @param[in] RegisterIndex Index into mSmmCpuWidthOffset[] look up table.
324 @param[in] Width The number of bytes to read from the CPU save state.
325 @param[in] Buffer Upon entry, this holds the new CPU register value.
327 @retval EFI_SUCCESS The register was written to Save State.
328 @retval EFI_NOT_FOUND The register is not defined for the Save State of Processor.
329 @retval EFI_INVALID_PARAMTER ProcessorIndex or Width is not correct.
334 WriteSaveStateRegister (
336 IN EFI_SMM_SAVE_STATE_REGISTER Register
,
338 IN CONST VOID
*Buffer
341 extern CONST UINT8 gcSmmInitTemplate
[];
342 extern CONST UINT16 gcSmmInitSize
;
343 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr0
;
344 extern UINT32 mSmmCr0
;
345 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr3
;
346 extern UINT32 mSmmCr4
;
347 X86_ASSEMBLY_PATCH_LABEL gPatchSmmCr4
;
348 X86_ASSEMBLY_PATCH_LABEL gPatchSmmInitStack
;
349 X86_ASSEMBLY_PATCH_LABEL mPatchCetSupported
;
350 extern BOOLEAN mCetSupported
;
353 Semaphore operation for all processor relocate SMMBase.
357 SmmRelocationSemaphoreComplete (
362 /// The type of SMM CPU Information
366 volatile EFI_AP_PROCEDURE Procedure
;
367 volatile VOID
*Parameter
;
368 volatile UINT32
*Run
;
369 volatile BOOLEAN
*Present
;
370 } SMM_CPU_DATA_BLOCK
;
373 SmmCpuSyncModeTradition
,
374 SmmCpuSyncModeRelaxedAp
,
380 // Pointer to an array. The array should be located immediately after this structure
381 // so that UC cache-ability can be set together.
383 SMM_CPU_DATA_BLOCK
*CpuData
;
384 volatile UINT32
*Counter
;
385 volatile UINT32 BspIndex
;
386 volatile BOOLEAN
*InsideSmm
;
387 volatile BOOLEAN
*AllCpusInSync
;
388 volatile SMM_CPU_SYNC_MODE EffectiveSyncMode
;
389 volatile BOOLEAN SwitchBsp
;
390 volatile BOOLEAN
*CandidateBsp
;
391 } SMM_DISPATCHER_MP_SYNC_DATA
;
393 #define SMM_PSD_OFFSET 0xfb00
396 /// All global semaphores' pointer
399 volatile UINT32
*Counter
;
400 volatile BOOLEAN
*InsideSmm
;
401 volatile BOOLEAN
*AllCpusInSync
;
403 SPIN_LOCK
*CodeAccessCheckLock
;
404 } SMM_CPU_SEMAPHORE_GLOBAL
;
407 /// All semaphores for each processor
411 volatile UINT32
*Run
;
412 volatile BOOLEAN
*Present
;
413 } SMM_CPU_SEMAPHORE_CPU
;
416 /// All semaphores' information
419 SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal
;
420 SMM_CPU_SEMAPHORE_CPU SemaphoreCpu
;
421 } SMM_CPU_SEMAPHORES
;
423 extern IA32_DESCRIPTOR gcSmiGdtr
;
424 extern EFI_PHYSICAL_ADDRESS mGdtBuffer
;
425 extern UINTN mGdtBufferSize
;
426 extern IA32_DESCRIPTOR gcSmiIdtr
;
427 extern VOID
*gcSmiIdtrPtr
;
428 extern UINT64 gPhyMask
;
429 extern SMM_DISPATCHER_MP_SYNC_DATA
*mSmmMpSyncData
;
430 extern UINTN mSmmStackArrayBase
;
431 extern UINTN mSmmStackArrayEnd
;
432 extern UINTN mSmmStackSize
;
433 extern EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService
;
434 extern IA32_DESCRIPTOR gcSmiInitGdtr
;
435 extern SMM_CPU_SEMAPHORES mSmmCpuSemaphores
;
436 extern UINTN mSemaphoreSize
;
437 extern SPIN_LOCK
*mPFLock
;
438 extern SPIN_LOCK
*mConfigSmmCodeAccessCheckLock
;
439 extern EFI_SMRAM_DESCRIPTOR
*mSmmCpuSmramRanges
;
440 extern UINTN mSmmCpuSmramRangeCount
;
441 extern UINT8 mPhysicalAddressBits
;
444 // Copy of the PcdPteMemoryEncryptionAddressOrMask
446 extern UINT64 mAddressEncMask
;
449 Create 4G PageTable in SMRAM.
451 @param[in] Is32BitPageTable Whether the page table is 32-bit PAE
452 @return PageTable Address
457 IN BOOLEAN Is32BitPageTable
462 Initialize global data for MP synchronization.
464 @param Stacks Base address of SMI stack buffer for all processors.
465 @param StackSize Stack size for each processor in SMM.
466 @param ShadowStackSize Shadow Stack size for each processor in SMM.
470 InitializeMpServiceData (
473 IN UINTN ShadowStackSize
477 Initialize Timer for SMM AP Sync.
486 Start Timer for SMM AP Sync.
496 Check if the SMM AP Sync timer is timeout.
498 @param Timer The start timer from the begin.
508 Initialize IDT for SMM Stack Guard.
513 InitializeIDTSmmStackGuard (
518 Initialize Gdt for all processors.
520 @param[in] Cr3 CR3 value.
521 @param[out] GdtStepSize The step size for GDT table.
523 @return GdtBase for processor 0.
524 GdtBase for processor X is: GdtBase + (GdtStepSize * X)
529 OUT UINTN
*GdtStepSize
534 Register the SMM Foundation entry point.
536 @param This Pointer to EFI_SMM_CONFIGURATION_PROTOCOL instance
537 @param SmmEntryPoint SMM Foundation EntryPoint
539 @retval EFI_SUCCESS Successfully to register SMM foundation entry point
545 IN CONST EFI_SMM_CONFIGURATION_PROTOCOL
*This
,
546 IN EFI_SMM_ENTRY_POINT SmmEntryPoint
550 Create PageTable for SMM use.
552 @return PageTable Address
561 Schedule a procedure to run on the specified CPU.
563 @param Procedure The address of the procedure to run
564 @param CpuIndex Target CPU number
565 @param ProcArguments The parameter to pass to the procedure
567 @retval EFI_INVALID_PARAMETER CpuNumber not valid
568 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
569 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
570 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
571 @retval EFI_SUCCESS - The procedure has been successfully scheduled
577 IN EFI_AP_PROCEDURE Procedure
,
579 IN OUT VOID
*ProcArguments OPTIONAL
583 Schedule a procedure to run on the specified CPU in a blocking fashion.
585 @param Procedure The address of the procedure to run
586 @param CpuIndex Target CPU Index
587 @param ProcArguments The parameter to pass to the procedure
589 @retval EFI_INVALID_PARAMETER CpuNumber not valid
590 @retval EFI_INVALID_PARAMETER CpuNumber specifying BSP
591 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber did not enter SMM
592 @retval EFI_INVALID_PARAMETER The AP specified by CpuNumber is busy
593 @retval EFI_SUCCESS The procedure has been successfully scheduled
598 SmmBlockingStartupThisAp (
599 IN EFI_AP_PROCEDURE Procedure
,
601 IN OUT VOID
*ProcArguments OPTIONAL
605 This function sets the attributes for the memory region specified by BaseAddress and
606 Length from their current attributes to the attributes specified by Attributes.
608 @param[in] BaseAddress The physical address that is the start address of a memory region.
609 @param[in] Length The size in bytes of the memory region.
610 @param[in] Attributes The bit mask of attributes to set for the memory region.
612 @retval EFI_SUCCESS The attributes were set for the memory region.
613 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
614 BaseAddress and Length cannot be modified.
615 @retval EFI_INVALID_PARAMETER Length is zero.
616 Attributes specified an illegal combination of attributes that
617 cannot be set together.
618 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
619 the memory resource range.
620 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
621 resource range specified by BaseAddress and Length.
622 The bit mask of attributes is not support for the memory resource
623 range specified by BaseAddress and Length.
628 SmmSetMemoryAttributes (
629 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
635 This function clears the attributes for the memory region specified by BaseAddress and
636 Length from their current attributes to the attributes specified by Attributes.
638 @param[in] BaseAddress The physical address that is the start address of a memory region.
639 @param[in] Length The size in bytes of the memory region.
640 @param[in] Attributes The bit mask of attributes to clear for the memory region.
642 @retval EFI_SUCCESS The attributes were cleared for the memory region.
643 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
644 BaseAddress and Length cannot be modified.
645 @retval EFI_INVALID_PARAMETER Length is zero.
646 Attributes specified an illegal combination of attributes that
647 cannot be set together.
648 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
649 the memory resource range.
650 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
651 resource range specified by BaseAddress and Length.
652 The bit mask of attributes is not support for the memory resource
653 range specified by BaseAddress and Length.
658 SmmClearMemoryAttributes (
659 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
665 Initialize MP synchronization data.
670 InitializeMpSyncData (
676 Find out SMRAM information including SMRR base and SMRR size.
678 @param SmrrBase SMRR base
679 @param SmrrSize SMRR size
684 OUT UINT32
*SmrrBase
,
689 Relocate SmmBases for each processor.
691 Execute on first boot and all S3 resumes
701 Page Fault handler for SMM use.
703 @param InterruptType Defines the type of interrupt or exception that
704 occurred on the processor.This parameter is processor architecture specific.
705 @param SystemContext A pointer to the processor context when
706 the interrupt occurred on the processor.
711 IN EFI_EXCEPTION_TYPE InterruptType
,
712 IN EFI_SYSTEM_CONTEXT SystemContext
716 Perform the remaining tasks.
720 PerformRemainingTasks (
725 Perform the pre tasks.
734 Initialize MSR spin lock by MSR index.
736 @param MsrIndex MSR index value.
740 InitMsrSpinLockByIndex (
745 Hook return address of SMM Save State so that semaphore code
746 can be executed immediately after AP exits SMM to indicate to
747 the BSP that an AP has exited SMM after SMBASE relocation.
749 @param[in] CpuIndex The processor index.
750 @param[in] RebasedFlag A pointer to a flag that is set to TRUE
751 immediately after AP exits SMM.
757 IN
volatile BOOLEAN
*RebasedFlag
761 Configure SMM Code Access Check feature for all processors.
762 SMM Feature Control MSR will be locked after configuration.
765 ConfigSmmCodeAccessCheck (
770 Hook the code executed immediately after an RSM instruction on the currently
771 executing CPU. The mode of code executed immediately after RSM must be
772 detected, and the appropriate hook must be selected. Always clear the auto
773 HALT restart flag if it is set.
775 @param[in] CpuIndex The processor index for the currently
777 @param[in] CpuState Pointer to SMRAM Save State Map for the
778 currently executing CPU.
779 @param[in] NewInstructionPointer32 Instruction pointer to use if resuming to
780 32-bit mode from 64-bit SMM.
781 @param[in] NewInstructionPointer Instruction pointer to use if resuming to
784 @retval The value of the original instruction pointer before it was hooked.
791 SMRAM_SAVE_STATE_MAP
*CpuState
,
792 UINT64 NewInstructionPointer32
,
793 UINT64 NewInstructionPointer
797 Get the size of the SMI Handler in bytes.
799 @retval The size, in bytes, of the SMI Handler.
809 Install the SMI handler for the CPU specified by CpuIndex. This function
810 is called by the CPU that was elected as monarch during System Management
813 @param[in] CpuIndex The index of the CPU to install the custom SMI handler.
814 The value must be between 0 and the NumberOfCpus field
815 in the System Management System Table (SMST).
816 @param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.
817 @param[in] SmiStack The stack to use when an SMI is processed by the
818 the CPU specified by CpuIndex.
819 @param[in] StackSize The size, in bytes, if the stack used when an SMI is
820 processed by the CPU specified by CpuIndex.
821 @param[in] GdtBase The base address of the GDT to use when an SMI is
822 processed by the CPU specified by CpuIndex.
823 @param[in] GdtSize The size, in bytes, of the GDT used when an SMI is
824 processed by the CPU specified by CpuIndex.
825 @param[in] IdtBase The base address of the IDT to use when an SMI is
826 processed by the CPU specified by CpuIndex.
827 @param[in] IdtSize The size, in bytes, of the IDT used when an SMI is
828 processed by the CPU specified by CpuIndex.
829 @param[in] Cr3 The base address of the page tables to use when an SMI
830 is processed by the CPU specified by CpuIndex.
847 Search module name by input IP address and output it.
849 @param CallerIpAddress Caller instruction pointer.
854 IN UINTN CallerIpAddress
858 This function sets memory attribute according to MemoryAttributesTable.
861 SetMemMapAttributes (
866 This function sets UEFI memory attribute according to UEFI memory map.
869 SetUefiMemMapAttributes (
874 Return if the Address is forbidden as SMM communication buffer.
876 @param[in] Address the address to be checked
878 @return TRUE The address is forbidden as SMM communication buffer.
879 @return FALSE The address is allowed as SMM communication buffer.
882 IsSmmCommBufferForbiddenAddress (
887 This function caches the UEFI memory map information.
895 This function sets memory attribute for page table.
898 SetPageTableAttributes (
903 Return page table base.
905 @return page table base.
913 This function sets the attributes for the memory region specified by BaseAddress and
914 Length from their current attributes to the attributes specified by Attributes.
916 @param[in] BaseAddress The physical address that is the start address of a memory region.
917 @param[in] Length The size in bytes of the memory region.
918 @param[in] Attributes The bit mask of attributes to set for the memory region.
919 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
921 @retval EFI_SUCCESS The attributes were set for the memory region.
922 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
923 BaseAddress and Length cannot be modified.
924 @retval EFI_INVALID_PARAMETER Length is zero.
925 Attributes specified an illegal combination of attributes that
926 cannot be set together.
927 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
928 the memory resource range.
929 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
930 resource range specified by BaseAddress and Length.
931 The bit mask of attributes is not support for the memory resource
932 range specified by BaseAddress and Length.
937 SmmSetMemoryAttributesEx (
938 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
940 IN UINT64 Attributes
,
941 OUT BOOLEAN
*IsSplitted OPTIONAL
945 This function clears the attributes for the memory region specified by BaseAddress and
946 Length from their current attributes to the attributes specified by Attributes.
948 @param[in] BaseAddress The physical address that is the start address of a memory region.
949 @param[in] Length The size in bytes of the memory region.
950 @param[in] Attributes The bit mask of attributes to clear for the memory region.
951 @param[out] IsSplitted TRUE means page table splitted. FALSE means page table not splitted.
953 @retval EFI_SUCCESS The attributes were cleared for the memory region.
954 @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
955 BaseAddress and Length cannot be modified.
956 @retval EFI_INVALID_PARAMETER Length is zero.
957 Attributes specified an illegal combination of attributes that
958 cannot be set together.
959 @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
960 the memory resource range.
961 @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
962 resource range specified by BaseAddress and Length.
963 The bit mask of attributes is not support for the memory resource
964 range specified by BaseAddress and Length.
969 SmmClearMemoryAttributesEx (
970 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
972 IN UINT64 Attributes
,
973 OUT BOOLEAN
*IsSplitted OPTIONAL
977 This API provides a way to allocate memory for page table.
979 This API can be called more once to allocate memory for page tables.
981 Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the
982 allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL
983 is returned. If there is not enough memory remaining to satisfy the request, then NULL is
986 @param Pages The number of 4 KB pages to allocate.
988 @return A pointer to the allocated buffer or NULL if allocation fails.
992 AllocatePageTableMemory (
997 Allocate pages for code.
999 @param[in] Pages Number of pages to be allocated.
1001 @return Allocated memory.
1009 Allocate aligned pages for code.
1011 @param[in] Pages Number of pages to be allocated.
1012 @param[in] Alignment The requested alignment of the allocation.
1013 Must be a power of two.
1014 If Alignment is zero, then byte alignment is used.
1016 @return Allocated memory.
1019 AllocateAlignedCodePages (
1026 // S3 related global variable and function prototype.
1029 extern BOOLEAN mSmmS3Flag
;
1032 Initialize SMM S3 resume state structure used during S3 Resume.
1034 @param[in] Cr3 The base address of the page tables to use in SMM.
1038 InitSmmS3ResumeState (
1052 Restore SMM Configuration in S3 boot path.
1056 RestoreSmmConfigurationInS3 (
1061 Get ACPI S3 enable flag.
1065 GetAcpiS3EnableFlag (
1070 Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.
1072 @param[in] ApHltLoopCode The address of the safe hlt-loop function.
1073 @param[in] TopOfStack A pointer to the new stack to use for the ApHltLoopCode.
1074 @param[in] NumberToFinishAddress Address of Semaphore of APs finish count.
1078 TransferApToSafeState (
1079 IN UINTN ApHltLoopCode
,
1080 IN UINTN TopOfStack
,
1081 IN UINTN NumberToFinishAddress
1085 Set ShadowStack memory.
1087 @param[in] Cr3 The page table base address.
1088 @param[in] BaseAddress The physical address that is the start address of a memory region.
1089 @param[in] Length The size in bytes of the memory region.
1091 @retval EFI_SUCCESS The shadow stack memory is set.
1096 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
1101 Set not present memory.
1103 @param[in] Cr3 The page table base address.
1104 @param[in] BaseAddress The physical address that is the start address of a memory region.
1105 @param[in] Length The size in bytes of the memory region.
1107 @retval EFI_SUCCESS The not present memory is set.
1112 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
1117 Initialize the shadow stack related data structure.
1119 @param CpuIndex The index of CPU.
1120 @param ShadowStack The bottom of the shadow stack for this CPU.
1125 IN VOID
*ShadowStack
1129 This function set given attributes of the memory region specified by
1130 BaseAddress and Length.
1132 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1133 @param BaseAddress The physical address that is the start address of
1135 @param Length The size in bytes of the memory region.
1136 @param Attributes The bit mask of attributes to set for the memory
1139 @retval EFI_SUCCESS The attributes were set for the memory region.
1140 @retval EFI_INVALID_PARAMETER Length is zero.
1141 Attributes specified an illegal combination of
1142 attributes that cannot be set together.
1143 @retval EFI_UNSUPPORTED The processor does not support one or more
1144 bytes of the memory resource range specified
1145 by BaseAddress and Length.
1146 The bit mask of attributes is not supported for
1147 the memory resource range specified by
1148 BaseAddress and Length.
1153 EdkiiSmmSetMemoryAttributes (
1154 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL
*This
,
1155 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
1157 IN UINT64 Attributes
1161 This function clears given attributes of the memory region specified by
1162 BaseAddress and Length.
1164 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1165 @param BaseAddress The physical address that is the start address of
1167 @param Length The size in bytes of the memory region.
1168 @param Attributes The bit mask of attributes to clear for the memory
1171 @retval EFI_SUCCESS The attributes were cleared for the memory region.
1172 @retval EFI_INVALID_PARAMETER Length is zero.
1173 Attributes specified an illegal combination of
1174 attributes that cannot be cleared together.
1175 @retval EFI_UNSUPPORTED The processor does not support one or more
1176 bytes of the memory resource range specified
1177 by BaseAddress and Length.
1178 The bit mask of attributes is not supported for
1179 the memory resource range specified by
1180 BaseAddress and Length.
1185 EdkiiSmmClearMemoryAttributes (
1186 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL
*This
,
1187 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
1189 IN UINT64 Attributes
1193 This function retrieves the attributes of the memory region specified by
1194 BaseAddress and Length. If different attributes are got from different part
1195 of the memory region, EFI_NO_MAPPING will be returned.
1197 @param This The EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL instance.
1198 @param BaseAddress The physical address that is the start address of
1200 @param Length The size in bytes of the memory region.
1201 @param Attributes Pointer to attributes returned.
1203 @retval EFI_SUCCESS The attributes got for the memory region.
1204 @retval EFI_INVALID_PARAMETER Length is zero.
1206 @retval EFI_NO_MAPPING Attributes are not consistent cross the memory
1208 @retval EFI_UNSUPPORTED The processor does not support one or more
1209 bytes of the memory resource range specified
1210 by BaseAddress and Length.
1215 EdkiiSmmGetMemoryAttributes (
1216 IN EDKII_SMM_MEMORY_ATTRIBUTE_PROTOCOL
*This
,
1217 IN EFI_PHYSICAL_ADDRESS BaseAddress
,
1219 IN UINT64
*Attributes
1223 This function fixes up the address of the global variable or function
1224 referred in SmmInit assembly files to be the absoute address.
1228 PiSmmCpuSmmInitFixupAddress (
1232 This function fixes up the address of the global variable or function
1233 referred in SmiEntry assembly files to be the absoute address.
1237 PiSmmCpuSmiEntryFixupAddress (
1241 This function reads CR2 register when on-demand paging is enabled
1242 for 64 bit and no action for 32 bit.
1244 @param[out] *Cr2 Pointer to variable to hold CR2 register value.
1252 This function writes into CR2 register when on-demand paging is enabled
1253 for 64 bit and no action for 32 bit.
1255 @param[in] Cr2 Value to write into CR2 register.