1 ;------------------------------------------------------------------------------
3 ; First code executed by processor after resetting.
5 ; Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
6 ; SPDX-License-Identifier: BSD-2-Clause-Patent
8 ;------------------------------------------------------------------------------
15 ; Pad the image size to 4k when page tables are in VTF0
17 ; If the VTF0 image has page tables built in, then we need to make
18 ; sure the end of VTF0 is 4k above where the page tables end.
20 ; This is required so the page tables will be 4k aligned when VTF0 is
21 ; located just below 0x100000000 (4GB) in the firmware device.
23 %ifdef ALIGN_TOP_TO_4K_FOR_PAGING
24 TIMES (0x1000 - ($ - EndOfPageTables)) DB 0
26 ; Pad the VTF0 Reset code for Bsp & Ap to 4k aligned block.
27 ; Some implementations may need to keep the initial Reset code
28 ; to be separated out from rest of the code.
29 ; This padding will make sure lower 4K region below 4 GB may
30 ; only contains few jmp instructions and data.
32 TIMES (0x1000 - 0x20) DB 0
35 applicationProcessorEntryPoint:
37 ; Application Processors entry point
39 ; GenFv generates code aligned on a 4k boundary which will jump to this
40 ; location. (0xffffffe0) This allows the Local APIC Startup IPI to be
41 ; used to wake up the application processors.
52 ; VTF-0 means that the VTF (Volume Top File) code does not require
64 ; This is where the processor will begin execution
68 jmp EarlyBspInitReal16