UefiCpuPkg/UefiCpuPkg.dec

   1 ## @file  UefiCpuPkg.dec
   2 # This Package provides UEFI compatible CPU modules and libraries.
   3 #
   4 # Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>
   5 #
   6 # This program and the accompanying materials are licensed and made available under
   7 # the terms and conditions of the BSD License which accompanies this distribution.
   8 # The full text of the license may be found at
   9 # http://opensource.org/licenses/bsd-license.php
  10 #
  11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 #
  14 ##
  15
  16 [Defines]
  17   DEC_SPECIFICATION              = 0x00010005
  18   PACKAGE_NAME                   = UefiCpuPkg
  19   PACKAGE_UNI_FILE               = UefiCpuPkg.uni
  20   PACKAGE_GUID                   = 2171df9b-0d39-45aa-ac37-2de190010d23
  21   PACKAGE_VERSION                = 0.3
  22
  23 [Includes]
  24   Include
  25
  26 [LibraryClasses]
  27   ##  @libraryclass  Defines some routines that are generic for IA32 family CPU
  28   ##                 to be UEFI specification compliant.
  29   ##
  30   UefiCpuLib|Include/Library/UefiCpuLib.h
  31
  32 [LibraryClasses.IA32, LibraryClasses.X64]
  33   ##  @libraryclass  Provides functions to manage MTRR settings on IA32 and X64 CPUs.
  34   ##
  35   MtrrLib|Include/Library/MtrrLib.h
  36
  37   ##  @libraryclass  Provides functions to manage the Local APIC on IA32 and X64 CPUs.
  38   ##
  39   LocalApicLib|Include/Library/LocalApicLib.h
  40
  41   ##  @libraryclass  Provides platform specific initialization functions in the SEC phase.
  42   ##
  43   PlatformSecLib|Include/Library/PlatformSecLib.h
  44
  45   ##  @libraryclass  Public include file for the SMM CPU Platform Hook Library.
  46   ##
  47   SmmCpuPlatformHookLib|Include/Library/SmmCpuPlatformHookLib.h
  48
  49   ##  @libraryclass  Provides the CPU specific programming for PiSmmCpuDxeSmm module.
  50   ##
  51   SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h
  52
  53   ##  @libraryclass  Provides functions to support MP services on CpuMpPei and CpuDxe module.
  54   ##
  55   MpInitLib|Include/Library/MpInitLib.h
  56
  57 [Guids]
  58   gUefiCpuPkgTokenSpaceGuid      = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}
  59
  60 [Protocols]
  61   ## Include/Protocol/SmmCpuService.h
  62   gEfiSmmCpuServiceProtocolGuid  = { 0x1d202cab, 0xc8ab, 0x4d5c, { 0x94, 0xf7, 0x3c, 0xfc, 0xc0, 0xd3, 0xd3, 0x35 }}
  63
  64 #
  65 # [Error.gUefiCpuPkgTokenSpaceGuid]
  66 #   0x80000001 | Invalid value provided.
  67 #
  68
  69 [PcdsFeatureFlag]
  70   ## Indicates if SMM Profile will be enabled.
  71   #  If enabled, instruction executions in and data accesses to memory outside of SMRAM will be logged.
  72   #  This PCD is only for validation purpose. It should be set to false in production.<BR><BR>
  73   #   TRUE  - SMM Profile will be enabled.<BR>
  74   #   FALSE - SMM Profile will be disabled.<BR>
  75   # @Prompt Enable SMM Profile.
  76   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileEnable|FALSE|BOOLEAN|0x32132109
  77
  78   ## Indicates if the SMM profile log buffer is a ring buffer.
  79   #  If disabled, no additional log can be done when the buffer is full.<BR><BR>
  80   #   TRUE  - the SMM profile log buffer is a ring buffer.<BR>
  81   #   FALSE - the SMM profile log buffer is a normal buffer.<BR>
  82   # @Prompt The SMM profile log buffer is a ring buffer.
  83   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileRingBuffer|FALSE|BOOLEAN|0x3213210a
  84
  85   ## Indicates if SMM Startup AP in a blocking fashion.
  86   #   TRUE  - SMM Startup AP in a blocking fashion.<BR>
  87   #   FALSE - SMM Startup AP in a non-blocking fashion.<BR>
  88   # @Prompt SMM Startup AP in a blocking fashion.
  89   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmBlockStartupThisAp|FALSE|BOOLEAN|0x32132108
  90
  91   ## Indicates if SMM Stack Guard will be enabled.
  92   #  If enabled, stack overflow in SMM can be caught, preventing chaotic consequences.<BR><BR>
  93   #   TRUE  - SMM Stack Guard will be enabled.<BR>
  94   #   FALSE - SMM Stack Guard will be disabled.<BR>
  95   # @Prompt Enable SMM Stack Guard.
  96   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard|TRUE|BOOLEAN|0x1000001C
  97
  98   ## Indicates if BSP election in SMM will be enabled.
  99   #  If enabled, a BSP will be dynamically elected among all processors in each SMI.
 100   #  Otherwise, processor 0 is always as BSP in each SMI.<BR><BR>
 101   #   TRUE  - BSP election in SMM will be enabled.<BR>
 102   #   FALSE - BSP election in SMM will be disabled.<BR>
 103   # @Prompt Enable BSP election in SMM.
 104   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmEnableBspElection|TRUE|BOOLEAN|0x32132106
 105
 106   ## Indicates if CPU SMM hot-plug will be enabled.<BR><BR>
 107   #   TRUE  - SMM CPU hot-plug will be enabled.<BR>
 108   #   FALSE - SMM CPU hot-plug will be disabled.<BR>
 109   # @Prompt SMM CPU hot-plug.
 110   gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugSupport|FALSE|BOOLEAN|0x3213210C
 111
 112   ## Indicates if SMM Debug will be enabled.
 113   #  If enabled, hardware breakpoints in SMRAM can be set outside of SMM mode and take effect in SMM.<BR><BR>
 114   #   TRUE  - SMM Debug will be enabled.<BR>
 115   #   FALSE - SMM Debug will be disabled.<BR>
 116   # @Prompt Enable SMM Debug.
 117   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmDebug|FALSE|BOOLEAN|0x1000001B
 118
 119   ## Indicates if lock SMM Feature Control MSR.<BR><BR>
 120   #   TRUE  - SMM Feature Control MSR will be locked.<BR>
 121   #   FALSE - SMM Feature Control MSR will not be locked.<BR>
 122   # @Prompt Lock SMM Feature Control MSR.
 123   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmFeatureControlMsrLock|TRUE|BOOLEAN|0x3213210B
 124
 125 [PcdsFixedAtBuild, PcdsPatchableInModule]
 126   ## This value is the CPU Local APIC base address, which aligns the address on a 4-KByte boundary.
 127   # @Prompt Configure base address of CPU Local APIC
 128   # @Expression  0x80000001 | (gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress & 0xfff) == 0
 129   gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress|0xfee00000|UINT32|0x00000001
 130
 131   ## Specifies delay value in microseconds after sending out an INIT IPI.
 132   # @Prompt Configure delay value after send an INIT IPI
 133   gUefiCpuPkgTokenSpaceGuid.PcdCpuInitIpiDelayInMicroSeconds|10000|UINT32|0x30000002
 134
 135   ## This value specifies the Application Processor (AP) stack size, used for Mp Service, which must
 136   ## aligns the address on a 4-KByte boundary.
 137   # @Prompt Configure stack size for Application Processor (AP)
 138   gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize|0x8000|UINT32|0x00000003
 139
 140   ## Specifies stack size in the temporary RAM. 0 means half of TemporaryRamSize.
 141   # @Prompt Stack size in the temporary RAM.
 142   gUefiCpuPkgTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x10001003
 143
 144   ## Specifies buffer size in bytes to save SMM profile data. The value should be a multiple of 4KB.
 145   # @Prompt SMM profile data buffer size.
 146   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmProfileSize|0x200000|UINT32|0x32132107
 147
 148   ## Specifies stack size in bytes for each processor in SMM.
 149   # @Prompt Processor stack size in SMM.
 150   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackSize|0x2000|UINT32|0x32132105
 151
 152   ## Specifies timeout value in microseconds for the BSP in SMM to wait for all APs to come into SMM.
 153   # @Prompt AP synchronization timeout value in SMM.
 154   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmApSyncTimeout|1000000|UINT64|0x32132104
 155
 156   ## Indicates if SMM Code Access Check is enabled.
 157   #  If enabled, the SMM handler cannot execute the code outside SMM regions.
 158   #  This PCD is suggested to TRUE in production image.<BR><BR>
 159   #   TRUE  - SMM Code Access Check will be enabled.<BR>
 160   #   FALSE - SMM Code Access Check will be disabled.<BR>
 161   # @Prompt SMM Code Access Check.
 162   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable|TRUE|BOOLEAN|0x60000013
 163
 164   ## Indicates the CPU synchronization method used when processing an SMI.
 165   #   0x00  - Traditional CPU synchronization method.<BR>
 166   #   0x01  - Relaxed CPU synchronization method.<BR>
 167   # @Prompt SMM CPU Synchronization Method.
 168   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode|0x00|UINT8|0x60000014
 169
 170   ## Specifies the number of variable MTRRs reserved for OS use. The default number of
 171   #  MTRRs reserved for OS use is 2.
 172   # @Prompt Number of reserved variable MTRRs.
 173   gUefiCpuPkgTokenSpaceGuid.PcdCpuNumberOfReservedVariableMtrrs|0x2|UINT32|0x00000015
 174
 175 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
 176   ## Specifies max supported number of Logical Processors.
 177   # @Prompt Configure max supported number of Logical Processors
 178   gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber|64|UINT32|0x00000002
 179   ## Specifies timeout value in microseconds for the BSP to detect all APs for the first time.
 180   # @Prompt Timeout for the BSP to detect all APs for the first time.
 181   gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds|50000|UINT32|0x00000004
 182   ## Specifies the base address of the first microcode Patch in the microcode Region.
 183   # @Prompt Microcode Region base address.
 184   gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x00000005
 185   ## Specifies the size of the microcode Region.
 186   # @Prompt Microcode Region size.
 187   gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x00000006
 188   ## Specifies the AP wait loop state during POST phase.
 189   #  The value is defined as below.<BR><BR>
 190   #  1: Place AP in the Hlt-Loop state.<BR>
 191   #  2: Place AP in the Mwait-Loop state.<BR>
 192   #  3: Place AP in the Run-Loop state.<BR>
 193   # @Prompt The AP wait loop state.
 194   # @ValidRange  0x80000001 | 1 - 3
 195   gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode|1|UINT8|0x60008006
 196   ## Specifies the AP target C-state for Mwait during POST phase.
 197   #  The default value 0 means C1 state.
 198   #  The value is defined as below.<BR><BR>
 199   # @Prompt The specified AP target C-state for Mwait.
 200   gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate|0|UINT8|0x00000007
 201
 202 [PcdsDynamic, PcdsDynamicEx]
 203   ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DATA.
 204   # @Prompt The pointer to a CPU S3 data buffer.
 205   # @ValidList   0x80000001 | 0
 206   gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress|0x0|UINT64|0x60000010
 207
 208   ## Contains the pointer to a CPU Hot Plug Data structure if CPU hot-plug is supported.
 209   # @Prompt The pointer to CPU Hot Plug Data.
 210   # @ValidList   0x80000001 | 0
 211   gUefiCpuPkgTokenSpaceGuid.PcdCpuHotPlugDataAddress|0x0|UINT64|0x60000011
 212
 213 [UserExtensions.TianoCore."ExtraFiles"]
 214   UefiCpuPkgExtra.uni