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[mirror_edk2.git] / UefiPayloadPkg / BlSupportPei / BlSupportPei.c
1 /** @file
2 This PEIM will parse bootloader information and report resource information into pei core.
3 This file contains the main entrypoint of the PEIM.
4
5 Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8 **/
9 #include "BlSupportPei.h"
10
11 #define LEGACY_8259_MASK_REGISTER_MASTER 0x21
12 #define LEGACY_8259_MASK_REGISTER_SLAVE 0xA1
13
14 EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {
15 { EfiACPIReclaimMemory, FixedPcdGet32 (PcdMemoryTypeEfiACPIReclaimMemory) },
16 { EfiACPIMemoryNVS, FixedPcdGet32 (PcdMemoryTypeEfiACPIMemoryNVS) },
17 { EfiReservedMemoryType, FixedPcdGet32 (PcdMemoryTypeEfiReservedMemoryType) },
18 { EfiRuntimeServicesData, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesData) },
19 { EfiRuntimeServicesCode, FixedPcdGet32 (PcdMemoryTypeEfiRuntimeServicesCode) },
20 { EfiMaxMemoryType, 0 }
21 };
22
23 EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {
24 {
25 EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,
26 &gEfiPeiMasterBootModePpiGuid,
27 NULL
28 }
29 };
30
31 EFI_PEI_GRAPHICS_DEVICE_INFO_HOB mDefaultGraphicsDeviceInfo = {
32 MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT16, MAX_UINT8, MAX_UINT8
33 };
34
35 /**
36 Create memory mapped io resource hob.
37
38 @param MmioBase Base address of the memory mapped io range
39 @param MmioSize Length of the memory mapped io range
40
41 **/
42 VOID
43 BuildMemoryMappedIoRangeHob (
44 EFI_PHYSICAL_ADDRESS MmioBase,
45 UINT64 MmioSize
46 )
47 {
48 BuildResourceDescriptorHob (
49 EFI_RESOURCE_MEMORY_MAPPED_IO,
50 (EFI_RESOURCE_ATTRIBUTE_PRESENT |
51 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
52 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
53 EFI_RESOURCE_ATTRIBUTE_TESTED),
54 MmioBase,
55 MmioSize
56 );
57
58 BuildMemoryAllocationHob (
59 MmioBase,
60 MmioSize,
61 EfiMemoryMappedIO
62 );
63 }
64
65 /**
66 Check the integrity of firmware volume header
67
68 @param[in] FwVolHeader A pointer to a firmware volume header
69
70 @retval TRUE The firmware volume is consistent
71 @retval FALSE The firmware volume has corrupted.
72
73 **/
74 STATIC
75 BOOLEAN
76 IsFvHeaderValid (
77 IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader
78 )
79 {
80 UINT16 Checksum;
81
82 // Skip nv storage fv
83 if (CompareMem (&FwVolHeader->FileSystemGuid, &gEfiFirmwareFileSystem2Guid, sizeof(EFI_GUID)) != 0 ) {
84 return FALSE;
85 }
86
87 if ( (FwVolHeader->Revision != EFI_FVH_REVISION) ||
88 (FwVolHeader->Signature != EFI_FVH_SIGNATURE) ||
89 (FwVolHeader->FvLength == ((UINTN) -1)) ||
90 ((FwVolHeader->HeaderLength & 0x01 ) !=0) ) {
91 return FALSE;
92 }
93
94 Checksum = CalculateCheckSum16 ((UINT16 *) FwVolHeader, FwVolHeader->HeaderLength);
95 if (Checksum != 0) {
96 DEBUG (( DEBUG_ERROR,
97 "ERROR - Invalid Firmware Volume Header Checksum, change 0x%04x to 0x%04x\r\n",
98 FwVolHeader->Checksum,
99 (UINT16)( Checksum + FwVolHeader->Checksum )));
100 return TRUE; //FALSE; Need update UEFI build tool when patching entrypoin @start of fd.
101 }
102
103 return TRUE;
104 }
105
106 /**
107 Install FvInfo PPI and create fv hobs for remained fvs
108
109 **/
110 VOID
111 PeiReportRemainedFvs (
112 VOID
113 )
114 {
115 UINT8* TempPtr;
116 UINT8* EndPtr;
117
118 TempPtr = (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase);
119 EndPtr = (UINT8* )(UINTN) (PcdGet32 (PcdPayloadFdMemBase) + PcdGet32 (PcdPayloadFdMemSize));
120
121 for (;TempPtr < EndPtr;) {
122 if (IsFvHeaderValid ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)) {
123 if (TempPtr != (UINT8* )(UINTN) PcdGet32 (PcdPayloadFdMemBase)) {
124 // Skip the PEI FV
125 DEBUG((DEBUG_INFO, "Found one valid fv : 0x%lx.\n", TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength));
126
127 PeiServicesInstallFvInfoPpi (
128 NULL,
129 (VOID *) (UINTN) TempPtr,
130 (UINT32) (UINTN) ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength,
131 NULL,
132 NULL
133 );
134 BuildFvHob ((EFI_PHYSICAL_ADDRESS)(UINTN) TempPtr, ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength);
135 }
136 }
137 TempPtr += ((EFI_FIRMWARE_VOLUME_HEADER* )TempPtr)->FvLength;
138 }
139 }
140
141
142 /**
143 Find the board related info from ACPI table
144
145 @param AcpiTableBase ACPI table start address in memory
146 @param AcpiBoardInfo Pointer to the acpi board info strucutre
147
148 @retval RETURN_SUCCESS Successfully find out all the required information.
149 @retval RETURN_NOT_FOUND Failed to find the required info.
150
151 **/
152 RETURN_STATUS
153 ParseAcpiInfo (
154 IN UINT64 AcpiTableBase,
155 OUT ACPI_BOARD_INFO *AcpiBoardInfo
156 )
157 {
158 EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
159 EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
160 UINT32 *Entry32;
161 UINTN Entry32Num;
162 EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;
163 EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
164 UINT64 *Entry64;
165 UINTN Entry64Num;
166 UINTN Idx;
167 UINT32 *Signature;
168 EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *MmCfgHdr;
169 EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *MmCfgBase;
170
171 Rsdp = (EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)(UINTN)AcpiTableBase;
172 DEBUG ((DEBUG_INFO, "Rsdp at 0x%p\n", Rsdp));
173 DEBUG ((DEBUG_INFO, "Rsdt at 0x%x, Xsdt at 0x%lx\n", Rsdp->RsdtAddress, Rsdp->XsdtAddress));
174
175 //
176 // Search Rsdt First
177 //
178 Fadt = NULL;
179 MmCfgHdr = NULL;
180 Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress);
181 if (Rsdt != NULL) {
182 Entry32 = (UINT32 *)(Rsdt + 1);
183 Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
184 for (Idx = 0; Idx < Entry32Num; Idx++) {
185 Signature = (UINT32 *)(UINTN)Entry32[Idx];
186 if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
187 Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
188 DEBUG ((DEBUG_INFO, "Found Fadt in Rsdt\n"));
189 }
190
191 if (*Signature == EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE) {
192 MmCfgHdr = (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *)Signature;
193 DEBUG ((DEBUG_INFO, "Found MM config address in Rsdt\n"));
194 }
195
196 if ((Fadt != NULL) && (MmCfgHdr != NULL)) {
197 goto Done;
198 }
199 }
200 }
201
202 //
203 // Search Xsdt Second
204 //
205 Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);
206 if (Xsdt != NULL) {
207 Entry64 = (UINT64 *)(Xsdt + 1);
208 Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;
209 for (Idx = 0; Idx < Entry64Num; Idx++) {
210 Signature = (UINT32 *)(UINTN)Entry64[Idx];
211 if (*Signature == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
212 Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)Signature;
213 DEBUG ((DEBUG_INFO, "Found Fadt in Xsdt\n"));
214 }
215
216 if (*Signature == EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE) {
217 MmCfgHdr = (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *)Signature;
218 DEBUG ((DEBUG_INFO, "Found MM config address in Xsdt\n"));
219 }
220
221 if ((Fadt != NULL) && (MmCfgHdr != NULL)) {
222 goto Done;
223 }
224 }
225 }
226
227 if (Fadt == NULL) {
228 return RETURN_NOT_FOUND;
229 }
230
231 Done:
232
233 AcpiBoardInfo->PmCtrlRegBase = Fadt->Pm1aCntBlk;
234 AcpiBoardInfo->PmTimerRegBase = Fadt->PmTmrBlk;
235 AcpiBoardInfo->ResetRegAddress = Fadt->ResetReg.Address;
236 AcpiBoardInfo->ResetValue = Fadt->ResetValue;
237 AcpiBoardInfo->PmEvtBase = Fadt->Pm1aEvtBlk;
238 AcpiBoardInfo->PmGpeEnBase = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
239
240 if (MmCfgHdr != NULL) {
241 MmCfgBase = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)((UINT8*) MmCfgHdr + sizeof (*MmCfgHdr));
242 AcpiBoardInfo->PcieBaseAddress = MmCfgBase->BaseAddress;
243 } else {
244 AcpiBoardInfo->PcieBaseAddress = 0;
245 }
246 DEBUG ((DEBUG_INFO, "PmCtrl Reg 0x%lx\n", AcpiBoardInfo->PmCtrlRegBase));
247 DEBUG ((DEBUG_INFO, "PmTimer Reg 0x%lx\n", AcpiBoardInfo->PmTimerRegBase));
248 DEBUG ((DEBUG_INFO, "Reset Reg 0x%lx\n", AcpiBoardInfo->ResetRegAddress));
249 DEBUG ((DEBUG_INFO, "Reset Value 0x%x\n", AcpiBoardInfo->ResetValue));
250 DEBUG ((DEBUG_INFO, "PmEvt Reg 0x%lx\n", AcpiBoardInfo->PmEvtBase));
251 DEBUG ((DEBUG_INFO, "PmGpeEn Reg 0x%lx\n", AcpiBoardInfo->PmGpeEnBase));
252 DEBUG ((DEBUG_INFO, "PcieBaseAddr 0x%lx\n", AcpiBoardInfo->PcieBaseAddress));
253
254 //
255 // Verify values for proper operation
256 //
257 ASSERT(Fadt->Pm1aCntBlk != 0);
258 ASSERT(Fadt->PmTmrBlk != 0);
259 ASSERT(Fadt->ResetReg.Address != 0);
260 ASSERT(Fadt->Pm1aEvtBlk != 0);
261 ASSERT(Fadt->Gpe0Blk != 0);
262
263 DEBUG_CODE_BEGIN ();
264 BOOLEAN SciEnabled;
265
266 //
267 // Check the consistency of SCI enabling
268 //
269
270 //
271 // Get SCI_EN value
272 //
273 if (Fadt->Pm1CntLen == 4) {
274 SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
275 } else {
276 //
277 // if (Pm1CntLen == 2), use 16 bit IO read;
278 // if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
279 //
280 SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
281 }
282
283 if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
284 (Fadt->SmiCmd == 0) &&
285 !SciEnabled) {
286 //
287 // The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
288 // table does not provide a means to enable it through FADT->SmiCmd
289 //
290 DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"
291 " enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
292 " This may cause issues in OS.\n"));
293 }
294 DEBUG_CODE_END ();
295
296 return RETURN_SUCCESS;
297 }
298
299 EFI_STATUS
300 MemInfoCallback (
301 IN MEMROY_MAP_ENTRY *MemoryMapEntry,
302 IN VOID *Params
303 )
304 {
305 PAYLOAD_MEM_INFO *MemInfo;
306 UINTN Attribue;
307 EFI_PHYSICAL_ADDRESS Base;
308 EFI_RESOURCE_TYPE Type;
309 UINT64 Size;
310 UINT32 SystemLowMemTop;
311
312 Attribue = EFI_RESOURCE_ATTRIBUTE_PRESENT |
313 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
314 EFI_RESOURCE_ATTRIBUTE_TESTED |
315 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
316 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
317 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
318 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE;
319
320 MemInfo = (PAYLOAD_MEM_INFO *)Params;
321 Type = (MemoryMapEntry->Type == 1) ? EFI_RESOURCE_SYSTEM_MEMORY : EFI_RESOURCE_MEMORY_RESERVED;
322 Base = MemoryMapEntry->Base;
323 Size = MemoryMapEntry->Size;
324
325 if ((Base < 0x100000) && ((Base + Size) > 0x100000)) {
326 Size -= (0x100000 - Base);
327 Base = 0x100000;
328 }
329
330 if (Base >= 0x100000) {
331 if (Type == EFI_RESOURCE_SYSTEM_MEMORY) {
332 if (Base < 0x100000000ULL) {
333 MemInfo->UsableLowMemTop = (UINT32)(Base + Size);
334 } else {
335 Attribue &= ~EFI_RESOURCE_ATTRIBUTE_TESTED;
336 }
337 BuildResourceDescriptorHob (
338 EFI_RESOURCE_SYSTEM_MEMORY,
339 Attribue,
340 (EFI_PHYSICAL_ADDRESS)Base,
341 Size
342 );
343 } else if (Type == EFI_RESOURCE_MEMORY_RESERVED) {
344 BuildResourceDescriptorHob (
345 EFI_RESOURCE_MEMORY_RESERVED,
346 Attribue,
347 (EFI_PHYSICAL_ADDRESS)Base,
348 Size
349 );
350 if (Base < 0x100000000ULL) {
351 SystemLowMemTop = ((UINT32)(Base + Size) + 0x0FFFFFFF) & 0xF0000000;
352 if (SystemLowMemTop > MemInfo->SystemLowMemTop) {
353 MemInfo->SystemLowMemTop = SystemLowMemTop;
354 }
355 }
356 }
357 }
358
359 return EFI_SUCCESS;
360 }
361
362 /**
363 This is the entrypoint of PEIM
364
365 @param FileHandle Handle of the file being invoked.
366 @param PeiServices Describes the list of possible PEI Services.
367
368 @retval EFI_SUCCESS if it completed successfully.
369 **/
370 EFI_STATUS
371 EFIAPI
372 BlPeiEntryPoint (
373 IN EFI_PEI_FILE_HANDLE FileHandle,
374 IN CONST EFI_PEI_SERVICES **PeiServices
375 )
376 {
377 EFI_STATUS Status;
378 UINT64 LowMemorySize;
379 UINT64 PeiMemSize = SIZE_64MB;
380 EFI_PHYSICAL_ADDRESS PeiMemBase = 0;
381 UINT32 RegEax;
382 UINT8 PhysicalAddressBits;
383 PAYLOAD_MEM_INFO PldMemInfo;
384 SYSTEM_TABLE_INFO SysTableInfo;
385 SYSTEM_TABLE_INFO *NewSysTableInfo;
386 ACPI_BOARD_INFO AcpiBoardInfo;
387 ACPI_BOARD_INFO *NewAcpiBoardInfo;
388 EFI_PEI_GRAPHICS_INFO_HOB GfxInfo;
389 EFI_PEI_GRAPHICS_INFO_HOB *NewGfxInfo;
390 EFI_PEI_GRAPHICS_DEVICE_INFO_HOB GfxDeviceInfo;
391 EFI_PEI_GRAPHICS_DEVICE_INFO_HOB *NewGfxDeviceInfo;
392
393
394 //
395 // Report lower 640KB of RAM. Attribute EFI_RESOURCE_ATTRIBUTE_TESTED
396 // is intentionally omitted to prevent erasing of the coreboot header
397 // record before it is processed by ParseMemoryInfo.
398 //
399 BuildResourceDescriptorHob (
400 EFI_RESOURCE_SYSTEM_MEMORY,
401 (
402 EFI_RESOURCE_ATTRIBUTE_PRESENT |
403 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
404 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
405 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
406 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
407 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
408 ),
409 (EFI_PHYSICAL_ADDRESS)(0),
410 (UINT64)(0xA0000)
411 );
412
413 BuildResourceDescriptorHob (
414 EFI_RESOURCE_MEMORY_RESERVED,
415 (
416 EFI_RESOURCE_ATTRIBUTE_PRESENT |
417 EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
418 EFI_RESOURCE_ATTRIBUTE_TESTED |
419 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
420 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |
421 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |
422 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
423 ),
424 (EFI_PHYSICAL_ADDRESS)(0xA0000),
425 (UINT64)(0x60000)
426 );
427
428
429 //
430 // Parse memory info
431 //
432 ZeroMem (&PldMemInfo, sizeof(PldMemInfo));
433 Status = ParseMemoryInfo (MemInfoCallback, &PldMemInfo);
434 if (EFI_ERROR(Status)) {
435 return Status;
436 }
437
438 //
439 // Install memory
440 //
441 LowMemorySize = PldMemInfo.UsableLowMemTop;
442 PeiMemBase = (LowMemorySize - PeiMemSize) & (~(BASE_64KB - 1));
443 DEBUG ((DEBUG_INFO, "Low memory 0x%lx\n", LowMemorySize));
444 DEBUG ((DEBUG_INFO, "SystemLowMemTop 0x%x\n", PldMemInfo.SystemLowMemTop));
445 DEBUG ((DEBUG_INFO, "PeiMemBase: 0x%lx.\n", PeiMemBase));
446 DEBUG ((DEBUG_INFO, "PeiMemSize: 0x%lx.\n", PeiMemSize));
447 Status = PeiServicesInstallPeiMemory (PeiMemBase, PeiMemSize);
448 ASSERT_EFI_ERROR (Status);
449
450 //
451 // Set cache on the physical memory
452 //
453 MtrrSetMemoryAttribute (BASE_1MB, LowMemorySize - BASE_1MB, CacheWriteBack);
454 MtrrSetMemoryAttribute (0, 0xA0000, CacheWriteBack);
455
456 //
457 // Create Memory Type Information HOB
458 //
459 BuildGuidDataHob (
460 &gEfiMemoryTypeInformationGuid,
461 mDefaultMemoryTypeInformation,
462 sizeof(mDefaultMemoryTypeInformation)
463 );
464
465 //
466 // Create Fv hob
467 //
468 PeiReportRemainedFvs ();
469
470 BuildMemoryAllocationHob (
471 PcdGet32 (PcdPayloadFdMemBase),
472 PcdGet32 (PcdPayloadFdMemSize),
473 EfiBootServicesData
474 );
475
476 //
477 // Build CPU memory space and IO space hob
478 //
479 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
480 if (RegEax >= 0x80000008) {
481 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
482 PhysicalAddressBits = (UINT8) RegEax;
483 } else {
484 PhysicalAddressBits = 36;
485 }
486
487 //
488 // Create a CPU hand-off information
489 //
490 BuildCpuHob (PhysicalAddressBits, 16);
491
492 //
493 // Report Local APIC range
494 //
495 BuildMemoryMappedIoRangeHob (0xFEC80000, SIZE_512KB);
496
497 //
498 // Boot mode
499 //
500 Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);
501 ASSERT_EFI_ERROR (Status);
502
503 Status = PeiServicesInstallPpi (mPpiBootMode);
504 ASSERT_EFI_ERROR (Status);
505
506 //
507 // Create guid hob for frame buffer information
508 //
509 Status = ParseGfxInfo (&GfxInfo);
510 if (!EFI_ERROR (Status)) {
511 NewGfxInfo = BuildGuidHob (&gEfiGraphicsInfoHobGuid, sizeof (GfxInfo));
512 ASSERT (NewGfxInfo != NULL);
513 CopyMem (NewGfxInfo, &GfxInfo, sizeof (GfxInfo));
514 DEBUG ((DEBUG_INFO, "Created graphics info hob\n"));
515 }
516
517
518 Status = ParseGfxDeviceInfo (&GfxDeviceInfo);
519 if (!EFI_ERROR (Status)) {
520 NewGfxDeviceInfo = BuildGuidHob (&gEfiGraphicsDeviceInfoHobGuid, sizeof (GfxDeviceInfo));
521 ASSERT (NewGfxDeviceInfo != NULL);
522 CopyMem (NewGfxDeviceInfo, &GfxDeviceInfo, sizeof (GfxDeviceInfo));
523 DEBUG ((DEBUG_INFO, "Created graphics device info hob\n"));
524 }
525
526
527 //
528 // Create guid hob for system tables like acpi table and smbios table
529 //
530 Status = ParseSystemTable(&SysTableInfo);
531 ASSERT_EFI_ERROR (Status);
532 if (!EFI_ERROR (Status)) {
533 NewSysTableInfo = BuildGuidHob (&gUefiSystemTableInfoGuid, sizeof (SYSTEM_TABLE_INFO));
534 ASSERT (NewSysTableInfo != NULL);
535 CopyMem (NewSysTableInfo, &SysTableInfo, sizeof (SYSTEM_TABLE_INFO));
536 DEBUG ((DEBUG_INFO, "Detected Acpi Table at 0x%lx, length 0x%x\n", SysTableInfo.AcpiTableBase, SysTableInfo.AcpiTableSize));
537 DEBUG ((DEBUG_INFO, "Detected Smbios Table at 0x%lx, length 0x%x\n", SysTableInfo.SmbiosTableBase, SysTableInfo.SmbiosTableSize));
538 }
539
540 //
541 // Create guid hob for acpi board information
542 //
543 Status = ParseAcpiInfo (SysTableInfo.AcpiTableBase, &AcpiBoardInfo);
544 ASSERT_EFI_ERROR (Status);
545 if (!EFI_ERROR (Status)) {
546 NewAcpiBoardInfo = BuildGuidHob (&gUefiAcpiBoardInfoGuid, sizeof (ACPI_BOARD_INFO));
547 ASSERT (NewAcpiBoardInfo != NULL);
548 CopyMem (NewAcpiBoardInfo, &AcpiBoardInfo, sizeof (ACPI_BOARD_INFO));
549 DEBUG ((DEBUG_INFO, "Create acpi board info guid hob\n"));
550 }
551
552 //
553 // Parse platform specific information.
554 //
555 Status = ParsePlatformInfo ();
556 if (EFI_ERROR (Status)) {
557 DEBUG ((DEBUG_ERROR, "Error when parsing platform info, Status = %r\n", Status));
558 return Status;
559 }
560
561 //
562 // Mask off all legacy 8259 interrupt sources
563 //
564 IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF);
565 IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF);
566
567 return EFI_SUCCESS;
568 }
569