2 This file defines the SMM S3 communication hob structure.
4 Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
9 #ifndef PAYLOAD_S3_COMMUNICATION_GUID_H_
10 #define PAYLOAD_S3_COMMUNICATION_GUID_H_
12 extern EFI_GUID gS3CommunicationGuid
;
17 EFI_SMRAM_DESCRIPTOR CommBuffer
;
18 BOOLEAN PldAcpiS3Enable
;
19 } PLD_S3_COMMUNICATION
;
22 /// The information below is used for communication between bootloader and payload.
23 /// It is used to save/store some registers in S3 path
25 /// This region exists only when gEfiAcpiVariableGuid HOB exist.
26 /// when PLD_S3_INFO.PldAcpiS3Enable is false, the communication buffer is defined as below.
36 UINT8 SwSmiTriggerValue
;
39 CPU_SMMBASE SmmBase
[0];
43 // Payload would save this structure to S3 communication area in normal boot.
44 // In S3 path, bootloader need restore SMM base and writie IO port 0xB2 with SwSmiTriggerValue
45 // to trigger SMI to let payload to restore S3.
48 EFI_HOB_GUID_TYPE Header
;