1 /**************************************************************************;
4 ;* Intel Corporation - ACPI Reference Code for the Baytrail *;
5 ;* Family of Customer Reference Boards. *;
8 ;* Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved *;
10 ; This program and the accompanying materials are licensed and made available under
11 ; the terms and conditions of the BSD License that accompanies this distribution.
12 ; The full text of the license may be found at
13 ; http://opensource.org/licenses/bsd-license.php.
15 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 ;**************************************************************************/
23 // Define the following External variables to prevent a WARNING when
24 // using ASL.EXE and an ERROR when using IASL.EXE.
31 External(\_PR.CPU0._PPC, IntObj)
32 External(\_SB.PCI0.LPCB.TPM.PTS, MethodObj)
33 External(\_SB.STR3, DeviceObj)
34 External(\_SB.I2C1.BATC, DeviceObj)
35 External(\_SB.DPTF, DeviceObj)
36 External(\_SB.TCHG, DeviceObj)
37 External(\_SB.IAOE.PTSL)
38 External(\_SB.IAOE.WKRS)
41 // Create a Global MUTEX.
48 // Update 8 bits of the 32-bit Port 80h.
51 // Arg0: 0 = Write Port 80h, Bits 7:0 Only.
52 // 1 = Write Port 80h, Bits 15:8 Only.
53 // 2 = Write Port 80h, Bits 23:16 Only.
54 // 3 = Write Port 80h, Bits 31:24 Only.
55 // Arg1: 8-bit Value to write
60 Method(P8XH,2,Serialized)
62 If(LEqual(Arg0,0)) // Write Port 80h, Bits 7:0.
64 Store(Or(And(P80D,0xFFFFFF00),Arg1),P80D)
67 If(LEqual(Arg0,1)) // Write Port 80h, Bits 15:8.
69 Store(Or(And(P80D,0xFFFF00FF),ShiftLeft(Arg1,8)),P80D)
72 If(LEqual(Arg0,2)) // Write Port 80h, Bits 23:16.
74 Store(Or(And(P80D,0xFF00FFFF),ShiftLeft(Arg1,16)),P80D)
77 If(LEqual(Arg0,3)) // Write Port 80h, Bits 31:24.
79 Store(Or(And(P80D,0x00FFFFFF),ShiftLeft(Arg1,24)),P80D)
85 // Define SW SMI port as an ACPI Operating Region to use for generate SW SMI.
87 OperationRegion (SPRT, SystemIO, 0xB2, 2)
88 Field (SPRT, ByteAcc, Lock, Preserve)
93 // The _PIC Control Method is optional for ACPI design. It allows the
94 // OS to inform the ASL code which interrupt controller is being used,
95 // the 8259 or APIC. The reference code in this document will address
96 // PCI IRQ Routing and resource allocation for both cases.
98 // The values passed into _PIC are:
108 OperationRegion(SWC0, SystemIO, 0x610, 0x0F)
109 Field(SWC0, ByteAcc, NoLock, Preserve)
111 G1S, 8, //SWC GPE1_STS
115 G1S2, 8, //SWC GPE1_STS_2
116 G1S3, 8 //SWC GPE1_STS_3
119 OperationRegion (SWC1, SystemIO, \PMBS, 0x2C)
120 Field(SWC1, DWordAcc, NoLock, Preserve)
128 // Prepare to Sleep. The hook is called when the OS is about to
129 // enter a sleep state. The argument passed is the numeric value of
134 Store(0,P80D) // Zero out the entire Port 80h DWord.
135 P8XH(0,Arg0) // Output Sleep State to Port 80h, Byte 0.
137 //clear the 3 SWC status bits
149 If(LEqual(Arg0,3)) // If S3 Suspend
152 // Disable Digital Thermal Sensor function when doing S3 suspend
156 If(LGreaterEqual(DTSE, 0x01))
158 Store(30, DTSF) // DISABLE_UPDATE_DTS_EVERY_SMI
159 Store(0xD0, SSMP) // DTS SW SMI
165 // Wake. This hook is called when the OS is about to wake from a
166 // sleep state. The argument passed is the numeric value of the
167 // sleep state the system is waking from.
168 Method(_WAK,1,Serialized)
170 P8XH(1,0xAB) // Beginning of _WAK.
172 Notify(\_SB.PWRB,0x02)
176 // Reinitialize the Native PCI Express after resume
182 If(And(OSCC,0x04)) // PME control granted?
188 If(LOr(LEqual(Arg0,3), LEqual(Arg0,4))) // If S3 or S4 Resume
192 // If CMP is enabled, we may need to restore the C-State and/or
193 // P-State configuration, as it may have been saved before the
194 // configuration was finalized based on OS/driver support.
196 // CFGD[24] = Two or more cores enabled
198 If(And(CFGD,0x01000000))
201 // If CMP and the OSYS is WinXP SP1, we will enable C1-SMI if
202 // C-States are enabled.
204 // CFGD[7:4] = C4, C3, C2, C1 Capable/Enabled
209 // Windows XP SP2 does not properly restore the P-State
210 // upon resume from S4 or S3 with degrade modes enabled.
211 // Use the existing _PPC methods to cycle the available
212 // P-States such that the processor ends up running at
213 // the proper P-State.
215 // Note: For S4, another possible W/A is to always boot
216 // the system in LFM.
218 If(LEqual(OSYS,2002))
222 If(LGreater(\_PR.CPU0._PPC,0))
224 Subtract(\_PR.CPU0._PPC,1,\_PR.CPU0._PPC)
226 Add(\_PR.CPU0._PPC,1,\_PR.CPU0._PPC)
231 Add(\_PR.CPU0._PPC,1,\_PR.CPU0._PPC)
233 Subtract(\_PR.CPU0._PPC,1,\_PR.CPU0._PPC)
239 Return(Package() {0,0})
242 // Power Notification:
243 // Perform all needed OS notifications during a
252 Method(PNOT,0,Serialized)
254 // If MP enabled and driver support is present, notify all
261 Notify(\_PR.CPU0,0x80) // Eval CPU0 _PPC.
266 Notify(\_PR.CPU0,0x81) // Eval _CST.
272 Notify(\_PR.CPU1,0x80) // Eval CPU1 _PPC.
277 Notify(\_PR.CPU1,0x81) // Eval _CST.
283 Notify(\_PR.CPU2,0x80) // Eval CPU2 _PPC.
288 Notify(\_PR.CPU2,0x81) // Eval _CST.
294 Notify(\_PR.CPU3,0x80) // Eval CPU3 _PPC.
299 Notify(\_PR.CPU3,0x81) // Eval _CST.
305 Notify(\_PR.CPU0,0x80) // Eval _PPC.
307 Notify(\_PR.CPU0,0x81) // Eval _CST
316 Name(CRTT, 110) // Processor critical temperature
317 Name(ACTT, 77) // Active temperature limit for processor participant
318 Name(GCR0, 70) // Critical temperature for Generic participant 0 in degree celsius
319 Name(GCR1, 70) // Critical temperature for Generic participant 1 in degree celsius
320 Name(GCR2, 70) // Critical temperature for Generic participant 2 in degree celsius
321 Name(GCR3, 70) // Critical temperature for Generic participant 3 in degree celsius
322 Name(GCR4, 70) // Critical temperature for Generic participant 4 in degree celsius
323 Name(GCR5, 70) // Critical temperature for Generic participant 5 in degree celsius
324 Name(GCR6, 70) // Critical temperature for Generic participant 6 in degree celsius
325 Name(PST0, 60) // Passive temperature limit for Generic Participant 0 in degree celsius
326 Name(PST1, 60) // Passive temperature limit for Generic Participant 1 in degree celsius
327 Name(PST2, 60) // Passive temperature limit for Generic Participant 2 in degree celsius
328 Name(PST3, 60) // Passive temperature limit for Generic Participant 3 in degree celsius
329 Name(PST4, 60) // Passive temperature limit for Generic Participant 4 in degree celsius
330 Name(PST5, 60) // Passive temperature limit for Generic Participant 5 in degree celsius
331 Name(PST6, 60) // Passive temperature limit for Generic Participant 6 in degree celsius
333 Name(PDBG, 0) // DPTF Super debug option
334 Name(PDPM, 1) // DPTF DPPM enable
335 Name(PDBP, 1) // DPTF DBPT enable (dynamic battery protection technology)
340 0x1, // LPO StartPState
345 Name(BRQD, 0x00) // This is used to determine if DPTF display participant requested Brightness level change
346 // or it is from Graphics driver. Value of 1 is for DPTF else it is 0
350 // NVS has stale DTS data. Get and update the values
351 // with current temperatures. Note that this will also
352 // re-arm any AP Thermal Interrupts.
353 // Read temperature settings from global NVS
355 Store(Subtract(DPPT, 8), ACTT) // Active Trip point = Passive trip point - 8
370 // Read Current low power mode setting from global NVS
374 // Update DPTF Super Debug option
378 // Update DPTF LPO Options
379 Store(LPOE, Index(DLPO,1))
380 Store(LPPS, Index(DLPO,2))
381 Store(LPST, Index(DLPO,3))
382 Store(LPPC, Index(DLPO,4))
383 Store(LPPF, Index(DLPO,5))
387 // Define a (Control Method) Power Button.
390 Name(_HID,EISAID("PNP0C0C"))
392 // GPI_SUS0 = GPE16 = Waketime SCI. The PRW isn't working when
393 // placed in any of the logical locations ( PS2K, PS2M),
394 // so a Power Button Device was created specifically
395 // for the WAKETIME_SCI PRW.
397 Name(_PRW, Package() {16,4})
402 Name(_HID, EISAID("PNP0C0E"))
409 // Determine the OS and store the value, where:
411 // OSYS = 2009 = Windows 7 and Windows Server 2008 R2.
412 // OSYS = 2012 = Windows 8 and Windows Server 2012.
414 // Assume Windows 7 at a minimum.
418 // Check for a specific OS which supports _OSI.
420 If(CondRefOf(\_OSI,Local0))
422 // Linux returns _OSI = TRUE for numerous Windows
423 // strings so that it is fully compatible with
424 // BIOSes available in the market today. There are
425 // currently 2 known exceptions to this model:
426 // 1) Video Repost - Linux supports S3 without
427 // requireing a Driver, meaning a Video
428 // Repost will be required.
429 // 2) On-Screen Branding - a full CMT Logo
430 // is limited to the WIN2K and WINXP
431 // Operating Systems only.
433 // Use OSYS for Windows Compatibility.
434 If(\_OSI("Windows 2009")) // Windows 7 or Windows Server 2008 R2
438 If(\_OSI("Windows 2012")) // Windows 8 or Windows Server 2012
442 If(\_OSI("Windows 2013")) //Windows Blue
448 // If CMP is enabled, enable SMM C-State
449 // coordination. SMM C-State coordination
450 // will be disabled in _PDC if driver support
451 // for independent C-States deeper than C1
456 Method(NHPG,0,Serialized)
461 Method(NPME,0,Serialized)
467 Device (GPED) //virtual GPIO device for ASL based AC/Battery/Expection notification
470 Name (_HID, "INT0002")
471 Name (_CID, "INT0002")
472 Name (_DDN, "Virtual GPIO controller" )
475 Method (_CRS, 0x0, Serialized)
477 Name (RBUF, ResourceTemplate ()
479 Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, ) {0x9} // Was 9
484 Method (_STA, 0x0, NotSerialized)
489 Method (_AEI, 0x0, Serialized)
491 Name(RBUF, ResourceTemplate()
493 GpioInt(Edge, ActiveHigh, ExclusiveAndWake, PullDown,,"\\_SB.GPED",) {2} //pin 2
498 Method(_E02) // _Exx method will be called when interrupt is raised
500 If (LEqual (PWBS, 1))
502 Store (1, PWBS) //Clear PowerButton Status
504 If (LEqual (PMEB, 1))
506 Store (1, PMEB) //Clear PME_B0_STS
508 If (LEqual (\_SB.PCI0.SATA.PMES, 1))
510 Store (1, \_SB.PCI0.SATA.PMES)
511 Notify (\_SB.PCI0.SATA, 0x02)
516 If (LAnd(LEqual (\_SB.PCI0.EM41.PMES, 1), LEqual(PCIM, 1)))
518 Store (1, \_SB.PCI0.EM41.PMES)
519 Notify (\_SB.PCI0.EM41, 0x02)
525 If (LAnd(LEqual (\_SB.PCI0.EM45.PMES, 1), LEqual(PCIM, 1)))
527 Store (1, \_SB.PCI0.EM45.PMES)
528 Notify (\_SB.PCI0.EM45, 0x02)
533 If (LEqual (\_SB.PCI0.HDEF.PMES, 1))
535 Store (1, \_SB.PCI0.HDEF.PMES)
536 Notify (\_SB.PCI0.HDEF, 0x02)
540 If (LEqual (\_SB.PCI0.EHC1.PMES, 1))
542 Store (1, \_SB.PCI0.EHC1.PMES)
543 Notify (\_SB.PCI0.EHC1, 0x02)
545 If (LEqual (\_SB.PCI0.XHC1.PMES, 1))
547 Store (1, \_SB.PCI0.XHC1.PMES)
548 Notify (\_SB.PCI0.XHC1, 0x02)
550 If (LEqual (\_SB.PCI0.SEC0.PMES, 1))
552 Or (\_SB.PCI0.SEC0.PMES, Zero, \_SB.PCI0.SEC0.PMES)
553 Notify (\_SB.PCI0.SEC0, 0x02)
558 //--------------------
560 //--------------------
564 Name (_HID, "INT33FC")
565 Name (_CID, "INT33B2")
566 Name (_DDN, "ValleyView2 General Purpose Input/Output (GPIO) controller" )
568 Method (_CRS, 0x0, Serialized)
570 Name (RBUF, ResourceTemplate ()
572 Memory32Fixed (ReadWrite, 0x0FED0C000, 0x00001000)
573 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {49}
579 Method (_STA, 0x0, NotSerialized)
582 // GPO driver will report present if any of below New IO bus exist
584 If (LOr(LEqual(L11D, 0), LEqual(L12D, 0))) // LPIO1 PWM #1 or #2 exist
586 If (LOr(LEqual(L13D, 0), LEqual(L14D, 0))) // LPIO1 HS-UART #1 or #2 exist
588 If (LOr(LEqual(L15D, 0), LEqual(SD1D, 0))) // LPIO1 SPI or SCC SDIO #1 exist
590 If (LOr(LEqual(SD2D, 0), LEqual(SD3D, 0))) // SCC SDIO #2 or #3 exist
592 If (LOr(LEqual(L21D, 0), LEqual(L22D, 0))) // LPIO2 I2C #1 or #2 exist
594 If (LOr(LEqual(L23D, 0), LEqual(L24D, 0))) // LPIO2 I2C #3 or #4 exist
596 If (LOr(LEqual(L25D, 0), LEqual(L26D, 0))) // LPIO2 I2C #5 or #6 exist
598 If (LEqual(L27D, 0)) // LPIO2 I2C #7 exist
604 // Track status of GPIO OpRegion availability for this controller
614 OperationRegion(GPOP, SystemIo, \GPBS, 0x50)
615 Field(GPOP, ByteAcc, NoLock, Preserve) {
616 Offset(0x28), // cfio_ioreg_SC_GP_LVL_63_32_ - [GPIO_BASE_ADDRESS] + 28h
618 BTD3, 1, //This field is not used. Pin not defined in schematics. Closest is GPIO_S5_35 - COMBO_BT_WAKEUP
619 Offset(0x48), // cfio_ioreg_SC_GP_LVL_95_64_ - [GPIO_BASE_ADDRESS] + 48h
621 SHD3, 1 //GPIO_S0_SC_95 - SENS_HUB_RST_N
631 Name (_HID, "INT33FC")
632 Name (_CID, "INT33B2")
633 Name (_DDN, "ValleyView2 GPNCORE controller" )
635 Method (_CRS, 0x0, Serialized)
637 Name (RBUF, ResourceTemplate ()
639 Memory32Fixed (ReadWrite, 0x0FED0D000, 0x00001000)
640 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {48}
645 Method (_STA, 0x0, NotSerialized)
647 Return(\_SB.GPO0._STA)
654 Name (_HID, "INT33FC")
655 Name (_CID, "INT33B2")
656 Name (_DDN, "ValleyView2 GPSUS controller" )
658 Method (_CRS, 0x0, Serialized)
660 Name (RBUF, ResourceTemplate ()
662 Memory32Fixed (ReadWrite, 0x0FED0E000, 0x00001000)
663 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {50}
668 Method (_STA, 0x0, NotSerialized)
673 // Track status of GPIO OpRegion availability for this controller
682 //Manipulate GPIO line using GPIO operation regions.
683 Name (GMOD, ResourceTemplate () //One method of creating a Connection for OpRegion accesses in Field definitions
685 //is creating a named object that refers to the connection attributes
686 GpioIo (Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2") {21} //sus 21+128 BT+WLAN_ENABLE
689 OperationRegion(GPOP, SystemIo, \GPBS, 0x100)
690 Field(GPOP, ByteAcc, NoLock, Preserve) {
691 Offset(0x88), // cfio_ioreg_SUS_GP_LVL_31_0_ - [GPIO_BASE_ADDRESS] + 88h
698 include ("PchScc.asl")
699 include ("PchLpss.asl")
707 // Device for Message Bus Interface
711 Name(_HID, "INT33BD")
712 Name(_CID, "INT33BD")
713 Name(_HRV, 2)//different from CLT's
716 Method (_CRS, 0, Serialized)
718 Name (RBUF, ResourceTemplate ()
722 0xE00000D0, // Address Base
723 0xC, // Address Length (MCR/MDR/MCRX)
731 // custom opregion for MBI access
733 OperationRegion (REGS, 0x87, 0x0, 0x30)
734 Field (REGS, DWordAcc, NoLock, Preserve)
736 PORT, 32, // Message Port
737 REG, 32, // Message Target Register Address
738 DATA, 32, // Message Data
739 MASK, 32, // Mask bits for modify operation
740 BE, 32, // Message Write Byte enables: 0 - BYTE; 1 - WORD; 2 - DWORD
741 OP, 32 // Operations: 0 - read; 1 - write; 2 - modify
745 // availability of the custom opregion
750 If (Lequal(Arg0, 0x87))
765 Method(READ, 3, Serialized)
767 Store(0xFFFFFFFF , Local0)
768 If (Lequal (AVBL, 1))
770 Store(0, OP) // must be set at first, do not change!
789 Method(WRIT, 4, Serialized)
791 If (Lequal (AVBL, 1))
793 Store(1, OP) // must be set at first, do not change!
812 Method(MODI, 5, Serialized)
814 If (Lequal (AVBL, 1))
816 Store(2, OP) // must be set at first, do not change!
829 Name(PICM, 0) // Global Name, returns current Interrupt controller mode; updated from _PIC control method