Vlv2TbltDevicePkg/FspSupport/Library/SecFspPlatformSecLibVlv2/Ia32/PeiCoreEntry.asm

   1 ;------------------------------------------------------------------------------
   2 ;
   3 ; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
   4 ; SPDX-License-Identifier: BSD-2-Clause-Patent
   5 ;
   6 ; Module Name:
   7 ;
   8 ;  SecEntry.asm
   9 ;
  10 ; Abstract:
  11 ;
  12 ;  This is the code that goes from real-mode to protected mode.
  13 ;  It consumes the reset vector, calls two basic APIs from FSP binary.
  14 ;
  15 ;------------------------------------------------------------------------------
  16
  17 .686p
  18 .xmm
  19 .model flat, c
  20 .code
  21
  22 EXTRN   SecStartup:NEAR
  23 EXTRN   PlatformInit:NEAR
  24
  25 CallPeiCoreEntryPoint   PROC PUBLIC
  26   ;
  27   ; Obtain the hob list pointer
  28   ;
  29   mov     eax, [esp+4]
  30   ;
  31   ; Obtain the stack information
  32   ;   ECX: start of range
  33   ;   EDX: end of range
  34   ;
  35   mov     ecx, [esp+8]
  36   mov     edx, [esp+0Ch]
  37
  38   ;
  39   ; Platform init
  40   ;
  41   pushad
  42   push edx
  43   push ecx
  44   push eax
  45   call PlatformInit
  46   pop  eax
  47   pop  eax
  48   pop  eax
  49   popad
  50
  51   ;
  52   ; Set stack top pointer
  53   ;
  54   mov     esp, edx
  55
  56   ;
  57   ; Push the hob list pointer
  58   ;
  59   push    eax
  60
  61   ;
  62   ; Save the value
  63   ;   ECX: start of range
  64   ;   EDX: end of range
  65   ;
  66   mov     ebp, esp
  67   push    ecx
  68   push    edx
  69
  70   ;
  71   ; Push processor count to stack first, then BIST status (AP then BSP)
  72   ;
  73   mov     eax, 1
  74   cpuid
  75   shr     ebx, 16
  76   and     ebx, 0000000FFh
  77   cmp     bl, 1
  78   jae     PushProcessorCount
  79
  80   ;
  81   ; Some processors report 0 logical processors.  Effectively 0 = 1.
  82   ; So we fix up the processor count
  83   ;
  84   inc     ebx
  85
  86 PushProcessorCount:
  87   push    ebx
  88
  89   ;
  90   ; We need to implement a long-term solution for BIST capture.  For now, we just copy BSP BIST
  91   ; for all processor threads
  92   ;
  93   xor     ecx, ecx
  94   mov     cl, bl
  95 PushBist:
  96   movd    eax, mm0
  97   push    eax
  98   loop    PushBist
  99
 100   ; Save Time-Stamp Counter
 101   movd eax, mm5
 102   push eax
 103
 104   movd eax, mm6
 105   push eax
 106
 107   ;
 108   ; Pass entry point of the PEI core
 109   ;
 110   mov     edi, 0FFFFFFE0h
 111   push    DWORD PTR ds:[edi]
 112
 113   ;
 114   ; Pass BFV into the PEI Core
 115   ;
 116   mov     edi, 0FFFFFFFCh
 117   push    DWORD PTR ds:[edi]
 118
 119   ;
 120   ; Pass stack size into the PEI Core
 121   ;
 122   mov     ecx, [ebp - 4]
 123   mov     edx, [ebp - 8]
 124   push    ecx       ; RamBase
 125
 126   sub     edx, ecx
 127   push    edx       ; RamSize
 128
 129   ;
 130   ; Pass Control into the PEI Core
 131   ;
 132   call SecStartup
 133 CallPeiCoreEntryPoint   ENDP
 134
 135 END