3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
16 GUID used for Watchdog Timer status in the HOB list.
20 #ifndef _EFI_WATCHDOG_TIMER_HOB_GUID_H_
21 #define _EFI_WATCHDOG_TIMER_HOB_GUID_H_
23 #define EFI_WATCHDOG_TIMER_HOB_GUID \
24 { 0x226cd3f, 0x69b5, 0x4150, 0xac, 0xbe, 0xbf, 0xbf, 0x18, 0xe3, 0x3, 0xd5 }
26 #define EFI_WATCHDOG_TIMER_DEFINITION_HOB_GUID \
27 { 0xd29302b0, 0x11ba, 0x4073, 0xa2, 0x27, 0x53, 0x8d, 0x25, 0x42, 0x70, 0x9f }
32 HWWD_SPONTANEOUS_REBOOT
,
34 } HW_WATCHDOG_TIMEOUT
;
37 HW_WATCHDOG_TIMEOUT TimeoutStatus
;
41 // Watchdog timer action values.
43 #define WDT_ACTION_RESET 0x01 // reload/reset timer
44 #define WDT_ACTION_QUERY_CURRENT_VALUE 0x04 // get current value // DON'T NEED FOR OVERCLOCK UTILITY
45 #define WDT_ACTION_QUERY_COUNTDOWN_PERIOD 0x05 // get countdown period
46 #define WDT_ACTION_SET_COUNTDOWN_PERIOD 0x06 // set countdown period
47 #define WDT_ACTION_QUERY_RUNNING_STATE 0x08 // query if running
48 #define WDT_ACTION_SET_RUNNING_STATE 0x09 // start timer
49 #define WDT_ACTION_QUERY_STOPPED_STATE 0x0A // query if stopped
50 #define WDT_ACTION_SET_STOPPED_STATE 0x0B // stop timer
51 #define WDT_ACTION_QUERY_STATUS 0x20 // is current boot cause by wdt timeout?
52 #define WDT_ACTION_SET_STATUS 0x21 // resets wdt status bit
55 // Watchdog timer instruction values.
57 #define WDT_INSTR_VALUE_MASK 0x03 // Mask for just the value
58 #define WDT_INSTR_READ_CMP_VALUE 0x00 // Read / compare value
59 #define WDT_INSTR_READ_COUNTDOWN 0x01 // read countdown value
60 #define WDT_INSTR_WRITE_VALUE 0x02 // Write value
61 #define WDT_INSTR_WRITE_COUNTDOWN 0x03 // write countdown value
62 #define WDT_INSTR_PRESERVE_REG 0x80 // preserve reg; used in Write Value / Write Countdown
63 #define WDT_INSTR_WRITE_VALUE_PRES (0x02 | WDT_INSTR_PRESERVE_REG) // Write value with preserve
64 #define WDT_INSTR_WRITE_COUNTDOWN_PRES (0x03 | WDT_INSTR_PRESERVE_REG) // write countdown value with preserve
67 // The Generic Address Structure is defined in the ACPI Specification and should only be
68 // changed to match updated revisions of that specification. The GAS_ADDRESS_SPACE and
69 // GAS_ACCESS_SIZE enumerations are also defined by the ACPI Specification.
75 GAS_EMBEDDED_CONTROLLER
,
91 UINT8 RegisterBitWidth
;
92 UINT8 RegisterBitOffset
;
95 } GENERIC_ADDRESS_STRUCTURE
;
98 // GAS_SYSTEM_MEMORY - When used as the AddressSpaceId, the 64-bit physical memory address
99 // of the register. 32-bit platforms must have the high DWORD set to 0.
100 // GAS_SYSTEM_IO - The 64-bit I/O address of the register. 32-bit platforms must have
101 // the high DWORD set to 0.
102 // GAS_PCI_CONFIG_SPACE - PCI Configuration space addresses must be confined to devices on PCI
103 // Sepment Group 0, Bus 0. This restriction exists to accommodate access
104 // to fixed hardware prior to PCI bus enumeration. The format of addresses
105 // are defined as follows:
106 // Highest WORD: Reserved and must be -0-
107 // ... PCI Device number on bus 0
108 // ... PCI Function number
109 // Lowest WORD: Offset in the configuration space header.
116 GENERIC_ADDRESS_STRUCTURE GenericAddressStructures
;
123 UINT32 MaxTimerCount
;
124 UINT32 MinTimerCount
;
125 UINT16 InstructionCount
;
126 WD_INSTRUCTION ActionDefinitions
[1];
131 extern EFI_GUID gWatchdogTimerHobGuid
;
132 extern EFI_GUID gWatchdogTimerDefinitionHobGuid
;
134 #endif // _EFI_WATCHDOG_TIMER_HOB_GUID_H_