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1 /*++
2
3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
4
5 This program and the accompanying materials are licensed and made available under
6 the terms and conditions of the BSD License that accompanies this distribution.
7 The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef _SPIFlash_H_
16 #define _SPIFlash_H_
17
18 #include <Protocol/Spi.h>
19
20 //EFI_STATUS SpiFlashLock(BOOLEAN Lock);
21 //EFI_STATUS SpiFlashInit(void);
22
23 typedef enum {
24 EnumSpiFlashW25Q64,
25 EnumSpiFlashAT25DF321A,
26 EnumSpiFlashAT26DF321,
27 EnumSpiFlashAT25DF641,
28 EnumSpiFlashW25Q16,
29 EnumSpiFlashW25Q32,
30 EnumSpiFlashW25X32,
31 EnumSpiFlashW25X64,
32 EnumSpiFlashW25Q128,
33 EnumSpiFlashMX25L16,
34 EnumSpiFlashMX25L32,
35 EnumSpiFlashMX25L64,
36 EnumSpiFlashMX25L128,
37 EnumSpiFlashMX25U6435F,
38 EnumSpiFlashSST25VF016B,
39 EnumSpiFlashSST25VF064C,
40 EnumSpiFlashN25Q064,
41 EnumSpiFlashM25PX16,
42 EnumSpiFlashN25Q032,
43 EnumSpiFlashM25PX32,
44 EnumSpiFlashM25PX64,
45 EnumSpiFlashN25Q128,
46 EnumSpiFlashEN25Q16,
47 EnumSpiFlashEN25Q32,
48 EnumSpiFlashEN25Q64,
49 EnumSpiFlashEN25Q128,
50 EnumSpiFlashA25L016,
51 EnumSpiFlashMax
52 } SPI_FLASH_TYPES_SUPPORTED;
53
54 //
55 // Serial Flash VendorId and DeviceId
56 //
57 #define SF_VENDOR_ID_ATMEL 0x1F
58 #define SF_DEVICE_ID0_AT26DF321 0x47
59 #define SF_DEVICE_ID1_AT26DF321 0x00
60 #define SF_DEVICE_ID0_AT25DF321A 0x47
61 #define SF_DEVICE_ID1_AT25DF321A 0x01
62 #define SF_DEVICE_ID0_AT25DF641 0x48
63 #define SF_DEVICE_ID1_AT25DF641 0x00
64
65 #define SF_VENDOR_ID_WINBOND 0xEF
66 #define SF_DEVICE_ID0_W25XXX 0x30
67 #define SF_DEVICE_ID1_W25X32 0x16
68 #define SF_DEVICE_ID1_W25X64 0x17
69 #define SF_DEVICE_ID0_W25QXX 0x40
70 #define SF_DEVICE_ID1_W25Q16 0x15
71 #define SF_DEVICE_ID1_W25Q32 0x16
72 #define SF_DEVICE_ID1_W25Q64 0x17
73 #define SF_DEVICE_ID1_W25Q128 0x18
74
75 #define SF_VENDOR_ID_MACRONIX 0xC2
76 #define SF_DEVICE_ID0_MX25LXX 0x20
77 #define SF_DEVICE_ID1_MX25L16 0x15
78 #define SF_DEVICE_ID1_MX25L32 0x16
79 #define SF_DEVICE_ID1_MX25L64 0x17
80 #define SF_DEVICE_ID1_MX25L128 0x18
81 #define SF_DEVICE_ID0_MX25UXX 0x25
82 #define SF_DEVICE_ID1_MX25U6435F 0x37
83
84 #define SF_VENDOR_ID_NUMONYX 0x20
85 #define SF_DEVICE_ID0_N25Q064 0xBB
86 #define SF_DEVICE_ID1_N25Q064 0x17
87 #define SF_DEVICE_ID0_M25PXXX 0x71
88 #define SF_DEVICE_ID0_N25QXXX 0xBA
89 #define SF_DEVICE_ID1_M25PX16 0x15
90 #define SF_DEVICE_ID1_N25Q032 0x16
91 #define SF_DEVICE_ID1_M25PX32 0x16
92 #define SF_DEVICE_ID1_M25PX64 0x17
93 #define SF_DEVICE_ID1_N25Q128 0x18
94
95 #define SF_VENDOR_ID_SST 0xBF
96 #define SF_DEVICE_ID0_SST25VF0XXX 0x25
97 #define SF_DEVICE_ID1_SST25VF016B 0x41
98 #define SF_DEVICE_ID1_SST25VF064C 0x4B
99
100 #define SF_VENDOR_ID_EON 0x1C
101 #define SF_DEVICE_ID0_EN25QXX 0x30
102 #define SF_DEVICE_ID1_EN25Q16 0x15
103 #define SF_DEVICE_ID1_EN25Q32 0x16
104 #define SF_DEVICE_ID1_EN25Q64 0x17
105 #define SF_DEVICE_ID1_EN25Q128 0x18
106
107 #define SF_VENDOR_ID_AMIC 0x37
108 #define SF_DEVICE_ID0_A25L016 0x30
109 #define SF_DEVICE_ID1_A25L016 0x15
110
111 #define ATMEL_AT26DF321_SIZE 0x00400000
112 #define ATMEL_AT25DF321A_SIZE 0x00400000
113 #define ATMEL_AT25DF641_SIZE 0x00800000
114 #define WINBOND_W25X32_SIZE 0x00400000
115 #define WINBOND_W25X64_SIZE 0x00800000
116 #define WINBOND_W25Q16_SIZE 0x00200000
117 #define WINBOND_W25Q32_SIZE 0x00400000
118 #define WINBOND_W25Q64_SIZE 0x00800000
119 #define WINBOND_W25Q128_SIZE 0x01000000
120 #define SST_SST25VF016B_SIZE 0x00200000
121 #define SST_SST25VF064C_SIZE 0x00800000
122 #define MACRONIX_MX25L16_SIZE 0x00200000
123 #define MACRONIX_MX25L32_SIZE 0x00400000
124 #define MACRONIX_MX25L64_SIZE 0x00800000
125 #define MACRONIX_MX25U64_SIZE 0x00800000
126 #define MACRONIX_MX25L128_SIZE 0x01000000
127 #define NUMONYX_M25PX16_SIZE 0x00400000
128 #define NUMONYX_N25Q032_SIZE 0x00400000
129 #define NUMONYX_M25PX32_SIZE 0x00400000
130 #define NUMONYX_M25PX64_SIZE 0x00800000
131 #define NUMONYX_N25Q064_SIZE 0x00800000
132 #define NUMONYX_N25Q128_SIZE 0x01000000
133 #define EON_EN25Q16_SIZE 0x00200000
134 #define EON_EN25Q32_SIZE 0x00400000
135 #define EON_EN25Q64_SIZE 0x00800000
136 #define EON_EN25Q128_SIZE 0x01000000
137 #define AMIC_A25L16_SIZE 0x00200000
138
139 #define SF_VENDOR_ID_SST 0xBF
140 #define SF_DEVICE_ID0_25LF080A 0x25
141 #define SF_DEVICE_ID1_25LF080A 0x8E
142 #define SF_DEVICE_ID0_25VF016B 0x25
143 #define SF_DEVICE_ID1_25VF016B 0x41
144
145 #define SF_VENDOR_ID_ATMEL 0x1F
146 #define SF_DEVICE_ID0_AT26DF321 0x47
147 #define SF_DEVICE_ID1_AT26DF321 0x00
148
149 #define SF_VENDOR_ID_STM 0x20
150 #define SF_DEVICE_ID0_M25P32 0x20
151 #define SF_DEVICE_ID1_M25P32 0x16
152
153 #define SF_VENDOR_ID_WINBOND 0xEF
154 #define SF_DEVICE_ID0_W25XXX 0x30
155
156 #define SF_DEVICE_ID1_W25X80 0x14
157 #define SF_DEVICE_ID1_W25X16 0x15
158 #define SF_DEVICE_ID1_W25X32 0x16
159 #define SF_DEVICE_ID1_W25X64 0x17
160
161 #define SF_VENDOR_ID_MX 0xC2
162 #define SF_DEVICE_ID0_25L1605A 0x20
163 #define SF_DEVICE_ID1_25L1605A 0x15
164
165 #define SF_VENDOR_ID_NUMONYX 0x20
166 #define SF_DEVICE_ID0_M25PX16 0x71
167 #define SF_DEVICE_ID1_M25PX16 0x15
168
169 #define SST_25LF080A_SIZE 0x00100000
170 #define SST_25LF016B_SIZE 0x00200000
171 #define ATMEL_AT26DF321_SIZE 0x00400000
172 #define STM_M25P32_SIZE 0x00400000
173 #define WINBOND_W25X80_SIZE 0x00100000
174 #define WINBOND_W25X16_SIZE 0x00200000
175 #define WINBOND_W25X32_SIZE 0x00400000
176 #define WINBOND_W25X64_SIZE 0x00800000
177 #define MX_25L1605A_SIZE 0x00200000
178
179 //
180 // Physical Sector Size on the Serial Flash device
181 //
182 #define SF_SECTOR_SIZE 0x1000
183 #define SF_BLOCK_SIZE 0x8000
184
185 //
186 // Serial Flash Status Register definitions
187 //
188 #define SF_SR_BUSY 0x01 // Indicates if internal write operation is in progress
189 #define SF_SR_WEL 0x02 // Indicates if device is memory write enabled
190 #define SF_SR_BP0 0x04 // Block protection bit 0
191 #define SF_SR_BP1 0x08 // Block protection bit 1
192 #define SF_SR_BP2 0x10 // Block protection bit 2
193 #define SF_SR_BP3 0x20 // Block protection bit 3
194 #define SF_SR_WPE 0x3C // Enable write protection on all blocks
195 #define SF_SR_AAI 0x40 // Auto Address Increment Programming status
196 #define SF_SR_BPL 0x80 // Block protection lock-down
197
198 //
199 // Operation Instruction definitions for the Serial Flash Device
200 //
201 #define SF_INST_WRSR 0x01 // Write Status Register
202 #define SF_INST_PROG 0x02 // Byte Program
203 #define SF_INST_READ 0x03 // Read
204 #define SF_INST_WRDI 0x04 // Write Disable
205 #define SF_INST_RDSR 0x05 // Read Status Register
206 #define SF_INST_WREN 0x06 // Write Enable
207 #define SF_INST_HS_READ 0x0B // High-speed Read
208 #define SF_INST_SERASE 0x20 // Sector Erase (4KB)
209 #define SF_INST_BERASE 0x52 // Block Erase (32KB)
210 #define SF_INST_64KB_ERASE 0xD8 // Block Erase (64KB)
211 #define SF_INST_EWSR 0x50 // Enable Write Status Register
212 #define SF_INST_READ_ID 0xAB // Read ID
213 #define SF_INST_JEDEC_READ_ID 0x9F // JEDEC Read ID
214 #define SF_INST_DOFR 0x3B // Dual Output Fast Read
215 #define SF_INST_SFDP 0x5A // Serial Flash Discovery Parameters
216
217 #define SECTOR_SIZE_4KB 0x1000 // Common 4kBytes sector size
218 #define SECTOR_SIZE_64KB 0x10000 // Common 64kBytes sector size
219 #define BLOCK_SIZE_64KB 0x00010000 // Common 64kBytes block size
220 #define MAX_FWH_SIZE 0x00100000 // 8Mbit (Note that this can also be used for the 4Mbit )
221
222 //
223 // Prefix Opcode Index on the host SPI controller
224 //
225 typedef enum {
226 SPI_WREN, // Prefix Opcode 0: Write Enable
227 SPI_EWSR, // Prefix Opcode 1: Enable Write Status Register
228 } PREFIX_OPCODE_INDEX;
229
230 //
231 // Opcode Menu Index on the host SPI controller
232 //
233 typedef enum {
234 SPI_READ_ID, // Opcode 0: READ ID, Read cycle with address
235 SPI_READ, // Opcode 1: READ, Read cycle with address
236 SPI_RDSR, // Opcode 2: Read Status Register, No address
237 SPI_WRDI_SFDP, // Opcode 3: Write Disable or Discovery Parameters, No address
238 SPI_SERASE, // Opcode 4: Sector Erase (4KB), Write cycle with address
239 SPI_BERASE, // Opcode 5: Block Erase (32KB), Write cycle with address
240 SPI_PROG, // Opcode 6: Byte Program, Write cycle with address
241 SPI_WRSR, // Opcode 7: Write Status Register, No address
242 } SPI_OPCODE_INDEX;
243
244 #endif