Vlv2TbltDevicePkg/Library/CpuIA32Lib/X64/Cpu.asm

   1
   2 TITLE   Cpu.asm: Assembly code for the x64 resources
   3
   4 ;
   5 ; This file contains an 'Intel Sample Driver' and is
   6 ; licensed for Intel CPUs and chipsets under the terms of your
   7 ; license agreement with Intel or your vendor.  This file may
   8 ; be modified by the user, subject to additional terms of the
   9 ; license agreement
  10 ;
  11 ;
  12 ; Copyright (c)  1999  - 2014, Intel Corporation. All rights reserved
  13 ;
  14 ; SPDX-License-Identifier: BSD-2-Clause-Patent
  15
  16 ;
  17 ;
  18 ;
  19 ;
  20 ;
  21 ;*   Module Name:
  22 ;*
  23 ;*    Cpu.asm
  24 ;*
  25 ;*   Abstract:
  26 ;*
  27 ;------------------------------------------------------------------------------
  28
  29 text    SEGMENT
  30
  31
  32 ;------------------------------------------------------------------------------
  33 ;  VOID
  34 ;  EfiHalt (
  35 ;    VOID
  36 ;    )
  37 ;------------------------------------------------------------------------------
  38 EfiHalt PROC    PUBLIC
  39     hlt
  40     ret
  41 EfiHalt ENDP
  42
  43
  44 ;------------------------------------------------------------------------------
  45 ;  VOID
  46 ;  EfiWbinvd (
  47 ;    VOID
  48 ;    )
  49 ;------------------------------------------------------------------------------
  50 EfiWbinvd PROC    PUBLIC
  51     wbinvd
  52     ret
  53 EfiWbinvd ENDP
  54
  55
  56 ;------------------------------------------------------------------------------
  57 ;  VOID
  58 ;  EfiInvd (
  59 ;    VOID
  60 ;    )
  61 ;------------------------------------------------------------------------------
  62 EfiInvd PROC    PUBLIC
  63     invd
  64     ret
  65 EfiInvd ENDP
  66
  67 ;------------------------------------------------------------------------------
  68 ;  VOID
  69 ;  EfiCpuid (
  70 ;    IN   UINT32              RegisterInEax,          // rcx
  71 ;    OUT  EFI_CPUID_REGISTER  *Reg           OPTIONAL // rdx
  72 ;    )
  73 ;------------------------------------------------------------------------------
  74 EfiCpuid PROC   PUBLIC
  75     push  rbx
  76
  77     mov   r8,   rdx         ; r8 = *Reg
  78     mov   rax,  rcx         ; RegisterInEax
  79     cpuid
  80     cmp   r8,   0
  81     je    _Exit
  82     mov   [r8 +  0], eax    ; Reg->RegEax
  83     mov   [r8 +  4], ebx    ; Reg->RegEbx
  84     mov   [r8 +  8], ecx    ; Reg->RegEcx
  85     mov   [r8 + 12], edx    ; Reg->RegEdx
  86
  87 _Exit:
  88     pop   rbx
  89     ret
  90 EfiCpuid  ENDP
  91
  92 ;------------------------------------------------------------------------------
  93 ;  UINT64
  94 ;  EfiReadMsr (
  95 ;    IN   UINT32  Index,  // rcx
  96 ;    )
  97 ;------------------------------------------------------------------------------
  98 EfiReadMsr PROC  PUBLIC
  99     rdmsr
 100     sal     rdx, 32   ; edx:eax -> rax
 101     or      rax, rdx  ; rax = edx:eax
 102     ret
 103 EfiReadMsr  ENDP
 104
 105 ;------------------------------------------------------------------------------
 106 ;  VOID
 107 ;  EfiWriteMsr (
 108 ;    IN   UINT32  Index,  // rcx
 109 ;    IN   UINT64  Value   // rdx
 110 ;    )
 111 ;------------------------------------------------------------------------------
 112 EfiWriteMsr PROC   PUBLIC
 113     mov     rax,  rdx   ; rdx = Value
 114     sar     rdx,  32    ; convert rdx to edx upper 32-bits
 115     wrmsr               ; wrmsr[ecx] result = edx:eax
 116     ret
 117 EfiWriteMsr  ENDP
 118
 119
 120 ;------------------------------------------------------------------------------
 121 ; UINT64
 122 ; EfiReadTsc (
 123 ;   VOID
 124 ;   );
 125 ;------------------------------------------------------------------------------
 126 EfiReadTsc PROC    PUBLIC
 127     rdtsc
 128     shl     rax, 32
 129     shrd    rax, rdx, 32
 130     ret
 131 EfiReadTsc  ENDP
 132
 133 ;------------------------------------------------------------------------------
 134 ; VOID
 135 ; EfiDisableCache (
 136 ;   VOID
 137 ;   );
 138 ;------------------------------------------------------------------------------
 139 EfiDisableCache PROC    PUBLIC
 140 ; added a check to see if cache is already disabled. If it is, then skip.
 141     mov   rax, cr0
 142     and   rax, 060000000h
 143     cmp   rax, 0
 144     jne   @f
 145     mov   rax, cr0
 146     or    rax, 060000000h
 147     mov   cr0, rax
 148     wbinvd
 149 @@:
 150     ret
 151 EfiDisableCache ENDP
 152
 153 ;------------------------------------------------------------------------------
 154 ; VOID
 155 ; EfiEnableCache (
 156 ;   VOID
 157 ;   );
 158 ;------------------------------------------------------------------------------
 159 EfiEnableCache PROC    PUBLIC
 160     wbinvd
 161     mov   rax, cr0
 162     and   rax, 09fffffffh
 163     mov   cr0, rax
 164     ret
 165 EfiEnableCache ENDP
 166
 167 ;------------------------------------------------------------------------------
 168 ; UINTN
 169 ; EfiGetEflags (
 170 ;   VOID
 171 ;   );
 172 ;------------------------------------------------------------------------------
 173 EfiGetEflags PROC    PUBLIC
 174     pushfq
 175     pop   rax
 176     ret
 177 EfiGetEflags  ENDP
 178
 179 ;------------------------------------------------------------------------------
 180 ; VOID
 181 ; EfiDisableInterrupts (
 182 ;   VOID
 183 ;   );
 184 ;------------------------------------------------------------------------------
 185 EfiDisableInterrupts PROC    PUBLIC
 186     cli
 187     ret
 188 EfiDisableInterrupts  ENDP
 189
 190 ;------------------------------------------------------------------------------
 191 ; VOID
 192 ; EfiEnableInterrupts (
 193 ;   VOID
 194 ;   );
 195 ;------------------------------------------------------------------------------
 196 EfiEnableInterrupts PROC    PUBLIC
 197     sti
 198     ret
 199 EfiEnableInterrupts  ENDP
 200 ;------------------------------------------------------------------------------
 201 ;  VOID
 202 ;  EfiCpuidExt (
 203 ;    IN   UINT32              RegisterInEax,
 204 ;    IN   UINT32              CacheLevel,
 205 ;    OUT  EFI_CPUID_REGISTER  *Regs
 206 ;    )
 207 ;------------------------------------------------------------------------------
 208 EfiCpuidExt PROC    PUBLIC
 209      push   rbx
 210      mov    rax, rcx          ; rax = RegisterInEax
 211      mov    rcx, rdx          ; rcx = CacheLevel
 212
 213      cpuid
 214      mov    [r8 + 0 ],  eax   ; Reg->RegEax
 215      mov    [r8 + 4 ],  ebx   ; Reg->RegEbx
 216      mov    [r8 + 8 ],  ecx   ; Reg->RegEcx
 217      mov    [r8 + 12],  edx   ; Reg->RegEdx
 218
 219      pop rbx
 220      ret
 221 EfiCpuidExt  ENDP
 222 END