3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
21 #include "PlatformDxe.h"
22 #include <Protocol/PchPlatformPolicy.h>
23 #include <Protocol/VlvPlatformPolicy.h>
24 #include <Library/PchPlatformLib.h>
26 #include "AzaliaVerbTable.h"
27 #include "Protocol/GlobalNvsArea.h"
28 #include "Protocol/DxePchPolicyUpdateProtocol.h"
30 #define MOBILE_PLATFORM 1
31 #define DESKTOP_PLATFORM 2
33 EFI_GUID gDxePchPolicyUpdateProtocolGuid
= DXE_PCH_POLICY_UPDATE_PROTOCOL_GUID
;
34 DXE_PCH_POLICY_UPDATE_PROTOCOL mDxePchPolicyUpdate
= { 0 };
38 Updates the feature policies according to the setup variable.
44 InitPchPlatformPolicy (
45 IN EFI_PLATFORM_INFO_HOB
*PlatformInfo
48 DXE_PCH_PLATFORM_POLICY_PROTOCOL
*DxePlatformPchPolicy
;
50 EFI_GLOBAL_NVS_AREA_PROTOCOL
*GlobalNvsArea
;
53 PCH_STEPPING SocStepping
= PchA0
;
54 BOOLEAN ModifyVariable
;
56 ModifyVariable
= FALSE
;
57 DEBUG ((EFI_D_INFO
, "InitPchPlatformPolicy() - Start\n"));
59 Status
= gBS
->LocateProtocol (&gDxePchPlatformPolicyProtocolGuid
, NULL
, (VOID
**) &DxePlatformPchPolicy
);
60 ASSERT_EFI_ERROR (Status
);
63 // Locate the Global NVS Protocol.
65 Status
= gBS
->LocateProtocol (
66 &gEfiGlobalNvsAreaProtocolGuid
,
68 (VOID
**) &GlobalNvsArea
70 ASSERT_EFI_ERROR (Status
);
73 // Update system information
75 DxePlatformPchPolicy
->Revision
= DXE_PCH_PLATFORM_POLICY_PROTOCOL_REVISION_12
;
78 // General initialization
80 DxePlatformPchPolicy
->BusNumber
= 0;
83 // VLV BIOS Spec Section 3.6 Flash Security Recommendation,
84 // Intel strongly recommends that BIOS sets the BIOS Interface Lock Down bit. Enabling this bit
85 // will mitigate malicious software attempts to replace the system BIOS option ROM with its own code.
86 // We always enable this as a platform policy.
88 DxePlatformPchPolicy
->LockDownConfig
->BiosInterface
= PCH_DEVICE_ENABLE
;
89 DxePlatformPchPolicy
->LockDownConfig
->BiosLock
= mSystemConfiguration
.SpiRwProtect
;
94 DxePlatformPchPolicy
->DeviceEnabling
->Lan
= mSystemConfiguration
.Lan
;
95 DxePlatformPchPolicy
->DeviceEnabling
->Azalia
= mSystemConfiguration
.PchAzalia
;
96 DxePlatformPchPolicy
->DeviceEnabling
->Sata
= mSystemConfiguration
.Sata
;
97 DxePlatformPchPolicy
->DeviceEnabling
->Smbus
= PCH_DEVICE_ENABLE
;
98 DxePlatformPchPolicy
->DeviceEnabling
->LpeEnabled
= mSystemConfiguration
.Lpe
;
100 DxePlatformPchPolicy
->UsbConfig
->Ehci1Usbr
= PCH_DEVICE_DISABLE
;
102 DxePlatformPchPolicy
->UsbConfig
->UsbXhciLpmSupport
=mSystemConfiguration
.UsbXhciLpmSupport
;
105 // Disable FFRD PR0 USB port2 for power saving since PR0 uses non-POR WWAN (but enable on PR0.3/PR0.5/PR1)
107 if ((PlatformInfo
->BoardId
== BOARD_ID_BL_FFRD
) && (PlatformInfo
->BoardRev
== PR0
))
108 if (mSystemConfiguration
.PchUsbPort
[2] !=0) {
109 mSystemConfiguration
.PchUsbPort
[2]=0;
110 ModifyVariable
= TRUE
;
114 if (ModifyVariable
) {
115 Status
= gRT
->SetVariable (
117 &gEfiNormalSetupGuid
,
118 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
119 sizeof(SYSTEM_CONFIGURATION
),
120 &mSystemConfiguration
124 SocStepping
= PchStepping();
125 if (mSystemConfiguration
.UsbAutoMode
== 1) { // auto mode is enabled
126 if (PchA0
== SocStepping
) {
128 // For A0, EHCI is enabled as default.
130 mSystemConfiguration
.PchUsb20
= 1;
131 mSystemConfiguration
.PchUsb30Mode
= 0;
132 mSystemConfiguration
.UsbXhciSupport
= 0;
133 DEBUG ((EFI_D_INFO
, "EHCI is enabled as default. SOC 0x%x\n", SocStepping
));
136 // For A1 and later, XHCI is enabled as default.
138 mSystemConfiguration
.PchUsb20
= 0;
139 mSystemConfiguration
.PchUsb30Mode
= 1;
140 mSystemConfiguration
.UsbXhciSupport
= 1;
141 DEBUG ((EFI_D_INFO
, "XHCI is enabled as default. SOC 0x%x\n", SocStepping
));
144 //overwrite the setting
146 Status
= gRT
->SetVariable(
148 &gEfiNormalSetupGuid
,
149 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
150 sizeof(SYSTEM_CONFIGURATION
),
151 &mSystemConfiguration
156 // USB Device 29 configuration
158 DxePlatformPchPolicy
->UsbConfig
->Usb20Settings
[0].Enable
= mSystemConfiguration
.PchUsb20
;
159 DxePlatformPchPolicy
->UsbConfig
->UsbPerPortCtl
= mSystemConfiguration
.PchUsbPerPortCtl
;
160 if (mSystemConfiguration
.PchUsbPerPortCtl
!= PCH_DEVICE_DISABLE
) {
161 for (PortIndex
= 0; PortIndex
< PCH_USB_MAX_PHYSICAL_PORTS
; PortIndex
++) {
162 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[PortIndex
].Enable
= mSystemConfiguration
.PchUsbPort
[PortIndex
];
166 DxePlatformPchPolicy
->UsbConfig
->EhciDebug
= mSystemConfiguration
.PchEhciDebug
;
169 // xHCI (USB 3.0) related settings from setup variable
171 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.XhciStreams
= mSystemConfiguration
.PchUsb30Streams
;
173 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.Mode
= mSystemConfiguration
.PchUsb30Mode
;
176 // Remove XHCI Pre-Boot Driver setup option selection from end-user view and automate loading of USB 3.0 BIOS driver based on XhciMode selection
178 switch (mSystemConfiguration
.PchUsb30Mode
) {
180 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 0;
183 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 1;
186 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 0;
188 case 3: // Smart Auto
189 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= 1;
192 DxePlatformPchPolicy
->UsbConfig
->Usb30Settings
.PreBootSupport
= mSystemConfiguration
.UsbXhciSupport
;
198 DxePlatformPchPolicy
->UsbConfig
->UsbOtgSettings
.Enable
= mSystemConfiguration
.PchUsbOtg
;
200 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[0].Dock
= PCH_DEVICE_DISABLE
;
201 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[1].Dock
= PCH_DEVICE_DISABLE
;
202 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[2].Dock
= PCH_DEVICE_DISABLE
;
203 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[3].Dock
= PCH_DEVICE_DISABLE
;
205 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[0].Panel
= PCH_USB_FRONT_PANEL
;
206 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[1].Panel
= PCH_USB_FRONT_PANEL
;
207 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[2].Panel
= PCH_USB_BACK_PANEL
;
208 DxePlatformPchPolicy
->UsbConfig
->PortSettings
[3].Panel
= PCH_USB_BACK_PANEL
;
212 // Enable USB Topology control and program the topology setting for every USB port
213 // See Platform Design Guide for description of topologies
216 // Port 0: ~5.3", Port 1: ~4.9", Port 2: ~4.7", Port 3: ~8.0"
218 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[0] = 0x53;
219 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[1] = 0x49;
220 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[2] = 0x47;
221 DxePlatformPchPolicy
->UsbConfig
->Usb20PortLength
[3] = 0x80;
223 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[0] = PchUsbOverCurrentPin0
;
224 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[1] = PchUsbOverCurrentPin0
;
225 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[2] = PchUsbOverCurrentPin1
;
226 DxePlatformPchPolicy
->UsbConfig
->Usb20OverCurrentPins
[3] = PchUsbOverCurrentPin1
;
228 DxePlatformPchPolicy
->UsbConfig
->Usb30OverCurrentPins
[0] = PchUsbOverCurrentPinSkip
;//PchUsbOverCurrentPin0;
230 DxePlatformPchPolicy
->EhciPllCfgEnable
= mSystemConfiguration
.EhciPllCfgEnable
;
231 DEBUG ((EFI_D_INFO
, "InitPchPlatformPolicy() DxePlatformPchPolicy->EhciPllCfgEnable = 0x%x \n",DxePlatformPchPolicy
->EhciPllCfgEnable
));
232 DxePlatformPchPolicy
->PciExpressConfig
->PcieDynamicGating
= mSystemConfiguration
.PcieDynamicGating
;
233 for (PortIndex
= 0; PortIndex
< PCH_PCIE_MAX_ROOT_PORTS
; PortIndex
++) {
234 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].Enable
= mSystemConfiguration
.IchPciExp
[PortIndex
];
235 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SlotImplemented
= PCH_DEVICE_ENABLE
;
236 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].FunctionNumber
= PortIndex
;
237 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].PhysicalSlotNumber
= PortIndex
;
238 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].Aspm
= 4;
239 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].PmSci
= PCH_DEVICE_DISABLE
;
240 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].ExtSync
= PCH_DEVICE_DISABLE
;
241 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].HotPlug
= PCH_DEVICE_DISABLE
;
242 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].AdvancedErrorReporting
= PCH_DEVICE_DISABLE
;
243 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].UnsupportedRequestReport
= PCH_DEVICE_DISABLE
;
244 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].FatalErrorReport
= PCH_DEVICE_DISABLE
;
245 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].NoFatalErrorReport
= PCH_DEVICE_DISABLE
;
246 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].CorrectableErrorReport
= PCH_DEVICE_DISABLE
;
247 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].PmeInterrupt
= 0;
248 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SystemErrorOnFatalError
= PCH_DEVICE_DISABLE
;
249 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SystemErrorOnNonFatalError
= PCH_DEVICE_DISABLE
;
250 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].SystemErrorOnCorrectableError
= PCH_DEVICE_DISABLE
;
251 DxePlatformPchPolicy
->PciExpressConfig
->RootPort
[PortIndex
].CompletionTimeout
= PchPciECompletionTO_Default
;
255 // SATA configuration
257 for (PortIndex
= 0; PortIndex
< PCH_AHCI_MAX_PORTS
; PortIndex
++) {
258 if (mSystemConfiguration
.SataType
== 0) {
259 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_ENABLE
;
260 DxePlatformPchPolicy
->SataConfig
->LegacyMode
= PCH_DEVICE_ENABLE
;
262 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_ENABLE
;
263 DxePlatformPchPolicy
->SataConfig
->LegacyMode
= PCH_DEVICE_DISABLE
;
265 if(mSystemConfiguration
.Sata
== 1){
266 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_ENABLE
;
268 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].Enable
= PCH_DEVICE_DISABLE
;
271 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].HotPlug
= PCH_DEVICE_DISABLE
;
272 } else if(1 == PortIndex
){
273 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].HotPlug
= PCH_DEVICE_DISABLE
;
276 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].SpinUp
= PCH_DEVICE_DISABLE
;
277 DxePlatformPchPolicy
->SataConfig
->PortSettings
[PortIndex
].MechSw
= PCH_DEVICE_DISABLE
;
279 DxePlatformPchPolicy
->SataConfig
->RaidAlternateId
= PCH_DEVICE_DISABLE
;
280 DxePlatformPchPolicy
->SataConfig
->Raid0
= PCH_DEVICE_ENABLE
;
281 DxePlatformPchPolicy
->SataConfig
->Raid1
= PCH_DEVICE_ENABLE
;
282 DxePlatformPchPolicy
->SataConfig
->Raid10
= PCH_DEVICE_ENABLE
;
283 DxePlatformPchPolicy
->SataConfig
->Raid5
= PCH_DEVICE_ENABLE
;
284 DxePlatformPchPolicy
->SataConfig
->Irrt
= PCH_DEVICE_ENABLE
;
285 DxePlatformPchPolicy
->SataConfig
->OromUiBanner
= PCH_DEVICE_ENABLE
;
286 DxePlatformPchPolicy
->SataConfig
->HddUnlock
= PCH_DEVICE_ENABLE
;
287 DxePlatformPchPolicy
->SataConfig
->LedLocate
= PCH_DEVICE_ENABLE
;
288 DxePlatformPchPolicy
->SataConfig
->IrrtOnly
= PCH_DEVICE_ENABLE
;
289 DxePlatformPchPolicy
->SataConfig
->SalpSupport
= PCH_DEVICE_ENABLE
;
290 DxePlatformPchPolicy
->SataConfig
->TestMode
= mSystemConfiguration
.SataTestMode
;
295 DxePlatformPchPolicy
->AzaliaConfig
->Pme
= mSystemConfiguration
.AzaliaPme
;
296 DxePlatformPchPolicy
->AzaliaConfig
->HdmiCodec
= mSystemConfiguration
.HdmiCodec
;
297 DxePlatformPchPolicy
->AzaliaConfig
->DS
= mSystemConfiguration
.AzaliaDs
;
298 DxePlatformPchPolicy
->AzaliaConfig
->AzaliaVCi
= mSystemConfiguration
.AzaliaVCiEnable
;
301 // Set LPSS configuration according to setup value.
303 DxePlatformPchPolicy
->LpssConfig
->LpssPciModeEnabled
= mSystemConfiguration
.LpssPciModeEnabled
;
305 DxePlatformPchPolicy
->LpssConfig
->Dma1Enabled
= mSystemConfiguration
.LpssDma1Enabled
;
306 DxePlatformPchPolicy
->LpssConfig
->I2C0Enabled
= mSystemConfiguration
.LpssI2C0Enabled
;
307 DxePlatformPchPolicy
->LpssConfig
->I2C1Enabled
= mSystemConfiguration
.LpssI2C1Enabled
;
308 DxePlatformPchPolicy
->LpssConfig
->I2C2Enabled
= mSystemConfiguration
.LpssI2C2Enabled
;
309 DxePlatformPchPolicy
->LpssConfig
->I2C3Enabled
= mSystemConfiguration
.LpssI2C3Enabled
;
310 DxePlatformPchPolicy
->LpssConfig
->I2C4Enabled
= mSystemConfiguration
.LpssI2C4Enabled
;
311 DxePlatformPchPolicy
->LpssConfig
->I2C5Enabled
= mSystemConfiguration
.LpssI2C5Enabled
;
312 DxePlatformPchPolicy
->LpssConfig
->I2C6Enabled
= mSystemConfiguration
.LpssI2C6Enabled
;
314 DxePlatformPchPolicy
->LpssConfig
->Dma0Enabled
= mSystemConfiguration
.LpssDma0Enabled
;;
315 DxePlatformPchPolicy
->LpssConfig
->Pwm0Enabled
= mSystemConfiguration
.LpssPwm0Enabled
;
316 DxePlatformPchPolicy
->LpssConfig
->Pwm1Enabled
= mSystemConfiguration
.LpssPwm1Enabled
;
317 DxePlatformPchPolicy
->LpssConfig
->Hsuart0Enabled
= mSystemConfiguration
.LpssHsuart0Enabled
;
318 DxePlatformPchPolicy
->LpssConfig
->Hsuart1Enabled
= mSystemConfiguration
.LpssHsuart1Enabled
;
319 DxePlatformPchPolicy
->LpssConfig
->SpiEnabled
= mSystemConfiguration
.LpssSpiEnabled
;
322 // Set SCC configuration according to setup value.
324 DxePlatformPchPolicy
->SccConfig
->SdioEnabled
= mSystemConfiguration
.LpssSdioEnabled
;
325 DxePlatformPchPolicy
->SccConfig
->SdcardEnabled
= TRUE
;
326 DxePlatformPchPolicy
->SccConfig
->SdCardSDR25Enabled
= mSystemConfiguration
.LpssSdCardSDR25Enabled
;
327 DxePlatformPchPolicy
->SccConfig
->SdCardDDR50Enabled
= mSystemConfiguration
.LpssSdCardDDR50Enabled
;
328 DxePlatformPchPolicy
->SccConfig
->HsiEnabled
= mSystemConfiguration
.LpssMipiHsi
;
330 if (mSystemConfiguration
.eMMCBootMode
== 1) {// Auto detection mode
334 switch (PchStepping()) {
335 case PchA0
: // A0 and A1
337 DEBUG ((EFI_D_ERROR
, "Auto Detect: SOC A0/A1: SCC eMMC 4.41 Configuration\n"));
338 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 1;
339 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= 0;
340 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= 0;
341 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= 0;
342 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= 0;
344 case PchB0
: // B0 and later
346 DEBUG ((EFI_D_ERROR
, "Auto Detect: SOC B0 and later: SCC eMMC 4.5 Configuration\n"));
347 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 0;
348 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= mSystemConfiguration
.LpsseMMC45Enabled
;
349 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= mSystemConfiguration
.LpsseMMC45DDR50Enabled
;
350 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= mSystemConfiguration
.LpsseMMC45HS200Enabled
;
351 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= mSystemConfiguration
.LpsseMMC45RetuneTimerValue
;
354 } else if (mSystemConfiguration
.eMMCBootMode
== 2) { // eMMC 4.41
355 DEBUG ((EFI_D_ERROR
, "Force to SCC eMMC 4.41 Configuration\n"));
356 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 1;
357 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= 0;
358 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= 0;
359 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= 0;
360 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= 0;
362 } else if (mSystemConfiguration
.eMMCBootMode
== 3) { // eMMC 4.5
363 DEBUG ((EFI_D_ERROR
, "Force to eMMC 4.5 Configuration\n"));
364 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 0;
365 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= mSystemConfiguration
.LpsseMMC45Enabled
;
366 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= mSystemConfiguration
.LpsseMMC45DDR50Enabled
;
367 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= mSystemConfiguration
.LpsseMMC45HS200Enabled
;
368 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= mSystemConfiguration
.LpsseMMC45RetuneTimerValue
;
370 } else { // Disable eMMC controllers
371 DEBUG ((EFI_D_ERROR
, "Disable eMMC controllers\n"));
372 DxePlatformPchPolicy
->SccConfig
->eMMCEnabled
= 0;
373 DxePlatformPchPolicy
->SccConfig
->eMMC45Enabled
= 0;
374 DxePlatformPchPolicy
->SccConfig
->eMMC45DDR50Enabled
= 0;
375 DxePlatformPchPolicy
->SccConfig
->eMMC45HS200Enabled
= 0;
376 DxePlatformPchPolicy
->SccConfig
->eMMC45RetuneTimerValue
= 0;
380 // Reserved SMBus Address
382 DxePlatformPchPolicy
->SmbusConfig
->NumRsvdSmbusAddresses
= 4;
383 DxePlatformPchPolicy
->SmbusConfig
->RsvdSmbusAddressTable
= mSmbusRsvdAddresses
;
386 // MiscPm Configuration
388 DxePlatformPchPolicy
->MiscPmConfig
->WakeConfig
.WolEnableOverride
= mSystemConfiguration
.WakeOnLanS5
;
389 DxePlatformPchPolicy
->MiscPmConfig
->SlpLanLowDc
= mSystemConfiguration
.SlpLanLowDc
;
390 DxePlatformPchPolicy
->MiscPmConfig
->PowerResetStatusClear
.MeWakeSts
= PCH_DEVICE_ENABLE
;
391 DxePlatformPchPolicy
->MiscPmConfig
->PowerResetStatusClear
.MeHrstColdSts
= PCH_DEVICE_ENABLE
;
392 DxePlatformPchPolicy
->MiscPmConfig
->PowerResetStatusClear
.MeHrstWarmSts
= PCH_DEVICE_ENABLE
;
395 // Enable / disable serial IRQ according to setup value.
397 DxePlatformPchPolicy
->SerialIrqConfig
->SirqEnable
= PCH_DEVICE_ENABLE
;
400 // Set Serial IRQ Mode Select according to setup value.
402 DxePlatformPchPolicy
->SerialIrqConfig
->SirqMode
= PchQuietMode
;
405 // Program the default Sub System Vendor Device Id
407 DxePlatformPchPolicy
->DefaultSvidSid
->SubSystemVendorId
= V_PCH_INTEL_VENDOR_ID
;
408 DxePlatformPchPolicy
->DefaultSvidSid
->SubSystemId
= V_PCH_DEFAULT_SID
;
410 mAzaliaVerbTable
[9].VerbTableData
= mAzaliaVerbTableData12
;
412 DxePlatformPchPolicy
->AzaliaConfig
->AzaliaVerbTableNum
= sizeof (mAzaliaVerbTable
) / sizeof (PCH_AZALIA_VERB_TABLE
);
413 DxePlatformPchPolicy
->AzaliaConfig
->AzaliaVerbTable
= mAzaliaVerbTable
;
414 DxePlatformPchPolicy
->AzaliaConfig
->ResetWaitTimer
= 300;
416 DxePlatformPchPolicy
->IdleReserve
= mSystemConfiguration
.IdleReserve
;
417 DxePlatformPchPolicy
->AcpiHWRed
= PCH_DEVICE_DISABLE
;
420 // Install DxePchPolicyUpdateProtocol
424 mDxePchPolicyUpdate
.Revision
= DXE_PCH_POLICY_UPDATE_PROTOCOL_REVISION_1
;
426 Status
= gBS
->InstallMultipleProtocolInterfaces (
428 &gDxePchPolicyUpdateProtocolGuid
,
429 &mDxePchPolicyUpdate
,
432 ASSERT_EFI_ERROR (Status
);
434 DEBUG ((EFI_D_INFO
, "InitPchPlatformPolicy() - End\n"));
438 DXE_VLV_PLATFORM_POLICY_PROTOCOL mDxePlatformVlvPolicy
;
441 InitVlvPlatformPolicy (
444 DXE_VLV_PLATFORM_POLICY_PROTOCOL
*DxePlatformVlvPolicy
;
448 ZeroMem (&mDxePlatformVlvPolicy
, sizeof(DXE_VLV_PLATFORM_POLICY_PROTOCOL
));
450 DxePlatformVlvPolicy
= &mDxePlatformVlvPolicy
;
453 DxePlatformVlvPolicy
->GraphicReserve00
= mSystemConfiguration
.GraphicReserve00
;
454 DxePlatformVlvPolicy
->PavpMode
= mSystemConfiguration
.PavpMode
;
455 DxePlatformVlvPolicy
->GraphicReserve01
= 1;
456 DxePlatformVlvPolicy
->GraphicReserve02
= mSystemConfiguration
.GraphicReserve02
;
457 DxePlatformVlvPolicy
->GraphicReserve03
= 1;
458 DxePlatformVlvPolicy
->GraphicReserve04
= 0;
459 DxePlatformVlvPolicy
->GraphicReserve05
= mSystemConfiguration
.GraphicReserve05
;
460 DxePlatformVlvPolicy
->IgdPanelFeatures
.PFITStatus
= mSystemConfiguration
.PanelScaling
;
462 DxePlatformVlvPolicy
->IgdPanelFeatures
.LidStatus
= 1;
463 DxePlatformVlvPolicy
->IdleReserve
= mSystemConfiguration
.IdleReserve
;
465 DxePlatformVlvPolicy
->GraphicReserve06
= 1;
467 if ( (mSystemConfiguration
.Lpe
== 1) || mSystemConfiguration
.Lpe
== 2) {
468 DxePlatformVlvPolicy
->AudioTypeSupport
= LPE_AUDIO
;
469 } else if ( mSystemConfiguration
.PchAzalia
== 1 ) {
470 DxePlatformVlvPolicy
->AudioTypeSupport
= HD_AUDIO
;
472 DxePlatformVlvPolicy
->AudioTypeSupport
= NO_AUDIO
;
476 Status
= gBS
->InstallProtocolInterface (
478 &gDxeVlvPlatformPolicyGuid
,
479 EFI_NATIVE_INTERFACE
,
482 ASSERT_EFI_ERROR(Status
);