3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
16 Register initialization table for Ich.
22 #include <Library/EfiRegTableLib.h>
23 #include "PlatformDxe.h"
24 extern EFI_PLATFORM_INFO_HOB mPlatformInfo
;
26 #define R_EFI_PCI_SVID 0x2C
28 EFI_REG_TABLE mSubsystemIdRegs
[] = {
31 // Program SVID and SID for PCI devices.
32 // Combine two 16 bit PCI_WRITE into one 32 bit PCI_WRITE in order to boost performance
35 MC_BUS
, MC_DEV
, MC_FUN
, R_EFI_PCI_SVID
, EfiPciWidthUint32
,
36 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
40 IGD_BUS
, IGD_DEV
, IGD_FUN_0
, R_EFI_PCI_SVID
, EfiPciWidthUint32
,
41 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
45 DEFAULT_PCI_BUS_NUMBER_PCH
, 0, 0, R_EFI_PCI_SVID
, EfiPciWidthUint32
,
46 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
49 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_LPC
, PCI_FUNCTION_NUMBER_PCH_LPC
, R_PCH_LPC_SS
, EfiPciWidthUint32
,
50 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
53 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_SATA
, PCI_FUNCTION_NUMBER_PCH_SATA
, R_PCH_SATA_SS
, EfiPciWidthUint32
,
54 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
57 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_SMBUS
, PCI_FUNCTION_NUMBER_PCH_SMBUS
, R_PCH_SMBUS_SVID
, EfiPciWidthUint32
,
58 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
61 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_USB
, PCI_FUNCTION_NUMBER_PCH_EHCI
, R_PCH_EHCI_SVID
, EfiPciWidthUint32
,
62 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
65 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS
, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_1
, R_PCH_PCIE_SVID
, EfiPciWidthUint32
,
66 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
69 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS
, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2
, R_PCH_PCIE_SVID
, EfiPciWidthUint32
,
70 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
73 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS
, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_3
, R_PCH_PCIE_SVID
, EfiPciWidthUint32
,
74 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
77 DEFAULT_PCI_BUS_NUMBER_PCH
, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS
, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_4
, R_PCH_PCIE_SVID
, EfiPciWidthUint32
,
78 V_PCH_DEFAULT_SVID_SID
, OPCODE_FLAG_S3SAVE
84 Updates the mSubsystemIdRegs table, and processes it. This should program
85 the Subsystem Vendor and Device IDs.
91 InitializeSubsystemIds (
95 EFI_REG_TABLE
*RegTablePtr
;
96 UINT32 SubsystemVidDid
;
98 SubsystemVidDid
= mPlatformInfo
.SsidSvid
;
100 RegTablePtr
= mSubsystemIdRegs
;
103 // While we are not at the end of the table
105 while (RegTablePtr
->Generic
.OpCode
!= OP_TERMINATE_TABLE
) {
107 // If the data to write is the original SSID
109 if (RegTablePtr
->PciWrite
.Data
==
110 ((V_PCH_DEFAULT_SID
<< 16) |
111 V_PCH_INTEL_VENDOR_ID
)
115 // Then overwrite it to use the alternate SSID
117 RegTablePtr
->PciWrite
.Data
= SubsystemVidDid
;
121 // Go to next table entry
126 RegTablePtr
= mSubsystemIdRegs
;
130 // Program the SSVID/SSDID
132 ProcessRegTablePci (mSubsystemIdRegs
, mPciRootBridgeIo
, NULL
);