3 Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials are licensed and made available under
8 the terms and conditions of the BSD License that accompanies this distribution.
10 The full text of the license may be found at
12 http://opensource.org/licenses/bsd-license.php.
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
30 Platform Initialization Driver.
35 #include "PlatformDxe.h"
37 #include "PchCommonDefinitions.h"
38 #include <Protocol/UsbPolicy.h>
39 #include <Protocol/PchPlatformPolicy.h>
40 #include <Protocol/TpmMp.h>
41 #include <Protocol/CpuIo2.h>
42 #include <Library/S3BootScriptLib.h>
43 #include <Guid/PciLanInfo.h>
44 #include <Guid/ItkData.h>
45 #include <Library/PciLib.h>
46 #include <PlatformBootMode.h>
47 #include <Guid/EventGroup.h>
48 #include <Guid/Vlv2Variable.h>
49 #include <Protocol/GlobalNvsArea.h>
50 #include <Protocol/IgdOpRegion.h>
51 #include <Library/PcdLib.h>
54 // VLV2 GPIO GROUP OFFSET
56 #define GPIO_SCORE_OFFSET 0x0000
57 #define GPIO_NCORE_OFFSET 0x1000
58 #define GPIO_SSUS_OFFSET 0x2000
65 GPIO_CONF_PAD_INIT mTB_BL_GpioInitData_SC_TRI_Exit_boot_Service
[] =
67 // Pad Name GPIO Number Used As GPO Default Function# INT Capable Interrupt Type PULL H/L MMIO Offset
68 GPIO_INIT_ITEM("LPC_CLKOUT0 GPIOC_47 " ,TRISTS
,NA
,F0
, , ,NONE
,0x47),
69 GPIO_INIT_ITEM("LPC_CLKOUT1 GPIOC_48 " ,TRISTS
,NA
,F0
, , ,NONE
,0x41),
73 EFI_GUID mSystemHiiExportDatabase
= EFI_HII_EXPORT_DATABASE_GUID
;
74 EFI_GUID mPlatformDriverGuid
= EFI_PLATFORM_DRIVER_GUID
;
75 SYSTEM_CONFIGURATION mSystemConfiguration
;
76 SYSTEM_PASSWORDS mSystemPassword
;
77 EFI_HANDLE mImageHandle
;
78 BOOLEAN mMfgMode
= FALSE
;
79 VOID
*mDxePlatformStringPack
;
80 UINT32 mPlatformBootMode
= PLATFORM_NORMAL_MODE
;
81 extern CHAR16 gItkDataVarName
[];
84 EFI_PLATFORM_INFO_HOB mPlatformInfo
;
85 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*mPciRootBridgeIo
;
86 EFI_EVENT mReadyToBootEvent
;
88 UINT8 mSmbusRsvdAddresses
[] = PLATFORM_SMBUS_RSVD_ADDRESSES
;
89 UINT8 mNumberSmbusAddress
= sizeof( mSmbusRsvdAddresses
) / sizeof( mSmbusRsvdAddresses
[0] );
90 UINT32 mSubsystemVidDid
;
91 UINT32 mSubsystemAudioVidDid
;
93 UINTN mPciLanCount
= 0;
94 VOID
*mPciLanInfo
= NULL
;
97 static EFI_SPEAKER_IF_PROTOCOL mSpeakerInterface
= {
102 EFI_USB_POLICY_PROTOCOL mUsbPolicyData
= {0};
105 CFIO_PNP_INIT mTB_BL_GpioInitData_SC_TRI_S0ix_Exit_boot_Service
[] =
107 {0x410 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pconf0
108 {0x470 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pconf0
109 {0x560 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pconf0
110 {0x450 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pconf0
111 {0x480 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pconf0
112 {0x420 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pconf0
113 {0x430 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pconf0
114 {0x440 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pconf0
115 {0x460 ,0x20038e10}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pconf0
116 {0x418 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout1_pad_val
117 {0x478 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkout0_pad_val
118 {0x568 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_ilb_serirq_pad_val
119 {0x458 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_frameb_pad_val
120 {0x488 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_clkrunb_pad_val
121 {0x428 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad3_pad_val
122 {0x438 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad2_pad_val
123 {0x448 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad1_pad_val
124 {0x468 ,0x00000006}, //vlv.gpio.gpscore.cfio_regs_pad_lpc_ad0_pad_val
129 IN VOID
*Destination
,
134 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
142 InitializeClockRouting(
149 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0
151 InitializeSensorInfoVariable (
166 InitPlatformBootMode();
169 InitMfgAndConfigModeStateVar();
172 InitPchPlatformPolicy (
173 IN EFI_PLATFORM_INFO_HOB
*PlatformInfo
177 InitVlvPlatformPolicy (
181 InitSioPlatformPolicy(
193 InitPlatformUsbPolicy (
204 TristateLpcGpioConfig (
205 IN UINT32 Gpio_Mmio_Offset
,
206 IN UINT32 Gpio_Pin_Num
,
207 GPIO_CONF_PAD_INIT
* Gpio_Conf_Data
218 // GPIO WELL -- Memory base registers
222 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.
223 // GPIO write 0x01001002 to IOBASE + Gpio_Mmio_Offset + 0x0900
226 for(index
=0; index
< Gpio_Pin_Num
; index
++)
229 // Calculate the MMIO Address for specific GPIO pin CONF0 register pointed by index.
231 mmio_conf0
= IO_BASE_ADDRESS
+ Gpio_Mmio_Offset
+ R_PCH_CFIO_PAD_CONF0
+ Gpio_Conf_Data
[index
].offset
* 16;
232 mmio_padval
= IO_BASE_ADDRESS
+ Gpio_Mmio_Offset
+ R_PCH_CFIO_PAD_VAL
+ Gpio_Conf_Data
[index
].offset
* 16;
235 DEBUG ((EFI_D_INFO
, "%s, ", Gpio_Conf_Data
[index
].pad_name
));
238 DEBUG ((EFI_D_INFO
, "Usage = %d, Func# = %d, IntType = %d, Pull Up/Down = %d, MMIO Base = 0x%08x, ",
239 Gpio_Conf_Data
[index
].usage
,
240 Gpio_Conf_Data
[index
].func
,
241 Gpio_Conf_Data
[index
].int_type
,
242 Gpio_Conf_Data
[index
].pull
,
246 // Step 1: PadVal Programming
248 pad_val
.dw
= MmioRead32(mmio_padval
);
251 // Config PAD_VAL only for GPIO (Non-Native) Pin
253 if(Native
!= Gpio_Conf_Data
[index
].usage
)
255 pad_val
.dw
&= ~0x6; // Clear bits 1:2
256 pad_val
.dw
|= (Gpio_Conf_Data
[index
].usage
& 0x6); // Set bits 1:2 according to PadVal
259 // set GPO default value
261 if(Gpio_Conf_Data
[index
].usage
== GPO
&& Gpio_Conf_Data
[index
].gpod4
!= NA
)
263 pad_val
.r
.pad_val
= Gpio_Conf_Data
[index
].gpod4
;
268 DEBUG ((EFI_D_INFO
, "Set PAD_VAL = 0x%08x, ", pad_val
.dw
));
270 MmioWrite32(mmio_padval
, pad_val
.dw
);
273 // Step 2: CONF0 Programming
274 // Read GPIO default CONF0 value, which is assumed to be default value after reset.
276 conf0_val
.dw
= MmioRead32(mmio_conf0
);
281 conf0_val
.r
.Func_Pin_Mux
= Gpio_Conf_Data
[index
].func
;
283 if(GPO
== Gpio_Conf_Data
[index
].usage
)
286 // If used as GPO, then internal pull need to be disabled
288 conf0_val
.r
.Pull_assign
= 0; // Non-pull
293 // Set PullUp / PullDown
295 if(P_20K_H
== Gpio_Conf_Data
[index
].pull
)
297 conf0_val
.r
.Pull_assign
= 0x1; // PullUp
298 conf0_val
.r
.Pull_strength
= 0x2;// 20K
300 else if(P_20K_L
== Gpio_Conf_Data
[index
].pull
)
302 conf0_val
.r
.Pull_assign
= 0x2; // PullDown
303 conf0_val
.r
.Pull_strength
= 0x2;// 20K
305 else if(P_NONE
== Gpio_Conf_Data
[index
].pull
)
307 conf0_val
.r
.Pull_assign
= 0; // Non-pull
311 ASSERT(FALSE
); // Invalid value
316 // Set INT Trigger Type
318 conf0_val
.dw
&= ~0x0f000000; // Clear bits 27:24
321 // Set INT Trigger Type
323 if(TRIG_
== Gpio_Conf_Data
[index
].int_type
)
326 // Interrupt not capable, clear bits 27:24
331 conf0_val
.dw
|= (Gpio_Conf_Data
[index
].int_type
& 0x0f)<<24;
334 DEBUG ((EFI_D_INFO
, "Set CONF0 = 0x%08x\n", conf0_val
.dw
));
337 // Write back the targeted GPIO config value according to platform (board) GPIO setting
339 MmioWrite32 (mmio_conf0
, conf0_val
.dw
);
342 // A0 BIOS Spec doesn't mention it although X0 does. comment out now.
343 // GPIO SCORE write 0x01001002 to IOBASE + 0x0900
349 SpiBiosProtectionFunction(
355 UINTN mPciD31F0RegBase
;
356 UINTN BiosFlaLower
= 0;
357 UINTN BiosFlaLimit
= 0x7fffff;
359 BiosFlaLower
= PcdGet32(PcdFlashMicroCodeAddress
)-PcdGet32(PcdFlashAreaBaseAddress
);
362 mPciD31F0RegBase
= MmPciAddress (0,
363 DEFAULT_PCI_BUS_NUMBER_PCH
,
364 PCI_DEVICE_NUMBER_PCH_LPC
,
365 PCI_FUNCTION_NUMBER_PCH_LPC
,
368 SpiBase
= MmioRead32(mPciD31F0RegBase
+ R_PCH_LPC_SPI_BASE
) & B_PCH_LPC_SPI_BASE_BAR
;
371 //Set SMM_BWP, WPD and LE bit
373 MmioOr32 ((UINTN
) (SpiBase
+ R_PCH_SPI_BCR
), (UINT8
) B_PCH_SPI_BCR_SMM_BWP
);
374 MmioAnd32 ((UINTN
) (SpiBase
+ R_PCH_SPI_BCR
), (UINT8
)(~B_PCH_SPI_BCR_BIOSWE
));
375 MmioOr32 ((UINTN
) (SpiBase
+ R_PCH_SPI_BCR
), (UINT8
) B_PCH_SPI_BCR_BLE
);
378 //First check if FLOCKDN or PR0FLOCKDN is set. No action if either of them set already.
380 if( (MmioRead16(SpiBase
+ R_PCH_SPI_HSFS
) & B_PCH_SPI_HSFS_FLOCKDN
) != 0 ||
381 (MmioRead32(SpiBase
+ R_PCH_SPI_IND_LOCK
)& B_PCH_SPI_IND_LOCK_PR0
) != 0) {
383 //Already locked. we could take no action here
385 DEBUG((EFI_D_INFO
, "PR0 already locked down. Stop configuring PR0.\n"));
392 MmioOr32((UINTN
)(SpiBase
+ R_PCH_SPI_PR0
),
393 B_PCH_SPI_PR0_RPE
|B_PCH_SPI_PR0_WPE
|\
394 (B_PCH_SPI_PR0_PRB_MASK
&(BiosFlaLower
>>12))|(B_PCH_SPI_PR0_PRL_MASK
&(BiosFlaLimit
>>12)<<16));
399 MmioOr16 ((UINTN
) (SpiBase
+ R_PCH_SPI_HSFS
), (UINT16
) (B_PCH_SPI_HSFS_FLOCKDN
));
402 // Verify if it's really locked.
404 if ((MmioRead16 (SpiBase
+ R_PCH_SPI_HSFS
) & B_PCH_SPI_HSFS_FLOCKDN
) == 0) {
405 DEBUG((EFI_D_ERROR
, "Failed to lock down PR0.\n"));
422 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
423 Status
= gRT
->GetVariable(
425 &gEfiNormalSetupGuid
,
428 &mSystemConfiguration
434 PchAzaliaPciCfg32Or (R_PCH_HDA_PCS
, B_PCH_HDA_PCS_PMEE
);
437 //Program SATA PME_EN
439 PchSataPciCfg32Or (R_PCH_SATA_PMCS
, B_PCH_SATA_PMCS_PMEE
);
441 DEBUG ((EFI_D_INFO
, "InitPciDevPME mSystemConfiguration.EhciPllCfgEnable = 0x%x \n",mSystemConfiguration
.EhciPllCfgEnable
));
442 if (mSystemConfiguration
.EhciPllCfgEnable
!= 1) {
444 //Program EHCI PME_EN
449 PCI_DEVICE_NUMBER_PCH_USB
,
450 PCI_FUNCTION_NUMBER_PCH_EHCI
,
451 R_PCH_EHCI_PWR_CNTL_STS
,
452 B_PCH_EHCI_PWR_CNTL_STS_PME_EN
459 EhciPciMmBase
= MmPciAddress (0,
461 PCI_DEVICE_NUMBER_PCH_USB
,
462 PCI_FUNCTION_NUMBER_PCH_EHCI
,
465 DEBUG ((EFI_D_INFO
, "ConfigureAdditionalPm() EhciPciMmBase = 0x%x \n",EhciPciMmBase
));
466 Buffer32
= MmioRead32(EhciPciMmBase
+ R_PCH_EHCI_PWR_CNTL_STS
);
467 DEBUG ((EFI_D_INFO
, "ConfigureAdditionalPm() R_PCH_EHCI_PWR_CNTL_STS = 0x%x \n",Buffer32
));
471 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY
478 TristateLpcGpioS0i3Config (
479 UINT32 Gpio_Mmio_Offset
,
481 CFIO_PNP_INIT
* Gpio_Conf_Data
489 DEBUG ((DEBUG_INFO
, "TristateLpcGpioS0i3Config\n"));
491 for(index
=0; index
< Gpio_Pin_Num
; index
++)
493 mmio_reg
= IO_BASE_ADDRESS
+ Gpio_Mmio_Offset
+ Gpio_Conf_Data
[index
].offset
;
495 MmioWrite32(mmio_reg
, Gpio_Conf_Data
[index
].val
);
497 mmio_val
= MmioRead32(mmio_reg
);
499 DEBUG ((EFI_D_INFO
, "Set MMIO=0x%08x PAD_VAL = 0x%08x,\n", mmio_reg
, mmio_val
));
506 EFI_BOOT_SCRIPT_SAVE_PROTOCOL
*mBootScriptSave
;
509 Event Notification during exit boot service to enabel ACPI mode
511 Disable SW SMI Timer, SMI from USB & Intel Specific USB 2
513 Clear all ACPI event status and disable all ACPI events
514 Disable PM sources except power button
517 Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")
519 Update EC to disable SMI and enable SCI
523 Enable PME_B0_EN in GPE0a_EN
525 @param Event - EFI Event Handle
526 @param Context - Pointer to Notify Context
543 AcpiBase
= MmioRead16 (
544 PchPciDeviceMmBase (DEFAULT_PCI_BUS_NUMBER_PCH
,
545 PCI_DEVICE_NUMBER_PCH_LPC
,
546 PCI_FUNCTION_NUMBER_PCH_LPC
) + R_PCH_LPC_ACPI_BASE
547 ) & B_PCH_LPC_ACPI_BASE_BAR
;
549 DEBUG ((EFI_D_INFO
, "EnableAcpiCallback: AcpiBase = %x\n", AcpiBase
));
552 // Disable SW SMI Timer, SMI from USB & Intel Specific USB 2
554 RegData32
= IoRead32(AcpiBase
+ R_PCH_SMI_EN
);
555 RegData32
&= ~(B_PCH_SMI_EN_SWSMI_TMR
| B_PCH_SMI_EN_LEGACY_USB2
| B_PCH_SMI_EN_INTEL_USB2
);
556 IoWrite32(AcpiBase
+ R_PCH_SMI_EN
, RegData32
);
558 RegData32
= IoRead32(AcpiBase
+ R_PCH_SMI_STS
);
559 RegData32
|= B_PCH_SMI_STS_SWSMI_TMR
;
560 IoWrite32(AcpiBase
+ R_PCH_SMI_STS
, RegData32
);
563 // Disable PM sources except power button
564 // power button is enabled only for PCAT. Disabled it on Tablet platform
567 IoWrite16(AcpiBase
+ R_PCH_ACPI_PM1_EN
, B_PCH_ACPI_PM1_EN_PWRBTN
);
568 IoWrite16(AcpiBase
+ R_PCH_ACPI_PM1_STS
, 0xffff);
571 // Guarantee day-of-month alarm is invalid (ACPI 5.0 Section 4.8.2.4 "Real Time Clock Alarm")
572 // Clear Status D reg VM bit, Date of month Alarm to make Data in CMOS RAM is no longer Valid
574 IoWrite8 (PCAT_RTC_ADDRESS_REGISTER
, RTC_ADDRESS_REGISTER_D
);
575 IoWrite8 (PCAT_RTC_DATA_REGISTER
, 0x0);
577 RegData32
= IoRead32(AcpiBase
+ R_PCH_ALT_GP_SMI_EN
);
578 RegData32
&= ~(BIT7
);
579 IoWrite32((AcpiBase
+ R_PCH_ALT_GP_SMI_EN
), RegData32
);
584 Pm1Cnt
= IoRead16(AcpiBase
+ R_PCH_ACPI_PM1_CNT
);
585 Pm1Cnt
|= B_PCH_ACPI_PM1_CNT_SCI_EN
;
586 IoWrite16(AcpiBase
+ R_PCH_ACPI_PM1_CNT
, Pm1Cnt
);
588 IoWrite8(0x80, 0xA0); //SW_SMI_ACPI_ENABLE
591 // Enable PME_B0_EN in GPE0a_EN
592 // Caution: Enable PME_B0_EN must be placed after enabling SCI.
593 // Otherwise, USB PME could not be handled as SMI event since no handler is there.
595 Gpe0aEn
= IoRead32 (AcpiBase
+ R_PCH_ACPI_GPE0a_EN
);
596 Gpe0aEn
|= B_PCH_ACPI_GPE0a_EN_PME_B0
;
597 IoWrite32(AcpiBase
+ R_PCH_ACPI_GPE0a_EN
, Gpe0aEn
);
605 This is the standard EFI driver point for the Driver. This
606 driver is responsible for setting up any platform specific policy or
607 initialization information.
609 @param ImageHandle Handle for the image of this driver.
610 @param SystemTable Pointer to the EFI System Table.
612 @retval EFI_SUCCESS Policy decisions set.
618 IN EFI_HANDLE ImageHandle
,
619 IN EFI_SYSTEM_TABLE
*SystemTable
624 EFI_HANDLE Handle
= NULL
;
625 EFI_EVENT mEfiExitBootServicesEvent
;
627 VOID
*RtcCallbackReg
= NULL
;
629 mImageHandle
= ImageHandle
;
631 Status
= gBS
->InstallProtocolInterface (
633 &gEfiSpeakerInterfaceProtocolGuid
,
634 EFI_NATIVE_INTERFACE
,
638 Status
= gBS
->LocateProtocol (
639 &gEfiPciRootBridgeIoProtocolGuid
,
641 (VOID
**) &mPciRootBridgeIo
643 ASSERT_EFI_ERROR (Status
);
645 VarSize
= sizeof(EFI_PLATFORM_INFO_HOB
);
646 Status
= gRT
->GetVariable(
648 &gEfiVlv2VariableGuid
,
655 // Initialize Product Board ID variable
657 InitMfgAndConfigModeStateVar();
658 InitPlatformBootMode();
661 // Install Observable protocol
663 InitializeObservableProtocol();
666 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
667 Status
= gRT
->GetVariable(
669 &gEfiNormalSetupGuid
,
672 &mSystemConfiguration
676 Status
= EfiCreateEventReadyToBootEx (
684 // Create a ReadyToBoot Event to run the PME init process
686 Status
= EfiCreateEventReadyToBootEx (
693 // Create a ReadyToBoot Event to run enable PR0 and lock down
695 if(mSystemConfiguration
.SpiRwProtect
==1) {
696 Status
= EfiCreateEventReadyToBootEx (
698 SpiBiosProtectionFunction
,
706 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP1
,
714 #if defined(SENSOR_INFO_VAR_SUPPORT) && SENSOR_INFO_VAR_SUPPORT != 0
716 // Initialize Sensor Info variable
718 InitializeSensorInfoVariable();
720 InitPchPlatformPolicy(&mPlatformInfo
);
721 InitVlvPlatformPolicy();
726 InitPlatformUsbPolicy();
727 InitSioPlatformPolicy();
728 InitializeClockRouting();
729 InitializeSlotInfo();
739 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP2
,
748 // Install PCI Bus Driver Hook
756 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP3
,
766 // Initialize Password States and Callbacks
770 #if defined SUPPORT_LVDS_DISPLAY && SUPPORT_LVDS_DISPLAY
774 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
776 // Re-write Firmware ID if it is changed
783 EFI_COMPUTING_UNIT_CHIPSET
| EFI_CU_PLATFORM_DXE_STEP4
,
792 Status
= gBS
->CreateEventEx (
797 &gEfiEventExitBootServicesGuid
,
798 &mEfiExitBootServicesEvent
802 // Adjust RTC deafult time to be BIOS-built time.
804 Status
= gBS
->CreateEvent (
807 AdjustDefaultRtcTimeCallback
,
811 if (!EFI_ERROR (Status
)) {
812 Status
= gBS
->RegisterProtocolNotify (
813 &gExitPmAuthProtocolGuid
,
824 Source Or Destination with Length bytes.
826 @param[in] Destination Target memory
827 @param[in] Source Source memory
828 @param[in] Length Number of bytes
835 IN VOID
*Destination
,
843 if (Source
< Destination
) {
844 Destination8
= (CHAR8
*) Destination
+ Length
- 1;
845 Source8
= (CHAR8
*) Source
+ Length
- 1;
847 *(Destination8
--) |= *(Source8
--);
850 Destination8
= (CHAR8
*) Destination
;
851 Source8
= (CHAR8
*) Source
;
853 *(Destination8
++) |= *(Source8
++);
862 // Saved SPI Opcode menu to fix EFI variable unable to write after S3 resume.
864 S3BootScriptSaveMemWrite (
865 EfiBootScriptWidthUint32
,
866 (UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU0
)),
868 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU0
)));
870 S3BootScriptSaveMemWrite (
871 EfiBootScriptWidthUint32
,
872 (UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU1
)),
874 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ (R_PCH_SPI_OPMENU1
)));
876 S3BootScriptSaveMemWrite (
877 EfiBootScriptWidthUint16
,
878 (UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_OPTYPE
),
880 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_OPTYPE
));
882 S3BootScriptSaveMemWrite (
883 EfiBootScriptWidthUint16
,
884 (UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_PREOP
),
886 (VOID
*)(UINTN
)(SPI_BASE_ADDRESS
+ R_PCH_SPI_PREOP
));
889 // Saved MTPMC_1 for S3 resume.
891 S3BootScriptSaveMemWrite (
892 EfiBootScriptWidthUint32
,
893 (UINTN
)(PMC_BASE_ADDRESS
+ R_PCH_PMC_MTPMC1
),
895 (VOID
*)(UINTN
)(PMC_BASE_ADDRESS
+ R_PCH_PMC_MTPMC1
));
901 ReadyToBootFunction (
907 EFI_ISA_ACPI_PROTOCOL
*IsaAcpi
;
908 EFI_ISA_ACPI_DEVICE_ID IsaDevice
;
911 EFI_TPM_MP_DRIVER_PROTOCOL
*TpmMpDriver
;
912 EFI_CPU_IO_PROTOCOL
*CpuIo
;
914 UINT8 ReceiveBuffer
[64];
915 UINT32 ReceiveBufferSize
;
917 UINT8 TpmForceClearCommand
[] = {0x00, 0xC1,
918 0x00, 0x00, 0x00, 0x0A,
919 0x00, 0x00, 0x00, 0x5D};
920 UINT8 TpmPhysicalPresenceCommand
[] = {0x00, 0xC1,
921 0x00, 0x00, 0x00, 0x0C,
922 0x40, 0x00, 0x00, 0x0A,
924 UINT8 TpmPhysicalDisableCommand
[] = {0x00, 0xC1,
925 0x00, 0x00, 0x00, 0x0A,
926 0x00, 0x00, 0x00, 0x70};
927 UINT8 TpmPhysicalEnableCommand
[] = {0x00, 0xC1,
928 0x00, 0x00, 0x00, 0x0A,
929 0x00, 0x00, 0x00, 0x6F};
930 UINT8 TpmPhysicalSetDeactivatedCommand
[] = {0x00, 0xC1,
931 0x00, 0x00, 0x00, 0x0B,
932 0x00, 0x00, 0x00, 0x72,
934 UINT8 TpmSetOwnerInstallCommand
[] = {0x00, 0xC1,
935 0x00, 0x00, 0x00, 0x0B,
936 0x00, 0x00, 0x00, 0x71,
939 Size
= sizeof(UINT16
);
940 Status
= gRT
->GetVariable (
941 VAR_EQ_FLOPPY_MODE_DECIMAL_NAME
,
942 &gEfiNormalSetupGuid
,
949 // Disable Floppy Controller if needed
951 Status
= gBS
->LocateProtocol (&gEfiIsaAcpiProtocolGuid
, NULL
, (VOID
**) &IsaAcpi
);
952 if (!EFI_ERROR(Status
) && (State
== 0x00)) {
953 IsaDevice
.HID
= EISA_PNP_ID(0x604);
955 Status
= IsaAcpi
->EnableDevice(IsaAcpi
, &IsaDevice
, FALSE
);
959 // save LAN info to a variable
961 if (NULL
!= mPciLanInfo
) {
965 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
| EFI_VARIABLE_RUNTIME_ACCESS
,
966 mPciLanCount
* sizeof(PCI_LAN_INFO
),
971 if (NULL
!= mPciLanInfo
) {
972 gBS
->FreePool (mPciLanInfo
);
978 // Handle ACPI OS TPM requests here
980 Status
= gBS
->LocateProtocol (
981 &gEfiCpuIoProtocolGuid
,
985 Status
= gBS
->LocateProtocol (
986 &gEfiTpmMpDriverProtocolGuid
,
988 (VOID
**)&TpmMpDriver
990 if (!EFI_ERROR (Status
))
992 Data
= ReadCmosBank1Byte (CpuIo
, ACPI_TPM_REQUEST
);
995 // Clear pending ACPI TPM request indicator
997 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_REQUEST
, 0x00);
1000 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_LAST_REQUEST
, Data
);
1003 // Assert Physical Presence for these commands
1005 TpmPhysicalPresenceCommand
[11] = 0x20;
1006 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1007 Status
= TpmMpDriver
->Transmit (
1008 TpmMpDriver
, TpmPhysicalPresenceCommand
,
1009 sizeof (TpmPhysicalPresenceCommand
),
1010 ReceiveBuffer
, &ReceiveBufferSize
1013 // PF PhysicalPresence = TRUE
1015 TpmPhysicalPresenceCommand
[11] = 0x08;
1016 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1017 Status
= TpmMpDriver
->Transmit (
1018 TpmMpDriver
, TpmPhysicalPresenceCommand
,
1019 sizeof (TpmPhysicalPresenceCommand
),
1026 // TPM_PhysicalEnable
1028 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1029 Status
= TpmMpDriver
->Transmit (
1030 TpmMpDriver
, TpmPhysicalEnableCommand
,
1031 sizeof (TpmPhysicalEnableCommand
),
1032 ReceiveBuffer
, &ReceiveBufferSize
1038 // TPM_PhysicalDisable
1040 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1041 Status
= TpmMpDriver
->Transmit (
1042 TpmMpDriver
, TpmPhysicalDisableCommand
,
1043 sizeof (TpmPhysicalDisableCommand
),
1051 // TPM_PhysicalSetDeactivated=FALSE
1053 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1054 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1055 Status
= TpmMpDriver
->Transmit (
1057 TpmPhysicalSetDeactivatedCommand
,
1058 sizeof (TpmPhysicalSetDeactivatedCommand
),
1059 ReceiveBuffer
, &ReceiveBufferSize
1061 gRT
->ResetSystem (EfiResetWarm
, EFI_SUCCESS
, 0, NULL
);
1066 // TPM_PhysicalSetDeactivated=TRUE
1068 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1069 TpmPhysicalSetDeactivatedCommand
[10] = 0x01;
1070 Status
= TpmMpDriver
->Transmit (
1072 TpmPhysicalSetDeactivatedCommand
,
1073 sizeof (TpmPhysicalSetDeactivatedCommand
),
1089 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1090 Status
= TpmMpDriver
->Transmit (
1092 TpmForceClearCommand
,
1093 sizeof (TpmForceClearCommand
),
1107 // TPM_PhysicalEnable
1109 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1110 Status
= TpmMpDriver
->Transmit (
1112 TpmPhysicalEnableCommand
,
1113 sizeof (TpmPhysicalEnableCommand
),
1118 // TPM_PhysicalSetDeactivated=FALSE
1120 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1121 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1122 Status
= TpmMpDriver
->Transmit (
1124 TpmPhysicalSetDeactivatedCommand
,
1125 sizeof (TpmPhysicalSetDeactivatedCommand
),
1139 // TPM_PhysicalSetDeactivated=TRUE
1141 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1142 TpmPhysicalSetDeactivatedCommand
[10] = 0x01;
1143 Status
= TpmMpDriver
->Transmit (
1145 TpmPhysicalSetDeactivatedCommand
,
1146 sizeof (TpmPhysicalSetDeactivatedCommand
),
1151 // TPM_PhysicalDisable
1153 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1154 Status
= TpmMpDriver
->Transmit (
1156 TpmPhysicalDisableCommand
,
1157 sizeof (TpmPhysicalDisableCommand
),
1171 // TPM_SetOwnerInstall=TRUE
1173 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1174 TpmSetOwnerInstallCommand
[10] = 0x01;
1175 Status
= TpmMpDriver
->Transmit (
1177 TpmSetOwnerInstallCommand
,
1178 sizeof (TpmSetOwnerInstallCommand
),
1186 // TPM_SetOwnerInstall=FALSE
1188 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1189 TpmSetOwnerInstallCommand
[10] = 0x00;
1190 Status
= TpmMpDriver
->Transmit (
1192 TpmSetOwnerInstallCommand
,
1193 sizeof (TpmSetOwnerInstallCommand
),
1201 // TPM_PhysicalEnable
1203 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1204 Status
= TpmMpDriver
->Transmit (
1206 TpmPhysicalEnableCommand
,
1207 sizeof (TpmPhysicalEnableCommand
),
1212 // TPM_PhysicalSetDeactivated=FALSE
1214 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1215 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1216 Status
= TpmMpDriver
->Transmit (
1218 TpmPhysicalSetDeactivatedCommand
,
1219 sizeof (TpmPhysicalSetDeactivatedCommand
),
1224 // Do TPM_SetOwnerInstall=TRUE on next reboot
1227 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_REQUEST
, 0xF0);
1239 // TPM_SetOwnerInstall=FALSE
1241 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1242 TpmSetOwnerInstallCommand
[10] = 0x00;
1243 Status
= TpmMpDriver
->Transmit (
1245 TpmSetOwnerInstallCommand
,
1246 sizeof (TpmSetOwnerInstallCommand
),
1251 // TPM_PhysicalSetDeactivated=TRUE
1253 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1254 TpmPhysicalSetDeactivatedCommand
[10] = 0x01;
1255 Status
= TpmMpDriver
->Transmit (
1257 TpmPhysicalSetDeactivatedCommand
,
1258 sizeof (TpmPhysicalSetDeactivatedCommand
),
1263 // TPM_PhysicalDisable
1265 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1266 Status
= TpmMpDriver
->Transmit (
1268 TpmPhysicalDisableCommand
,
1269 sizeof (TpmPhysicalDisableCommand
),
1285 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1286 Status
= TpmMpDriver
->Transmit (
1288 TpmForceClearCommand
,
1289 sizeof (TpmForceClearCommand
),
1294 // TPM_PhysicalEnable
1296 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1297 Status
= TpmMpDriver
->Transmit (
1299 TpmPhysicalEnableCommand
,
1300 sizeof (TpmPhysicalEnableCommand
),
1305 // TPM_PhysicalSetDeactivated=FALSE
1307 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1308 TpmPhysicalSetDeactivatedCommand
[10] = 0x00;
1309 Status
= TpmMpDriver
->Transmit (
1311 TpmPhysicalSetDeactivatedCommand
,
1312 sizeof (TpmPhysicalSetDeactivatedCommand
),
1326 // Second part of ACPI TPM request 0x0A: OEM custom TPM_SetOwnerInstall=TRUE
1328 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1329 TpmSetOwnerInstallCommand
[10] = 0x01;
1330 Status
= TpmMpDriver
->Transmit (
1332 TpmSetOwnerInstallCommand
,
1333 sizeof (TpmSetOwnerInstallCommand
),
1337 WriteCmosBank1Byte (CpuIo
, ACPI_TPM_LAST_REQUEST
, 0x0A);
1340 // Deassert Physical Presence
1342 TpmPhysicalPresenceCommand
[11] = 0x10;
1343 ReceiveBufferSize
= sizeof(ReceiveBuffer
);
1344 Status
= TpmMpDriver
->Transmit (
1346 TpmPhysicalPresenceCommand
,
1347 sizeof (TpmPhysicalPresenceCommand
),
1359 Initializes manufacturing and config mode setting.
1363 InitMfgAndConfigModeStateVar()
1365 EFI_PLATFORM_SETUP_ID
*BootModeBuffer
;
1370 // Variable initialization
1374 HobList
= GetFirstGuidHob(&gEfiPlatformBootModeGuid
);
1375 if (HobList
!= NULL
) {
1376 BootModeBuffer
= GET_GUID_HOB_DATA (HobList
);
1379 // Check if in Manufacturing mode
1382 &BootModeBuffer
->SetupName
,
1383 MANUFACTURE_SETUP_NAME
,
1384 StrSize (MANUFACTURE_SETUP_NAME
)
1390 // Check if in safe mode
1393 &BootModeBuffer
->SetupName
,
1395 StrSize (SAFE_SETUP_NAME
)
1405 Initializes manufacturing and config mode setting.
1409 InitPlatformBootMode()
1411 EFI_PLATFORM_SETUP_ID
*BootModeBuffer
;
1414 HobList
= GetFirstGuidHob(&gEfiPlatformBootModeGuid
);
1415 if (HobList
!= NULL
) {
1416 BootModeBuffer
= GET_GUID_HOB_DATA (HobList
);
1417 mPlatformBootMode
= BootModeBuffer
->PlatformBootMode
;
1431 UINT16 ItkModBiosState
;
1437 // Setup local variable according to ITK variable
1440 // Read ItkBiosModVar to determine if BIOS has been modified by ITK
1441 // If ItkBiosModVar = 0 or if variable hasn't been initialized then BIOS has not been modified by ITK modified
1442 // Set local variable VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME=0 if BIOS has not been modified by ITK
1444 DataSize
= sizeof (Value
);
1445 Status
= gRT
->GetVariable (
1446 ITK_BIOS_MOD_VAR_NAME
,
1452 if (Status
== EFI_NOT_FOUND
) {
1454 // Variable not found, hasn't been initialized, intialize to 0
1458 // Write variable to flash.
1461 ITK_BIOS_MOD_VAR_NAME
,
1463 EFI_VARIABLE_RUNTIME_ACCESS
|
1464 EFI_VARIABLE_NON_VOLATILE
|
1465 EFI_VARIABLE_BOOTSERVICE_ACCESS
,
1471 if ( (!EFI_ERROR (Status
)) || (Status
== EFI_NOT_FOUND
) ) {
1472 if (Value
== 0x00) {
1473 ItkModBiosState
= 0x00;
1475 ItkModBiosState
= 0x01;
1478 VAR_EQ_ITK_BIOS_MOD_DECIMAL_NAME
,
1479 &gEfiNormalSetupGuid
,
1480 EFI_VARIABLE_BOOTSERVICE_ACCESS
,
1482 (void *)&ItkModBiosState
1487 #if defined(FIRMWARE_ID_BACKWARD_COMPATIBLE) && (FIRMWARE_ID_BACKWARD_COMPATIBLE != 0)
1491 Initializes the BIOS FIRMWARE ID from the FIRMWARE_ID build variable.
1500 CHAR16 FirmwareIdNameWithPassword
[] = FIRMWARE_ID_NAME_WITH_PASSWORD
;
1503 // First try writing the variable without a password in case we are
1504 // upgrading from a BIOS without password protection on the FirmwareId
1506 Status
= gRT
->SetVariable(
1507 (CHAR16
*)&gFirmwareIdName
,
1509 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
|
1510 EFI_VARIABLE_RUNTIME_ACCESS
,
1511 sizeof( FIRMWARE_ID
) - 1,
1515 if (Status
== EFI_INVALID_PARAMETER
) {
1518 // Since setting the firmware id without the password failed,
1519 // a password must be required.
1521 Status
= gRT
->SetVariable(
1522 (CHAR16
*)&FirmwareIdNameWithPassword
,
1524 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
|
1525 EFI_VARIABLE_RUNTIME_ACCESS
,
1526 sizeof( FIRMWARE_ID
) - 1,
1538 // Workaround to support IIA bug.
1539 // IIA request to change option value to 4, 5 and 7 relatively
1540 // instead of 1, 2, and 3 which follow Lakeport Specs.
1541 // Check option value, temporary hardcode GraphicsDriverMemorySize
1542 // Option value to fulfill IIA requirment. So that user no need to
1543 // load default and update setupvariable after update BIOS.
1544 // Option value hardcoded as: 1 to 4, 2 to 5, 3 to 7.
1545 // *This is for broadwater and above product only.
1548 SYSTEM_CONFIGURATION SystemConfiguration
;
1552 VarSize
= sizeof(SYSTEM_CONFIGURATION
);
1553 Status
= gRT
->GetVariable(
1555 &gEfiNormalSetupGuid
,
1558 &SystemConfiguration
1561 if((SystemConfiguration
.GraphicsDriverMemorySize
< 4) && !EFI_ERROR(Status
) ) {
1562 switch (SystemConfiguration
.GraphicsDriverMemorySize
){
1564 SystemConfiguration
.GraphicsDriverMemorySize
= 4;
1567 SystemConfiguration
.GraphicsDriverMemorySize
= 5;
1570 SystemConfiguration
.GraphicsDriverMemorySize
= 7;
1576 Status
= gRT
->SetVariable (
1578 &gEfiNormalSetupGuid
,
1579 EFI_VARIABLE_NON_VOLATILE
| EFI_VARIABLE_BOOTSERVICE_ACCESS
,
1580 sizeof(SYSTEM_CONFIGURATION
),
1581 &SystemConfiguration
1587 InitPlatformUsbPolicy (
1597 mUsbPolicyData
.Version
= (UINT8
)USB_POLICY_PROTOCOL_REVISION_2
;
1598 mUsbPolicyData
.UsbMassStorageEmulationType
= mSystemConfiguration
.UsbBIOSINT13DeviceEmulation
;
1599 if(mUsbPolicyData
.UsbMassStorageEmulationType
== 3) {
1600 mUsbPolicyData
.UsbEmulationSize
= mSystemConfiguration
.UsbBIOSINT13DeviceEmulationSize
;
1602 mUsbPolicyData
.UsbEmulationSize
= 0;
1604 mUsbPolicyData
.UsbZipEmulationType
= mSystemConfiguration
.UsbZipEmulation
;
1605 mUsbPolicyData
.UsbOperationMode
= HIGH_SPEED
;
1608 // Some chipset need Period smi, 0 = LEGACY_PERIOD_UN_SUPP
1610 mUsbPolicyData
.USBPeriodSupport
= LEGACY_PERIOD_UN_SUPP
;
1613 // Some platform need legacyfree, 0 = LEGACY_FREE_UN_SUPP
1615 mUsbPolicyData
.LegacyFreeSupport
= LEGACY_FREE_UN_SUPP
;
1618 // Set Code base , TIANO_CODE_BASE =0x01, ICBD =0x00
1620 mUsbPolicyData
.CodeBase
= (UINT8
)ICBD_CODE_BASE
;
1623 // Some chispet 's LpcAcpibase are diffrent,set by platform or chipset,
1624 // default is Ich acpibase =0x040. acpitimerreg=0x08.
1625 mUsbPolicyData
.LpcAcpiBase
= 0x40;
1626 mUsbPolicyData
.AcpiTimerReg
= 0x08;
1629 // Set for reduce usb post time
1631 mUsbPolicyData
.UsbTimeTue
= 0x00;
1632 mUsbPolicyData
.InternelHubExist
= 0x00; //TigerPoint doesn't have RMH
1633 mUsbPolicyData
.EnumWaitPortStableStall
= 100;
1636 Status
= gBS
->InstallProtocolInterface (
1639 EFI_NATIVE_INTERFACE
,
1642 ASSERT_EFI_ERROR(Status
);
1648 IN EFI_CPU_IO_PROTOCOL
*CpuIo
,
1654 CpuIo
->Io
.Write (CpuIo
, EfiCpuIoWidthUint8
, 0x72, 1, &Index
);
1655 CpuIo
->Io
.Read (CpuIo
, EfiCpuIoWidthUint8
, 0x73, 1, &Data
);
1660 WriteCmosBank1Byte (
1661 IN EFI_CPU_IO_PROTOCOL
*CpuIo
,