3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are licensed and made available under
6 the terms and conditions of the BSD License that accompanies this distribution.
7 The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 Sets platform/SKU specific expansion slot information.
27 #include "PlatformDxe.h"
28 #include <Protocol/SmbiosSlotPopulation.h>
29 #include <IndustryStandard/Pci22.h>
33 // Default bus number for the bridge
35 #define DEF_BUS_CONFIG 0x0101
39 // Data structures for slot information
47 } EFI_PCI_SLOT_BRIDGE_INFO
;
50 // Product specific bridge to slot routing information
52 EFI_PCI_SLOT_BRIDGE_INFO mSlotBridgeTable
[] = {
54 0x01, //PCIe x1 ICH (Bridge B0:D28:F1)
55 DEFAULT_PCI_BUS_NUMBER_PCH
,
56 PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS
,
57 PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2
,
62 UINTN mSlotBridgeTableSize
=
63 sizeof(mSlotBridgeTable
) / sizeof(EFI_PCI_SLOT_BRIDGE_INFO
);
66 // Slot entry table for IBX RVP
68 EFI_SMBIOS_SLOT_ENTRY mSlotEntries
[] = {
69 {0x06, FALSE
, TRUE
}, // PCIe x16 Slot 1 (NOT USED)
70 {0x04, FALSE
, TRUE
}, // PCIe x16 Slot 2 (NOT USED)
71 {0x03, FALSE
, TRUE
}, // PCIe x4 Slot (NOT USED)
72 {0x02, FALSE
, FALSE
}, // Mini PCIe x1 Slot
73 {0x15, FALSE
, TRUE
}, // PCIe x1 Slot 2 (NOT USED)
74 {0x16, FALSE
, TRUE
}, // PCIe x1 Slot 3 (NOT USED)
75 {0x07, FALSE
, FALSE
}, // PCI Slot 1
76 {0x18, FALSE
, TRUE
}, // PCI Slot 2 (NOT USED)
77 {0x17, FALSE
, TRUE
}, // PCI Slot 3 (NOT USED)
80 EFI_SMBIOS_SLOT_POPULATION_INFO mSlotInformation
= {
81 sizeof(mSlotEntries
) / sizeof(EFI_SMBIOS_SLOT_ENTRY
),