3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
18 #include "PlatformEarlyInit.h"
20 #define LEN_64M 0x4000000
23 // Default PCI32 resource size
25 #define RES_MEM32_MIN_LEN 0x38000000
27 #define RES_IO_BASE 0x0D00
28 #define RES_IO_LIMIT 0xFFFF
30 #define MemoryCeilingVariable L"MemCeil."
34 IN CONST EFI_PEI_SERVICES
**PeiServices
,
35 IN SYSTEM_CONFIGURATION
*SystemConfiguration
39 EFI_PEI_READ_ONLY_VARIABLE2_PPI
*Variable
;
41 EFI_OS_SELECTION_HOB
*OsSelectionHob
;
43 UINT8
*LpssDataHobPtr
;
44 UINT8
*LpssDataVarPtr
;
47 Status
= (*PeiServices
)->LocatePpi (
49 &gEfiPeiReadOnlyVariable2PpiGuid
,
54 if (!EFI_ERROR(Status
)) {
55 VariableSize
= sizeof (OsSelection
);
56 Status
= Variable
->GetVariable (
59 &gOsSelectionVariableGuid
,
65 if (!EFI_ERROR(Status
) && (SystemConfiguration
->ReservedO
!= OsSelection
)) {
67 // Build HOB for OsSelection
69 OsSelectionHob
= BuildGuidHob (&gOsSelectionVariableGuid
, sizeof (EFI_OS_SELECTION_HOB
));
70 ASSERT (OsSelectionHob
!= NULL
);
72 OsSelectionHob
->OsSelectionChanged
= TRUE
;
73 OsSelectionHob
->OsSelection
= OsSelection
;
74 SystemConfiguration
->ReservedO
= OsSelectionHob
->OsSelection
;
77 // Load LPSS and SCC default configurations
79 OsSelectionHob
->LpssData
.LpsseMMCEnabled
= FALSE
;
80 OsSelectionHob
->LpssData
.LpssSdioEnabled
= TRUE
;
81 OsSelectionHob
->LpssData
.LpssSdcardEnabled
= TRUE
;
82 OsSelectionHob
->LpssData
.LpssSdCardSDR25Enabled
= FALSE
;
83 OsSelectionHob
->LpssData
.LpssSdCardDDR50Enabled
= TRUE
;
84 OsSelectionHob
->LpssData
.LpssMipiHsi
= FALSE
;
85 OsSelectionHob
->LpssData
.LpsseMMC45Enabled
= TRUE
;
86 OsSelectionHob
->LpssData
.LpsseMMC45DDR50Enabled
= TRUE
;
87 OsSelectionHob
->LpssData
.LpsseMMC45HS200Enabled
= FALSE
;
88 OsSelectionHob
->LpssData
.LpsseMMC45RetuneTimerValue
= 8;
89 OsSelectionHob
->LpssData
.eMMCBootMode
= 1; // Auto Detect
92 SystemConfiguration
->Lpe
= OsSelectionHob
->Lpe
;
93 SystemConfiguration
->PchAzalia
= SystemConfiguration
->PchAzalia
;
94 LpssDataHobPtr
= &OsSelectionHob
->LpssData
.LpssPciModeEnabled
;
95 LpssDataVarPtr
= &SystemConfiguration
->LpssPciModeEnabled
;
97 for (i
= 0; i
< sizeof(EFI_PLATFORM_LPSS_DATA
); i
++) {
98 *LpssDataVarPtr
= *LpssDataHobPtr
;
111 IN CONST EFI_PEI_SERVICES
**PeiServices
,
112 IN OUT EFI_PLATFORM_INFO_HOB
*PlatformInfoHob
,
113 IN SYSTEM_CONFIGURATION
*SystemConfiguration
117 EFI_PEI_READ_ONLY_VARIABLE2_PPI
*Variable
;
119 UINT32 MemoryCeiling
;
122 // Checking PCI32 resource from previous boot to determine the memory ceiling
124 Status
= (*PeiServices
)->LocatePpi (
126 &gEfiPeiReadOnlyVariable2PpiGuid
,
131 if (!EFI_ERROR(Status
)) {
133 // Get the memory ceiling
135 VariableSize
= sizeof(MemoryCeiling
);
136 Status
= Variable
->GetVariable (
138 MemoryCeilingVariable
,
139 &gEfiGlobalVariableGuid
,
144 if(!EFI_ERROR(Status
)) {
146 // Set the new PCI32 resource Base if the variable available
148 PlatformInfoHob
->PciData
.PciResourceMem32Base
= MemoryCeiling
;
149 PlatformInfoHob
->MemData
.MemMaxTolm
= MemoryCeiling
;
150 PlatformInfoHob
->MemData
.MemTolm
= MemoryCeiling
;
153 // Platform PCI MMIO Size in unit of 1MB
155 PlatformInfoHob
->MemData
.MmioSize
= 0x1000 - (UINT16
)(PlatformInfoHob
->MemData
.MemMaxTolm
>> 20);
163 Initialize the platform related info hob according to the
164 pre-determine value or setup option
166 @retval EFI_SUCCESS Memory initialization completed successfully.
167 @retval Others All other error conditions encountered result in an ASSERT.
171 IN CONST EFI_PEI_SERVICES
**PeiServices
,
172 IN EFI_PLATFORM_INFO_HOB
*PlatformInfoHob
,
173 IN SYSTEM_CONFIGURATION
*SystemConfiguration
177 // -- cchew10 need to update here.