2 # FDF file of Platform.
4 # Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFD00000
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00030000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0006E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00070000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
54 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00296000
55 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
57 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002C2000
58 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
60 ################################################################################
63 # The [FD] Section is made up of the definition statements and a
64 # description of what goes into the Flash Device Image. Each FD section
65 # defines one flash "device" image. A flash device image may be one of
66 # the following: Removable media bootable image (like a boot floppy
67 # image,) an Option ROM image (that would be "flashed" into an add-in
68 # card,) a System "Flash" image (that would be burned into a system's
69 # flash) or an Update ("Capsule") image that will be used to update and
70 # existing system flash.
72 ################################################################################
74 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
75 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
77 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
78 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
81 #Flash location override based on actual flash map
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
84 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
86 !if $(MINNOW2_FSP_BUILD) == TRUE
87 # put below PCD value setting into dsc file
88 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
89 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
91 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
94 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
97 ################################################################################
99 # Following are lists of FD Region layout which correspond to the locations of different
100 # images within the flash device.
102 # Regions must be defined in ascending order and may not overlap.
104 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
105 # the pipe "|" character, followed by the size of the region, also in hex with the leading
106 # "0x" characters. Like:
108 # PcdOffsetCName|PcdSizeCName
109 # RegionType <FV, DATA, or FILE>
110 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
112 ################################################################################
113 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
114 # so we hardcode the default value of variable here.
115 # Please note that we MUST update the binary once the default value is changed.
121 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
122 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
125 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
126 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
127 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
129 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
130 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
131 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
133 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
134 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
135 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
137 !if $(MINNOW2_FSP_BUILD) == TRUE
139 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
140 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
141 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
144 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
145 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
152 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
153 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
159 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
160 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
166 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
167 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
170 ################################################################################
174 # [FV] section is used to define what components or modules are placed within a flash
175 # device file. This section also defines order the components and modules are positioned
176 # within the image. The [FV] section consists of define statements, set statements and
179 ################################################################################
181 BlockSize = $(FLASH_BLOCK_SIZE)
188 WRITE_DISABLED_CAP = TRUE
189 WRITE_ENABLED_CAP = TRUE
191 WRITE_LOCK_CAP = TRUE
192 WRITE_LOCK_STATUS = TRUE
193 READ_DISABLED_CAP = TRUE
194 READ_ENABLED_CAP = TRUE
197 READ_LOCK_STATUS = TRUE
199 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
200 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
203 ################################################################################
207 # [FV] section is used to define what components or modules are placed within a flash
208 # device file. This section also defines order the components and modules are positioned
209 # within the image. The [FV] section consists of define statements, set statements and
212 ################################################################################
214 BlockSize = $(FLASH_BLOCK_SIZE)
215 FvAlignment = 16 #FV alignment and FV attributes setting.
221 WRITE_DISABLED_CAP = TRUE
222 WRITE_ENABLED_CAP = TRUE
224 WRITE_LOCK_CAP = TRUE
225 WRITE_LOCK_STATUS = TRUE
226 READ_DISABLED_CAP = TRUE
227 READ_ENABLED_CAP = TRUE
230 READ_LOCK_STATUS = TRUE
231 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
235 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
237 !if $(MINNOW2_FSP_BUILD) == FALSE
238 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
239 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
240 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
241 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
242 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
243 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
244 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
245 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
246 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
249 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
250 !if $(TPM_ENABLED) == TRUE
251 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
252 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
253 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
255 !if $(FTPM_ENABLE) == TRUE
256 INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
258 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
260 !if $(ACPI50_ENABLE) == TRUE
261 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
263 !if $(PERFORMANCE_ENABLE) == TRUE
264 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
268 BlockSize = $(FLASH_BLOCK_SIZE)
269 FvAlignment = 16 #FV alignment and FV attributes setting.
275 WRITE_DISABLED_CAP = TRUE
276 WRITE_ENABLED_CAP = TRUE
278 WRITE_LOCK_CAP = TRUE
279 WRITE_LOCK_STATUS = TRUE
280 READ_DISABLED_CAP = TRUE
281 READ_ENABLED_CAP = TRUE
284 READ_LOCK_STATUS = TRUE
285 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
288 !if $(MINNOW2_FSP_BUILD) == TRUE
289 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
291 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
294 INF MdeModulePkg/Core/Pei/PeiMain.inf
295 !if $(MINNOW2_FSP_BUILD) == TRUE
296 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
297 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
299 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
300 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
301 !if $(SECURE_BOOT_ENABLE) == TRUE
302 INF SecurityPkg/VariableAuthenticated/Pei/VariablePei.inf
304 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
307 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
309 !if $(MINNOW2_FSP_BUILD) == FALSE
310 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
313 !if $(FTPM_ENABLE) == TRUE
314 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
317 !if $(SOURCE_DEBUG_ENABLE) == TRUE
318 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
322 !if $(CAPSULE_ENABLE) == TRUE
323 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
324 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
327 !if $(MINNOW2_FSP_BUILD) == FALSE
328 !if $(PCIESC_ENABLE) == TRUE
329 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
331 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
334 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
337 BlockSize = $(FLASH_BLOCK_SIZE)
344 WRITE_DISABLED_CAP = TRUE
345 WRITE_ENABLED_CAP = TRUE
347 WRITE_LOCK_CAP = TRUE
348 WRITE_LOCK_STATUS = TRUE
349 READ_DISABLED_CAP = TRUE
350 READ_ENABLED_CAP = TRUE
353 READ_LOCK_STATUS = TRUE
354 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
357 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
358 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
359 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
362 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
363 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
367 # EDK II Related Platform codes
370 !if $(MINNOW2_FSP_BUILD) == TRUE
371 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
374 INF MdeModulePkg/Core/Dxe/DxeMain.inf
375 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
376 !if $(ACPI50_ENABLE) == TRUE
377 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
378 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
382 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
383 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
384 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
385 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
386 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
387 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
388 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
389 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
390 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
391 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
392 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
393 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
394 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
396 !if $(SECURE_BOOT_ENABLE)
397 INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmmRuntimeDxe.inf
398 INF SecurityPkg/VariableAuthenticated/RuntimeDxe/VariableSmm.inf
399 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
400 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
401 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
402 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
404 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
405 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
406 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
407 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
408 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
411 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
413 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
414 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
415 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
416 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
419 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
421 !if $(DATAHUB_ENABLE) == TRUE
422 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
424 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
425 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
427 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
430 # EDK II Related Silicon codes
432 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
434 !if $(USE_HPET_TIMER) == TRUE
435 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
437 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
439 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
441 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
443 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
444 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
446 !if $(MINNOW2_FSP_BUILD) == FALSE
447 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
449 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
450 !if $(PCIESC_ENABLE) == TRUE
451 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
454 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
455 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
456 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
457 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
458 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
459 !if $(MINNOW2_FSP_BUILD) == FALSE
460 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
462 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
463 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
465 !if $(MINNOW2_FSP_BUILD) == FALSE
466 !if $(SEC_ENABLE) == TRUE
467 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
468 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
471 !if $(TPM_ENABLED) == TRUE
472 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
473 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
474 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
476 !if $(FTPM_ENABLE) == TRUE
477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
479 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
480 INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
481 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
485 # EDK II Related Platform codes
487 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
488 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
489 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
490 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
491 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
492 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
493 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
494 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
495 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
496 !if $(GOP_DRIVER_ENABLE) == TRUE
497 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
498 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
499 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
500 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
501 SECTION UI = "IntelGopDriver"
505 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
509 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
510 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
511 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
513 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
514 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
515 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
516 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
517 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
518 # INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
519 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
523 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
524 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
525 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
526 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
528 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
530 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
535 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
537 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
543 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
544 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
545 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
546 !if $(SOURCE_DEBUG_ENABLE) != TRUE
547 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
549 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
550 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
555 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
556 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
560 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
562 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
564 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
565 !if $(SATA_ENABLE) == TRUE
566 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
570 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
571 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
572 !if $(SCSI_ENABLE) == TRUE
573 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
574 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
580 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
581 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
582 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
583 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
584 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
585 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
586 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
587 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
591 !if $(USB_ENABLE) == TRUE
592 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
593 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
594 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
595 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
596 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
597 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
598 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
604 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
605 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
606 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
607 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
608 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
609 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
613 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
614 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
616 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
621 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
626 FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
627 SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
632 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
633 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
634 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
639 !if $(GOP_DRIVER_ENABLE) == TRUE
640 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
641 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
642 SECTION UI = "IntelGopVbt"
649 !if $(NETWORK_ENABLE) == TRUE
650 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
651 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
654 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
655 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
656 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
657 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
658 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
659 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf
660 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
661 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
662 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
663 !if $(NETWORK_IP6_ENABLE) == TRUE
664 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
665 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
666 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
667 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
668 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
670 !if $(NETWORK_IP6_ENABLE) == TRUE
671 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
672 INF NetworkPkg/TcpDxe/TcpDxe.inf
674 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
675 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
677 !if $(NETWORK_VLAN_ENABLE) == TRUE
678 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
680 !if $(NETWORK_ISCSI_ENABLE) == TRUE
681 !if $(NETWORK_IP6_ENABLE) == TRUE
682 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
684 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
690 BlockSize = $(FLASH_BLOCK_SIZE)
697 WRITE_DISABLED_CAP = TRUE
698 WRITE_ENABLED_CAP = TRUE
700 WRITE_LOCK_CAP = TRUE
701 WRITE_LOCK_STATUS = TRUE
702 READ_DISABLED_CAP = TRUE
703 READ_ENABLED_CAP = TRUE
706 READ_LOCK_STATUS = TRUE
710 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
711 !if $(LZMA_ENABLE) == TRUE
713 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
714 SECTION FV_IMAGE = FVMAIN
717 !if $(DXE_COMPRESS_ENABLE) == TRUE
719 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
720 SECTION FV_IMAGE = FVMAIN
724 SECTION COMPRESS PI_NONE {
725 SECTION FV_IMAGE = FVMAIN
732 BlockSize = $(FLASH_BLOCK_SIZE)
740 WRITE_DISABLED_CAP = TRUE
741 WRITE_ENABLED_CAP = TRUE
743 WRITE_LOCK_CAP = TRUE
744 WRITE_LOCK_STATUS = TRUE
745 READ_DISABLED_CAP = TRUE
746 READ_ENABLED_CAP = TRUE
749 READ_LOCK_STATUS = TRUE
753 BlockSize = $(FLASH_BLOCK_SIZE)
760 WRITE_DISABLED_CAP = TRUE
761 WRITE_ENABLED_CAP = TRUE
763 WRITE_LOCK_CAP = TRUE
764 WRITE_LOCK_STATUS = TRUE
765 READ_DISABLED_CAP = TRUE
766 READ_ENABLED_CAP = TRUE
769 READ_LOCK_STATUS = TRUE
771 FILE RAW = 88888888-8888-8888-8888-888888888888 {
776 BlockSize = $(FLASH_BLOCK_SIZE)
783 WRITE_DISABLED_CAP = TRUE
784 WRITE_ENABLED_CAP = TRUE
786 WRITE_LOCK_CAP = TRUE
787 WRITE_LOCK_STATUS = TRUE
788 READ_DISABLED_CAP = TRUE
789 READ_ENABLED_CAP = TRUE
792 READ_LOCK_STATUS = TRUE
797 BlockSize = $(FLASH_BLOCK_SIZE)
804 WRITE_DISABLED_CAP = TRUE
805 WRITE_ENABLED_CAP = TRUE
807 WRITE_LOCK_CAP = TRUE
808 WRITE_LOCK_STATUS = TRUE
809 READ_DISABLED_CAP = TRUE
810 READ_ENABLED_CAP = TRUE
813 READ_LOCK_STATUS = TRUE
815 [Capsule.Capsule_Boot]
817 # gEfiCapsuleGuid supported by platform
818 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
820 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
821 CAPSULE_FLAGS = PersistAcrossReset
822 CAPSULE_HEADER_SIZE = 0x20
826 [Capsule.Capsule_Reset]
828 # gEfiCapsuleGuid supported by platform
829 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
831 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
832 CAPSULE_FLAGS = PersistAcrossReset
833 CAPSULE_HEADER_SIZE = 0x20
837 ################################################################################
839 # Rules are use with the [FV] section's module INF type to define
840 # how an FFS file is created for a given INF file. The following Rule are the default
841 # rules for the different module type. User can add the customized rules to define the
842 # content of the FFS file.
844 ################################################################################
846 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
847 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
848 RAW BIN Align = 16 |.com
851 [Rule.Common.SEC.BINARY]
852 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
853 PE32 PE32 Align = 8 |.efi
854 RAW BIN Align = 16 |.com
857 [Rule.Common.PEI_CORE]
858 FILE PEI_CORE = $(NAMED_GUID) {
859 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
860 UI STRING="$(MODULE_NAME)" Optional
861 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
865 FILE PEIM = $(NAMED_GUID) {
866 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
867 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
868 UI STRING="$(MODULE_NAME)" Optional
869 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
872 [Rule.Common.PEIM.BINARY]
873 FILE PEIM = $(NAMED_GUID) {
874 PEI_DEPEX PEI_DEPEX Optional |.depex
875 PE32 PE32 Align = Auto |.efi
876 UI STRING="$(MODULE_NAME)" Optional
877 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
880 [Rule.Common.PEIM.BIOSID]
881 FILE PEIM = $(NAMED_GUID) {
883 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
884 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
885 UI STRING="$(MODULE_NAME)" Optional
886 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
889 [Rule.Common.USER_DEFINED.APINIT]
890 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
894 [Rule.Common.USER_DEFINED.LEGACY16]
895 FILE FREEFORM = $(NAMED_GUID) {
896 UI STRING="$(MODULE_NAME)" Optional
901 [Rule.Common.USER_DEFINED.ASM16]
902 FILE FREEFORM = $(NAMED_GUID) {
903 UI STRING="$(MODULE_NAME)" Optional
907 [Rule.Common.DXE_CORE]
908 FILE DXE_CORE = $(NAMED_GUID) {
909 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
910 UI STRING="$(MODULE_NAME)" Optional
911 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
914 [Rule.Common.UEFI_DRIVER]
915 FILE DRIVER = $(NAMED_GUID) {
916 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
917 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
918 UI STRING="$(MODULE_NAME)" Optional
919 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
922 [Rule.Common.UEFI_DRIVER.BINARY]
923 FILE DRIVER = $(NAMED_GUID) {
924 DXE_DEPEX DXE_DEPEX Optional |.depex
926 UI STRING="$(MODULE_NAME)" Optional
927 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
930 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
931 FILE DRIVER = $(NAMED_GUID) {
932 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
934 UI STRING="$(MODULE_NAME)" Optional
935 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
938 [Rule.Common.DXE_DRIVER]
939 FILE DRIVER = $(NAMED_GUID) {
940 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
941 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
942 UI STRING="$(MODULE_NAME)" Optional
943 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
946 [Rule.Common.DXE_DRIVER.BINARY]
947 FILE DRIVER = $(NAMED_GUID) {
948 DXE_DEPEX DXE_DEPEX Optional |.depex
950 UI STRING="$(MODULE_NAME)" Optional
951 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
954 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
955 FILE DRIVER = $(NAMED_GUID) {
956 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
957 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
958 UI STRING="$(MODULE_NAME)" Optional
959 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
960 RAW ACPI Optional |.acpi
961 RAW ASL Optional |.aml
964 [Rule.Common.DXE_RUNTIME_DRIVER]
965 FILE DRIVER = $(NAMED_GUID) {
966 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
967 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
968 UI STRING="$(MODULE_NAME)" Optional
969 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
972 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
973 FILE DRIVER = $(NAMED_GUID) {
974 DXE_DEPEX DXE_DEPEX Optional |.depex
976 UI STRING="$(MODULE_NAME)" Optional
977 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
980 [Rule.Common.DXE_SMM_DRIVER]
981 FILE SMM = $(NAMED_GUID) {
982 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
983 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
984 UI STRING="$(MODULE_NAME)" Optional
985 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
988 [Rule.Common.DXE_SMM_DRIVER.BINARY]
989 FILE SMM = $(NAMED_GUID) {
990 SMM_DEPEX SMM_DEPEX |.depex
992 RAW BIN Optional |.aml
993 UI STRING="$(MODULE_NAME)" Optional
994 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
997 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
998 FILE SMM = $(NAMED_GUID) {
999 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1000 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1001 UI STRING="$(MODULE_NAME)" Optional
1002 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1003 RAW ACPI Optional |.acpi
1004 RAW ASL Optional |.aml
1007 [Rule.Common.SMM_CORE]
1008 FILE SMM_CORE = $(NAMED_GUID) {
1009 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1010 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1011 UI STRING="$(MODULE_NAME)" Optional
1012 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1015 [Rule.Common.SMM_CORE.BINARY]
1016 FILE SMM_CORE = $(NAMED_GUID) {
1017 DXE_DEPEX DXE_DEPEX Optional |.depex
1019 UI STRING="$(MODULE_NAME)" Optional
1020 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1023 [Rule.Common.UEFI_APPLICATION]
1024 FILE APPLICATION = $(NAMED_GUID) {
1025 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1026 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1027 UI STRING="$(MODULE_NAME)" Optional
1028 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1031 [Rule.Common.UEFI_APPLICATION.UI]
1032 FILE APPLICATION = $(NAMED_GUID) {
1033 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1034 UI STRING="Enter Setup"
1035 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1038 [Rule.Common.USER_DEFINED]
1039 FILE FREEFORM = $(NAMED_GUID) {
1040 UI STRING="$(MODULE_NAME)" Optional
1044 [Rule.Common.USER_DEFINED.ACPITABLE]
1045 FILE FREEFORM = $(NAMED_GUID) {
1046 RAW ACPI Optional |.acpi
1047 RAW ASL Optional |.aml
1050 [Rule.Common.USER_DEFINED.ACPITABLE2]
1051 FILE FREEFORM = $(NAMED_GUID) {
1052 RAW ASL Optional |.aml
1055 [Rule.Common.ACPITABLE]
1056 FILE FREEFORM = $(NAMED_GUID) {
1057 RAW ACPI Optional |.acpi
1058 RAW ASL Optional |.aml