2 # FDF file of Platform.
4 # Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 DEFINE FLASH_BASE = 0xFFD00000 #The base address of the 3Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00300000 #The flash size in bytes of the 3Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 3Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x300 #The number of blocks in 3Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00030000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFD00000
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00030000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0006E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00070000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000B0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFDB0000
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x000F8000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFDF8000
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00100000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00196000
54 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00296000
55 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0002C000
57 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x002C2000
58 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x0003E000
60 ################################################################################
63 # The [FD] Section is made up of the definition statements and a
64 # description of what goes into the Flash Device Image. Each FD section
65 # defines one flash "device" image. A flash device image may be one of
66 # the following: Removable media bootable image (like a boot floppy
67 # image,) an Option ROM image (that would be "flashed" into an add-in
68 # card,) a System "Flash" image (that would be burned into a system's
69 # flash) or an Update ("Capsule") image that will be used to update and
70 # existing system flash.
72 ################################################################################
74 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
75 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
77 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
78 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
81 #Flash location override based on actual flash map
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
84 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
86 !if $(MINNOW2_FSP_BUILD) == TRUE
87 # put below PCD value setting into dsc file
88 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
89 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
91 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
94 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
97 ################################################################################
99 # Following are lists of FD Region layout which correspond to the locations of different
100 # images within the flash device.
102 # Regions must be defined in ascending order and may not overlap.
104 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
105 # the pipe "|" character, followed by the size of the region, also in hex with the leading
106 # "0x" characters. Like:
108 # PcdOffsetCName|PcdSizeCName
109 # RegionType <FV, DATA, or FILE>
110 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
112 ################################################################################
113 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
114 # so we hardcode the default value of variable here.
115 # Please note that we MUST update the binary once the default value is changed.
121 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
122 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
125 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
126 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
127 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
129 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
130 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
131 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
133 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
134 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
135 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
137 !if $(MINNOW2_FSP_BUILD) == TRUE
139 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
140 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
141 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
144 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
145 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
152 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
153 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
159 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
160 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
166 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
167 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
170 ################################################################################
174 # [FV] section is used to define what components or modules are placed within a flash
175 # device file. This section also defines order the components and modules are positioned
176 # within the image. The [FV] section consists of define statements, set statements and
179 ################################################################################
181 BlockSize = $(FLASH_BLOCK_SIZE)
188 WRITE_DISABLED_CAP = TRUE
189 WRITE_ENABLED_CAP = TRUE
191 WRITE_LOCK_CAP = TRUE
192 WRITE_LOCK_STATUS = TRUE
193 READ_DISABLED_CAP = TRUE
194 READ_ENABLED_CAP = TRUE
197 READ_LOCK_STATUS = TRUE
199 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
200 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
203 ################################################################################
207 # [FV] section is used to define what components or modules are placed within a flash
208 # device file. This section also defines order the components and modules are positioned
209 # within the image. The [FV] section consists of define statements, set statements and
212 ################################################################################
214 BlockSize = $(FLASH_BLOCK_SIZE)
215 FvAlignment = 16 #FV alignment and FV attributes setting.
221 WRITE_DISABLED_CAP = TRUE
222 WRITE_ENABLED_CAP = TRUE
224 WRITE_LOCK_CAP = TRUE
225 WRITE_LOCK_STATUS = TRUE
226 READ_DISABLED_CAP = TRUE
227 READ_ENABLED_CAP = TRUE
230 READ_LOCK_STATUS = TRUE
231 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
235 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
237 !if $(MINNOW2_FSP_BUILD) == FALSE
238 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
239 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
240 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
241 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
242 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
243 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
244 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
245 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
246 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
249 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
250 !if $(TPM_ENABLED) == TRUE
251 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
252 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
253 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
255 !if $(FTPM_ENABLE) == TRUE
256 INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
258 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
260 !if $(ACPI50_ENABLE) == TRUE
261 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
263 !if $(PERFORMANCE_ENABLE) == TRUE
264 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
268 BlockSize = $(FLASH_BLOCK_SIZE)
269 FvAlignment = 16 #FV alignment and FV attributes setting.
275 WRITE_DISABLED_CAP = TRUE
276 WRITE_ENABLED_CAP = TRUE
278 WRITE_LOCK_CAP = TRUE
279 WRITE_LOCK_STATUS = TRUE
280 READ_DISABLED_CAP = TRUE
281 READ_ENABLED_CAP = TRUE
284 READ_LOCK_STATUS = TRUE
285 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
288 !if $(MINNOW2_FSP_BUILD) == TRUE
289 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
291 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
294 INF MdeModulePkg/Core/Pei/PeiMain.inf
295 !if $(MINNOW2_FSP_BUILD) == TRUE
296 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
297 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
299 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
300 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
301 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
303 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
305 !if $(MINNOW2_FSP_BUILD) == FALSE
306 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
309 !if $(FTPM_ENABLE) == TRUE
310 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
313 !if $(SOURCE_DEBUG_ENABLE) == TRUE
314 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
318 !if $(CAPSULE_ENABLE) == TRUE
319 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
320 !if $(DXE_ARCHITECTURE) == "X64"
321 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
325 !if $(MINNOW2_FSP_BUILD) == FALSE
326 !if $(PCIESC_ENABLE) == TRUE
327 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
329 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
332 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
335 BlockSize = $(FLASH_BLOCK_SIZE)
342 WRITE_DISABLED_CAP = TRUE
343 WRITE_ENABLED_CAP = TRUE
345 WRITE_LOCK_CAP = TRUE
346 WRITE_LOCK_STATUS = TRUE
347 READ_DISABLED_CAP = TRUE
348 READ_ENABLED_CAP = TRUE
351 READ_LOCK_STATUS = TRUE
352 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
355 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
356 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
357 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
360 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
361 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
365 # EDK II Related Platform codes
368 !if $(MINNOW2_FSP_BUILD) == TRUE
369 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
372 INF MdeModulePkg/Core/Dxe/DxeMain.inf
373 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
374 !if $(ACPI50_ENABLE) == TRUE
375 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
376 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
380 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
381 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
382 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
383 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
384 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
385 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
386 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
387 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
388 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
389 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
390 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
391 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
392 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
394 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
395 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
396 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
397 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
398 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
399 !if $(SECURE_BOOT_ENABLE)
400 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
403 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
405 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
406 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
407 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
408 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
411 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
413 !if $(DATAHUB_ENABLE) == TRUE
414 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
416 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
417 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
419 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
422 # EDK II Related Silicon codes
424 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
426 !if $(USE_HPET_TIMER) == TRUE
427 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
429 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
431 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
433 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
435 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
436 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
438 !if $(MINNOW2_FSP_BUILD) == FALSE
439 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
441 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
442 !if $(PCIESC_ENABLE) == TRUE
443 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
446 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
447 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
448 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
449 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
450 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
451 !if $(MINNOW2_FSP_BUILD) == FALSE
452 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
454 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
455 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
457 !if $(MINNOW2_FSP_BUILD) == FALSE
458 !if $(SEC_ENABLE) == TRUE
459 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
460 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
463 !if $(TPM_ENABLED) == TRUE
464 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
465 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
466 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
468 !if $(FTPM_ENABLE) == TRUE
469 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
470 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
471 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
472 INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
473 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
477 # EDK II Related Platform codes
479 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
480 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
481 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
482 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
483 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
484 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
486 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
487 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
488 !if $(GOP_DRIVER_ENABLE) == TRUE
489 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
490 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
491 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
492 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
493 SECTION UI = "IntelGopDriver"
497 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
501 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
502 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
503 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCpuDxeSmm.inf
505 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
506 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
507 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PiSmmCommunicationSmm.inf
508 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
509 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
510 # INF Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Dts/Smm/DigitalThermalSensor.inf
511 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
515 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
516 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
517 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
518 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
520 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
522 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
527 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
529 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
535 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
536 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
537 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
538 !if $(SOURCE_DEBUG_ENABLE) != TRUE
539 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
541 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
542 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
547 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
548 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
552 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
554 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
556 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
557 !if $(SATA_ENABLE) == TRUE
558 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
562 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
563 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
564 !if $(SCSI_ENABLE) == TRUE
565 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
566 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
572 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
573 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
574 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
575 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
576 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
577 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
578 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
579 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
583 !if $(USB_ENABLE) == TRUE
584 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
585 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
586 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
587 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
588 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
589 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
590 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
596 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
597 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
598 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
599 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
600 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
601 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
605 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
606 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
608 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
613 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
618 FILE DRIVER = 961578FE-B6B7-44c3-AF35-6BC705CD2B1F {
619 SECTION PE32 = FatBinPkg/EnhancedFatDxe/$(EDK_DXE_ARCHITECTURE)/Fat.efi
624 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
625 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
626 SECTION PE32 = EdkShellBinPkg/MinimumShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
631 !if $(GOP_DRIVER_ENABLE) == TRUE
632 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
633 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
634 SECTION UI = "IntelGopVbt"
641 !if $(NETWORK_ENABLE) == TRUE
642 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
643 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
646 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
647 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
648 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
649 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
650 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
651 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
652 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
653 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
654 !if $(NETWORK_IP6_ENABLE) == TRUE
655 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
656 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
657 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
658 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
659 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
661 !if $(NETWORK_IP6_ENABLE) == TRUE
662 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
663 INF NetworkPkg/TcpDxe/TcpDxe.inf
665 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
666 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
668 !if $(NETWORK_VLAN_ENABLE) == TRUE
669 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
671 !if $(NETWORK_ISCSI_ENABLE) == TRUE
672 !if $(NETWORK_IP6_ENABLE) == TRUE
673 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
675 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
681 BlockSize = $(FLASH_BLOCK_SIZE)
688 WRITE_DISABLED_CAP = TRUE
689 WRITE_ENABLED_CAP = TRUE
691 WRITE_LOCK_CAP = TRUE
692 WRITE_LOCK_STATUS = TRUE
693 READ_DISABLED_CAP = TRUE
694 READ_ENABLED_CAP = TRUE
697 READ_LOCK_STATUS = TRUE
701 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
702 !if $(LZMA_ENABLE) == TRUE
704 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
705 SECTION FV_IMAGE = FVMAIN
708 !if $(DXE_COMPRESS_ENABLE) == TRUE
710 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
711 SECTION FV_IMAGE = FVMAIN
715 SECTION COMPRESS PI_NONE {
716 SECTION FV_IMAGE = FVMAIN
723 BlockSize = $(FLASH_BLOCK_SIZE)
731 WRITE_DISABLED_CAP = TRUE
732 WRITE_ENABLED_CAP = TRUE
734 WRITE_LOCK_CAP = TRUE
735 WRITE_LOCK_STATUS = TRUE
736 READ_DISABLED_CAP = TRUE
737 READ_ENABLED_CAP = TRUE
740 READ_LOCK_STATUS = TRUE
744 BlockSize = $(FLASH_BLOCK_SIZE)
751 WRITE_DISABLED_CAP = TRUE
752 WRITE_ENABLED_CAP = TRUE
754 WRITE_LOCK_CAP = TRUE
755 WRITE_LOCK_STATUS = TRUE
756 READ_DISABLED_CAP = TRUE
757 READ_ENABLED_CAP = TRUE
760 READ_LOCK_STATUS = TRUE
762 FILE RAW = 88888888-8888-8888-8888-888888888888 {
767 BlockSize = $(FLASH_BLOCK_SIZE)
774 WRITE_DISABLED_CAP = TRUE
775 WRITE_ENABLED_CAP = TRUE
777 WRITE_LOCK_CAP = TRUE
778 WRITE_LOCK_STATUS = TRUE
779 READ_DISABLED_CAP = TRUE
780 READ_ENABLED_CAP = TRUE
783 READ_LOCK_STATUS = TRUE
788 BlockSize = $(FLASH_BLOCK_SIZE)
795 WRITE_DISABLED_CAP = TRUE
796 WRITE_ENABLED_CAP = TRUE
798 WRITE_LOCK_CAP = TRUE
799 WRITE_LOCK_STATUS = TRUE
800 READ_DISABLED_CAP = TRUE
801 READ_ENABLED_CAP = TRUE
804 READ_LOCK_STATUS = TRUE
806 [Capsule.Capsule_Boot]
808 # gEfiCapsuleGuid supported by platform
809 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
811 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
812 CAPSULE_FLAGS = PersistAcrossReset
813 CAPSULE_HEADER_SIZE = 0x20
817 [Capsule.Capsule_Reset]
819 # gEfiCapsuleGuid supported by platform
820 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
822 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
823 CAPSULE_FLAGS = PersistAcrossReset
824 CAPSULE_HEADER_SIZE = 0x20
828 ################################################################################
830 # Rules are use with the [FV] section's module INF type to define
831 # how an FFS file is created for a given INF file. The following Rule are the default
832 # rules for the different module type. User can add the customized rules to define the
833 # content of the FFS file.
835 ################################################################################
837 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
838 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
839 RAW BIN Align = 16 |.com
842 [Rule.Common.SEC.BINARY]
843 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
844 PE32 PE32 Align = 8 |.efi
845 RAW BIN Align = 16 |.com
848 [Rule.Common.PEI_CORE]
849 FILE PEI_CORE = $(NAMED_GUID) {
850 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
851 UI STRING="$(MODULE_NAME)" Optional
852 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
856 FILE PEIM = $(NAMED_GUID) {
857 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
858 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
859 UI STRING="$(MODULE_NAME)" Optional
860 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
863 [Rule.Common.PEIM.BINARY]
864 FILE PEIM = $(NAMED_GUID) {
865 PEI_DEPEX PEI_DEPEX Optional |.depex
866 PE32 PE32 Align = Auto |.efi
867 UI STRING="$(MODULE_NAME)" Optional
868 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
871 [Rule.Common.PEIM.BIOSID]
872 FILE PEIM = $(NAMED_GUID) {
874 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
875 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
876 UI STRING="$(MODULE_NAME)" Optional
877 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
880 [Rule.Common.USER_DEFINED.APINIT]
881 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
885 [Rule.Common.USER_DEFINED.LEGACY16]
886 FILE FREEFORM = $(NAMED_GUID) {
887 UI STRING="$(MODULE_NAME)" Optional
892 [Rule.Common.USER_DEFINED.ASM16]
893 FILE FREEFORM = $(NAMED_GUID) {
894 UI STRING="$(MODULE_NAME)" Optional
898 [Rule.Common.DXE_CORE]
899 FILE DXE_CORE = $(NAMED_GUID) {
900 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
901 UI STRING="$(MODULE_NAME)" Optional
902 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
905 [Rule.Common.UEFI_DRIVER]
906 FILE DRIVER = $(NAMED_GUID) {
907 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
908 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
909 UI STRING="$(MODULE_NAME)" Optional
910 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
913 [Rule.Common.UEFI_DRIVER.BINARY]
914 FILE DRIVER = $(NAMED_GUID) {
915 DXE_DEPEX DXE_DEPEX Optional |.depex
917 UI STRING="$(MODULE_NAME)" Optional
918 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
921 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
922 FILE DRIVER = $(NAMED_GUID) {
923 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
925 UI STRING="$(MODULE_NAME)" Optional
926 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
929 [Rule.Common.DXE_DRIVER]
930 FILE DRIVER = $(NAMED_GUID) {
931 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
932 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
933 UI STRING="$(MODULE_NAME)" Optional
934 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
937 [Rule.Common.DXE_DRIVER.BINARY]
938 FILE DRIVER = $(NAMED_GUID) {
939 DXE_DEPEX DXE_DEPEX Optional |.depex
941 UI STRING="$(MODULE_NAME)" Optional
942 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
945 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
946 FILE DRIVER = $(NAMED_GUID) {
947 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
948 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
949 UI STRING="$(MODULE_NAME)" Optional
950 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
951 RAW ACPI Optional |.acpi
952 RAW ASL Optional |.aml
955 [Rule.Common.DXE_RUNTIME_DRIVER]
956 FILE DRIVER = $(NAMED_GUID) {
957 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
958 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
959 UI STRING="$(MODULE_NAME)" Optional
960 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
963 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
964 FILE DRIVER = $(NAMED_GUID) {
965 DXE_DEPEX DXE_DEPEX Optional |.depex
967 UI STRING="$(MODULE_NAME)" Optional
968 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
971 [Rule.Common.DXE_SMM_DRIVER]
972 FILE SMM = $(NAMED_GUID) {
973 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
974 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
975 UI STRING="$(MODULE_NAME)" Optional
976 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
979 [Rule.Common.DXE_SMM_DRIVER.BINARY]
980 FILE SMM = $(NAMED_GUID) {
981 SMM_DEPEX SMM_DEPEX |.depex
983 RAW BIN Optional |.aml
984 UI STRING="$(MODULE_NAME)" Optional
985 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
988 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
989 FILE SMM = $(NAMED_GUID) {
990 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
991 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
992 UI STRING="$(MODULE_NAME)" Optional
993 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
994 RAW ACPI Optional |.acpi
995 RAW ASL Optional |.aml
998 [Rule.Common.SMM_CORE]
999 FILE SMM_CORE = $(NAMED_GUID) {
1000 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1001 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1002 UI STRING="$(MODULE_NAME)" Optional
1003 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1006 [Rule.Common.SMM_CORE.BINARY]
1007 FILE SMM_CORE = $(NAMED_GUID) {
1008 DXE_DEPEX DXE_DEPEX Optional |.depex
1010 UI STRING="$(MODULE_NAME)" Optional
1011 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1014 [Rule.Common.UEFI_APPLICATION]
1015 FILE APPLICATION = $(NAMED_GUID) {
1016 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1017 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1018 UI STRING="$(MODULE_NAME)" Optional
1019 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1022 [Rule.Common.UEFI_APPLICATION.UI]
1023 FILE APPLICATION = $(NAMED_GUID) {
1024 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1025 UI STRING="Enter Setup"
1026 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1029 [Rule.Common.USER_DEFINED]
1030 FILE FREEFORM = $(NAMED_GUID) {
1031 UI STRING="$(MODULE_NAME)" Optional
1035 [Rule.Common.USER_DEFINED.ACPITABLE]
1036 FILE FREEFORM = $(NAMED_GUID) {
1037 RAW ACPI Optional |.acpi
1038 RAW ASL Optional |.aml
1041 [Rule.Common.USER_DEFINED.ACPITABLE2]
1042 FILE FREEFORM = $(NAMED_GUID) {
1043 RAW ASL Optional |.aml
1046 [Rule.Common.ACPITABLE]
1047 FILE FREEFORM = $(NAMED_GUID) {
1048 RAW ACPI Optional |.acpi
1049 RAW ASL Optional |.aml