3 Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>
5 SPDX-License-Identifier: BSD-2-Clause-Patent
12 MiscProcessorCacheFunction.c
16 BIOS processor cache details.
17 Misc. subclass type 7.
21 #include "CommonHeader.h"
22 #include "MiscSubclassDriver.h"
23 #include <Protocol/DataHub.h>
24 #include <Guid/DataHubRecords.h>
28 IN EFI_EXP_BASE2_DATA
*Data
)
33 RawData
= Data
->Value
;
34 for (Index
= 0; Index
< (UINTN
) Data
->Exponent
; Index
++) {
42 MISC_SMBIOS_TABLE_FUNCTION(MiscProcessorCache
)
44 EFI_SMBIOS_HANDLE SmbiosHandle
;
45 SMBIOS_TABLE_TYPE7
*SmbiosRecordL1
;
46 SMBIOS_TABLE_TYPE7
*SmbiosRecordL2
;
48 EFI_CACHE_SRAM_TYPE_DATA CacheSramType
;
49 CHAR16
*SocketDesignation
;
50 CHAR8
*OptionalStrStart
;
52 STRING_REF TokenToGet
;
53 EFI_DATA_HUB_PROTOCOL
*DataHub
;
54 UINT64 MonotonicCount
;
55 EFI_DATA_RECORD_HEADER
*Record
;
56 EFI_SUBCLASS_TYPE1_HEADER
*DataHeader
;
61 // Memory Device LOcator
63 DEBUG ((EFI_D_ERROR
, "type 7\n"));
65 TokenToGet
= STRING_TOKEN (STR_SOCKET_DESIGNATION
);
66 SocketDesignation
= SmbiosMiscGetString (TokenToGet
);
67 SocketStrLen
= StrLen(SocketDesignation
);
68 if (SocketStrLen
> SMBIOS_STRING_MAX_LENGTH
) {
69 return EFI_UNSUPPORTED
;
72 SmbiosRecordL1
= AllocatePool(sizeof (SMBIOS_TABLE_TYPE7
) + 7 + 1 + 1);
73 ASSERT (SmbiosRecordL1
!= NULL
);
74 ZeroMem(SmbiosRecordL1
, sizeof (SMBIOS_TABLE_TYPE7
) + 7 + 1 + 1);
76 SmbiosRecordL2
= AllocatePool(sizeof (SMBIOS_TABLE_TYPE7
) + 7 + 1 + 1);
77 ASSERT (SmbiosRecordL2
!= NULL
);
78 ZeroMem(SmbiosRecordL2
, sizeof (SMBIOS_TABLE_TYPE7
) + 7 + 1 + 1);
81 // Get the Data Hub Protocol. Assume only one instance
83 Status
= gBS
->LocateProtocol (
84 &gEfiDataHubProtocolGuid
,
88 ASSERT_EFI_ERROR(Status
);
94 Status
= DataHub
->GetNextRecord (
100 if (!EFI_ERROR(Status
)) {
101 if (Record
->DataRecordClass
== EFI_DATA_RECORD_CLASS_DATA
) {
102 DataHeader
= (EFI_SUBCLASS_TYPE1_HEADER
*)(Record
+ 1);
103 SrcData
= (UINT8
*)(DataHeader
+ 1);
104 if (CompareGuid(&Record
->DataRecordGuid
, &gEfiCacheSubClassGuid
) && (DataHeader
->RecordType
== CacheSizeRecordType
)) {
105 if (DataHeader
->SubInstance
== EFI_CACHE_L1
) {
106 SmbiosRecordL1
->InstalledSize
+= (UINT16
) (ConvertBase2ToRaw((EFI_EXP_BASE2_DATA
*)SrcData
) >> 10);
107 SmbiosRecordL1
->MaximumCacheSize
= SmbiosRecordL1
->InstalledSize
;
109 else if (DataHeader
->SubInstance
== EFI_CACHE_L2
) {
110 SmbiosRecordL2
->InstalledSize
+= (UINT16
) (ConvertBase2ToRaw((EFI_EXP_BASE2_DATA
*)SrcData
) >> 10);
111 SmbiosRecordL2
->MaximumCacheSize
= SmbiosRecordL2
->InstalledSize
;
118 } while (!EFI_ERROR(Status
) && (MonotonicCount
!= 0));
121 //Filling SMBIOS type 7 information for different cache levels.
124 SmbiosRecordL1
->Hdr
.Type
= EFI_SMBIOS_TYPE_CACHE_INFORMATION
;
125 SmbiosRecordL1
->Hdr
.Length
= (UINT8
) sizeof (SMBIOS_TABLE_TYPE7
);
126 SmbiosRecordL1
->Hdr
.Handle
= 0;
128 SmbiosRecordL1
->Associativity
= CacheAssociativity8Way
;
129 SmbiosRecordL1
->SystemCacheType
= CacheTypeUnknown
;
130 SmbiosRecordL1
->SocketDesignation
= 0x01;
131 SmbiosRecordL1
->CacheSpeed
= 0;
132 SmbiosRecordL1
->CacheConfiguration
= 0x0180;
133 ZeroMem (&CacheSramType
, sizeof (EFI_CACHE_SRAM_TYPE_DATA
));
134 CacheSramType
.Synchronous
= 1;
135 CopyMem(&SmbiosRecordL1
->SupportedSRAMType
, &CacheSramType
, 2);
136 CopyMem(&SmbiosRecordL1
->CurrentSRAMType
, &CacheSramType
, 2);
137 SmbiosRecordL1
->ErrorCorrectionType
= EfiCacheErrorSingleBit
;
140 SmbiosRecordL2
->Hdr
.Type
= EFI_SMBIOS_TYPE_CACHE_INFORMATION
;
141 SmbiosRecordL2
->Hdr
.Length
= (UINT8
) sizeof (SMBIOS_TABLE_TYPE7
);
142 SmbiosRecordL2
->Hdr
.Handle
= 0;
144 SmbiosRecordL2
->Associativity
= CacheAssociativity16Way
;
145 SmbiosRecordL2
->SystemCacheType
= CacheTypeInstruction
;
146 SmbiosRecordL2
->SocketDesignation
= 0x01;
147 SmbiosRecordL2
->CacheSpeed
= 0;
148 SmbiosRecordL2
->CacheConfiguration
= 0x0281;
149 ZeroMem (&CacheSramType
, sizeof (EFI_CACHE_SRAM_TYPE_DATA
));
150 CacheSramType
.Synchronous
= 1;
151 CopyMem(&SmbiosRecordL2
->SupportedSRAMType
, &CacheSramType
, 2);
152 CopyMem(&SmbiosRecordL2
->CurrentSRAMType
, &CacheSramType
, 2);
153 SmbiosRecordL2
->ErrorCorrectionType
= EfiCacheErrorSingleBit
;
158 //Adding SMBIOS type 7 records to SMBIOS table.
160 SmbiosHandle
= SMBIOS_HANDLE_PI_RESERVED
;
161 OptionalStrStart
= (CHAR8
*)(SmbiosRecordL1
+ 1);
162 UnicodeStrToAsciiStr(SocketDesignation
, OptionalStrStart
);
168 (EFI_SMBIOS_TABLE_HEADER
*) SmbiosRecordL1
172 //VLV2 incorporates two SLM modules (quad cores) in the SoC. 2 cores share BIU/L2 cache
174 SmbiosRecordL2
->InstalledSize
= (SmbiosRecordL2
->InstalledSize
)/2;
175 SmbiosRecordL2
->MaximumCacheSize
= SmbiosRecordL2
->InstalledSize
;
176 SmbiosHandle
= SMBIOS_HANDLE_PI_RESERVED
;
178 OptionalStrStart
= (CHAR8
*)(SmbiosRecordL2
+ 1);
179 UnicodeStrToAsciiStr(SocketDesignation
, OptionalStrStart
);
185 (EFI_SMBIOS_TABLE_HEADER
*) SmbiosRecordL2