]>
git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - arch/ia64/kernel/ptrace.c
2 * Kernel support for the ptrace() and syscall tracing interfaces.
4 * Copyright (C) 1999-2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
7 * Derived from the x86 and Alpha versions.
9 #include <linux/config.h>
10 #include <linux/kernel.h>
11 #include <linux/sched.h>
12 #include <linux/slab.h>
14 #include <linux/errno.h>
15 #include <linux/ptrace.h>
16 #include <linux/smp_lock.h>
17 #include <linux/user.h>
18 #include <linux/security.h>
19 #include <linux/audit.h>
21 #include <asm/pgtable.h>
22 #include <asm/processor.h>
23 #include <asm/ptrace_offsets.h>
25 #include <asm/system.h>
26 #include <asm/uaccess.h>
27 #include <asm/unwind.h>
29 #include <asm/perfmon.h>
35 * Bits in the PSR that we allow ptrace() to change:
36 * be, up, ac, mfl, mfh (the user mask; five bits total)
37 * db (debug breakpoint fault; one bit)
38 * id (instruction debug fault disable; one bit)
39 * dd (data debug fault disable; one bit)
40 * ri (restart instruction; two bits)
41 * is (instruction set; one bit)
43 #define IPSR_MASK (IA64_PSR_UM | IA64_PSR_DB | IA64_PSR_IS \
44 | IA64_PSR_ID | IA64_PSR_DD | IA64_PSR_RI)
46 #define MASK(nbits) ((1UL << (nbits)) - 1) /* mask with NBITS bits set */
47 #define PFM_MASK MASK(38)
49 #define PTRACE_DEBUG 0
52 # define dprintk(format...) printk(format)
55 # define dprintk(format...)
58 /* Return TRUE if PT was created due to kernel-entry via a system-call. */
61 in_syscall (struct pt_regs
*pt
)
63 return (long) pt
->cr_ifs
>= 0;
67 * Collect the NaT bits for r1-r31 from scratch_unat and return a NaT
68 * bitset where bit i is set iff the NaT bit of register i is set.
71 ia64_get_scratch_nat_bits (struct pt_regs
*pt
, unsigned long scratch_unat
)
73 # define GET_BITS(first, last, unat) \
75 unsigned long bit = ia64_unat_pos(&pt->r##first); \
76 unsigned long nbits = (last - first + 1); \
77 unsigned long mask = MASK(nbits) << first; \
80 dist = 64 + bit - first; \
83 ia64_rotr(unat, dist) & mask; \
88 * Registers that are stored consecutively in struct pt_regs
89 * can be handled in parallel. If the register order in
90 * struct_pt_regs changes, this code MUST be updated.
92 val
= GET_BITS( 1, 1, scratch_unat
);
93 val
|= GET_BITS( 2, 3, scratch_unat
);
94 val
|= GET_BITS(12, 13, scratch_unat
);
95 val
|= GET_BITS(14, 14, scratch_unat
);
96 val
|= GET_BITS(15, 15, scratch_unat
);
97 val
|= GET_BITS( 8, 11, scratch_unat
);
98 val
|= GET_BITS(16, 31, scratch_unat
);
105 * Set the NaT bits for the scratch registers according to NAT and
106 * return the resulting unat (assuming the scratch registers are
110 ia64_put_scratch_nat_bits (struct pt_regs
*pt
, unsigned long nat
)
112 # define PUT_BITS(first, last, nat) \
114 unsigned long bit = ia64_unat_pos(&pt->r##first); \
115 unsigned long nbits = (last - first + 1); \
116 unsigned long mask = MASK(nbits) << first; \
119 dist = 64 + bit - first; \
121 dist = bit - first; \
122 ia64_rotl(nat & mask, dist); \
124 unsigned long scratch_unat
;
127 * Registers that are stored consecutively in struct pt_regs
128 * can be handled in parallel. If the register order in
129 * struct_pt_regs changes, this code MUST be updated.
131 scratch_unat
= PUT_BITS( 1, 1, nat
);
132 scratch_unat
|= PUT_BITS( 2, 3, nat
);
133 scratch_unat
|= PUT_BITS(12, 13, nat
);
134 scratch_unat
|= PUT_BITS(14, 14, nat
);
135 scratch_unat
|= PUT_BITS(15, 15, nat
);
136 scratch_unat
|= PUT_BITS( 8, 11, nat
);
137 scratch_unat
|= PUT_BITS(16, 31, nat
);
144 #define IA64_MLX_TEMPLATE 0x2
145 #define IA64_MOVL_OPCODE 6
148 ia64_increment_ip (struct pt_regs
*regs
)
150 unsigned long w0
, ri
= ia64_psr(regs
)->ri
+ 1;
155 } else if (ri
== 2) {
156 get_user(w0
, (char __user
*) regs
->cr_iip
+ 0);
157 if (((w0
>> 1) & 0xf) == IA64_MLX_TEMPLATE
) {
159 * rfi'ing to slot 2 of an MLX bundle causes
160 * an illegal operation fault. We don't want
167 ia64_psr(regs
)->ri
= ri
;
171 ia64_decrement_ip (struct pt_regs
*regs
)
173 unsigned long w0
, ri
= ia64_psr(regs
)->ri
- 1;
175 if (ia64_psr(regs
)->ri
== 0) {
178 get_user(w0
, (char __user
*) regs
->cr_iip
+ 0);
179 if (((w0
>> 1) & 0xf) == IA64_MLX_TEMPLATE
) {
181 * rfi'ing to slot 2 of an MLX bundle causes
182 * an illegal operation fault. We don't want
188 ia64_psr(regs
)->ri
= ri
;
192 * This routine is used to read an rnat bits that are stored on the
193 * kernel backing store. Since, in general, the alignment of the user
194 * and kernel are different, this is not completely trivial. In
195 * essence, we need to construct the user RNAT based on up to two
196 * kernel RNAT values and/or the RNAT value saved in the child's
201 * +--------+ <-- lowest address
208 * | slot01 | > child_regs->ar_rnat
210 * | slot02 | / kernel rbs
211 * +--------+ +--------+
212 * <- child_regs->ar_bspstore | slot61 | <-- krbs
213 * +- - - - + +--------+
215 * +- - - - + +--------+
217 * +- - - - + +--------+
219 * +- - - - + +--------+
224 * | slot01 | > child_stack->ar_rnat
228 * <--- child_stack->ar_bspstore
230 * The way to think of this code is as follows: bit 0 in the user rnat
231 * corresponds to some bit N (0 <= N <= 62) in one of the kernel rnat
232 * value. The kernel rnat value holding this bit is stored in
233 * variable rnat0. rnat1 is loaded with the kernel rnat value that
234 * form the upper bits of the user rnat value.
238 * o when reading the rnat "below" the first rnat slot on the kernel
239 * backing store, rnat0/rnat1 are set to 0 and the low order bits are
240 * merged in from pt->ar_rnat.
242 * o when reading the rnat "above" the last rnat slot on the kernel
243 * backing store, rnat0/rnat1 gets its value from sw->ar_rnat.
246 get_rnat (struct task_struct
*task
, struct switch_stack
*sw
,
247 unsigned long *krbs
, unsigned long *urnat_addr
,
248 unsigned long *urbs_end
)
250 unsigned long rnat0
= 0, rnat1
= 0, urnat
= 0, *slot0_kaddr
;
251 unsigned long umask
= 0, mask
, m
;
252 unsigned long *kbsp
, *ubspstore
, *rnat0_kaddr
, *rnat1_kaddr
, shift
;
253 long num_regs
, nbits
;
256 pt
= ia64_task_regs(task
);
257 kbsp
= (unsigned long *) sw
->ar_bspstore
;
258 ubspstore
= (unsigned long *) pt
->ar_bspstore
;
260 if (urbs_end
< urnat_addr
)
261 nbits
= ia64_rse_num_regs(urnat_addr
- 63, urbs_end
);
266 * First, figure out which bit number slot 0 in user-land maps
267 * to in the kernel rnat. Do this by figuring out how many
268 * register slots we're beyond the user's backingstore and
269 * then computing the equivalent address in kernel space.
271 num_regs
= ia64_rse_num_regs(ubspstore
, urnat_addr
+ 1);
272 slot0_kaddr
= ia64_rse_skip_regs(krbs
, num_regs
);
273 shift
= ia64_rse_slot_num(slot0_kaddr
);
274 rnat1_kaddr
= ia64_rse_rnat_addr(slot0_kaddr
);
275 rnat0_kaddr
= rnat1_kaddr
- 64;
277 if (ubspstore
+ 63 > urnat_addr
) {
278 /* some bits need to be merged in from pt->ar_rnat */
279 umask
= MASK(ia64_rse_slot_num(ubspstore
)) & mask
;
280 urnat
= (pt
->ar_rnat
& umask
);
287 if (rnat0_kaddr
>= kbsp
)
289 else if (rnat0_kaddr
> krbs
)
290 rnat0
= *rnat0_kaddr
;
291 urnat
|= (rnat0
& m
) >> shift
;
293 m
= mask
>> (63 - shift
);
294 if (rnat1_kaddr
>= kbsp
)
296 else if (rnat1_kaddr
> krbs
)
297 rnat1
= *rnat1_kaddr
;
298 urnat
|= (rnat1
& m
) << (63 - shift
);
303 * The reverse of get_rnat.
306 put_rnat (struct task_struct
*task
, struct switch_stack
*sw
,
307 unsigned long *krbs
, unsigned long *urnat_addr
, unsigned long urnat
,
308 unsigned long *urbs_end
)
310 unsigned long rnat0
= 0, rnat1
= 0, *slot0_kaddr
, umask
= 0, mask
, m
;
311 unsigned long *kbsp
, *ubspstore
, *rnat0_kaddr
, *rnat1_kaddr
, shift
;
312 long num_regs
, nbits
;
314 unsigned long cfm
, *urbs_kargs
;
316 pt
= ia64_task_regs(task
);
317 kbsp
= (unsigned long *) sw
->ar_bspstore
;
318 ubspstore
= (unsigned long *) pt
->ar_bspstore
;
320 urbs_kargs
= urbs_end
;
321 if (in_syscall(pt
)) {
323 * If entered via syscall, don't allow user to set rnat bits
327 urbs_kargs
= ia64_rse_skip_regs(urbs_end
, -(cfm
& 0x7f));
330 if (urbs_kargs
>= urnat_addr
)
333 if ((urnat_addr
- 63) >= urbs_kargs
)
335 nbits
= ia64_rse_num_regs(urnat_addr
- 63, urbs_kargs
);
340 * First, figure out which bit number slot 0 in user-land maps
341 * to in the kernel rnat. Do this by figuring out how many
342 * register slots we're beyond the user's backingstore and
343 * then computing the equivalent address in kernel space.
345 num_regs
= ia64_rse_num_regs(ubspstore
, urnat_addr
+ 1);
346 slot0_kaddr
= ia64_rse_skip_regs(krbs
, num_regs
);
347 shift
= ia64_rse_slot_num(slot0_kaddr
);
348 rnat1_kaddr
= ia64_rse_rnat_addr(slot0_kaddr
);
349 rnat0_kaddr
= rnat1_kaddr
- 64;
351 if (ubspstore
+ 63 > urnat_addr
) {
352 /* some bits need to be place in pt->ar_rnat: */
353 umask
= MASK(ia64_rse_slot_num(ubspstore
)) & mask
;
354 pt
->ar_rnat
= (pt
->ar_rnat
& ~umask
) | (urnat
& umask
);
360 * Note: Section 11.1 of the EAS guarantees that bit 63 of an
361 * rnat slot is ignored. so we don't have to clear it here.
363 rnat0
= (urnat
<< shift
);
365 if (rnat0_kaddr
>= kbsp
)
366 sw
->ar_rnat
= (sw
->ar_rnat
& ~m
) | (rnat0
& m
);
367 else if (rnat0_kaddr
> krbs
)
368 *rnat0_kaddr
= ((*rnat0_kaddr
& ~m
) | (rnat0
& m
));
370 rnat1
= (urnat
>> (63 - shift
));
371 m
= mask
>> (63 - shift
);
372 if (rnat1_kaddr
>= kbsp
)
373 sw
->ar_rnat
= (sw
->ar_rnat
& ~m
) | (rnat1
& m
);
374 else if (rnat1_kaddr
> krbs
)
375 *rnat1_kaddr
= ((*rnat1_kaddr
& ~m
) | (rnat1
& m
));
379 on_kernel_rbs (unsigned long addr
, unsigned long bspstore
,
380 unsigned long urbs_end
)
382 unsigned long *rnat_addr
= ia64_rse_rnat_addr((unsigned long *)
384 return (addr
>= bspstore
&& addr
<= (unsigned long) rnat_addr
);
388 * Read a word from the user-level backing store of task CHILD. ADDR
389 * is the user-level address to read the word from, VAL a pointer to
390 * the return value, and USER_BSP gives the end of the user-level
391 * backing store (i.e., it's the address that would be in ar.bsp after
392 * the user executed a "cover" instruction).
394 * This routine takes care of accessing the kernel register backing
395 * store for those registers that got spilled there. It also takes
396 * care of calculating the appropriate RNaT collection words.
399 ia64_peek (struct task_struct
*child
, struct switch_stack
*child_stack
,
400 unsigned long user_rbs_end
, unsigned long addr
, long *val
)
402 unsigned long *bspstore
, *krbs
, regnum
, *laddr
, *urbs_end
, *rnat_addr
;
403 struct pt_regs
*child_regs
;
407 urbs_end
= (long *) user_rbs_end
;
408 laddr
= (unsigned long *) addr
;
409 child_regs
= ia64_task_regs(child
);
410 bspstore
= (unsigned long *) child_regs
->ar_bspstore
;
411 krbs
= (unsigned long *) child
+ IA64_RBS_OFFSET
/8;
412 if (on_kernel_rbs(addr
, (unsigned long) bspstore
,
413 (unsigned long) urbs_end
))
416 * Attempt to read the RBS in an area that's actually
417 * on the kernel RBS => read the corresponding bits in
420 rnat_addr
= ia64_rse_rnat_addr(laddr
);
421 ret
= get_rnat(child
, child_stack
, krbs
, rnat_addr
, urbs_end
);
423 if (laddr
== rnat_addr
) {
424 /* return NaT collection word itself */
429 if (((1UL << ia64_rse_slot_num(laddr
)) & ret
) != 0) {
431 * It is implementation dependent whether the
432 * data portion of a NaT value gets saved on a
433 * st8.spill or RSE spill (e.g., see EAS 2.6,
434 * 4.4.4.6 Register Spill and Fill). To get
435 * consistent behavior across all possible
436 * IA-64 implementations, we return zero in
443 if (laddr
< urbs_end
) {
445 * The desired word is on the kernel RBS and
448 regnum
= ia64_rse_num_regs(bspstore
, laddr
);
449 *val
= *ia64_rse_skip_regs(krbs
, regnum
);
453 copied
= access_process_vm(child
, addr
, &ret
, sizeof(ret
), 0);
454 if (copied
!= sizeof(ret
))
461 ia64_poke (struct task_struct
*child
, struct switch_stack
*child_stack
,
462 unsigned long user_rbs_end
, unsigned long addr
, long val
)
464 unsigned long *bspstore
, *krbs
, regnum
, *laddr
;
465 unsigned long *urbs_end
= (long *) user_rbs_end
;
466 struct pt_regs
*child_regs
;
468 laddr
= (unsigned long *) addr
;
469 child_regs
= ia64_task_regs(child
);
470 bspstore
= (unsigned long *) child_regs
->ar_bspstore
;
471 krbs
= (unsigned long *) child
+ IA64_RBS_OFFSET
/8;
472 if (on_kernel_rbs(addr
, (unsigned long) bspstore
,
473 (unsigned long) urbs_end
))
476 * Attempt to write the RBS in an area that's actually
477 * on the kernel RBS => write the corresponding bits
480 if (ia64_rse_is_rnat_slot(laddr
))
481 put_rnat(child
, child_stack
, krbs
, laddr
, val
,
484 if (laddr
< urbs_end
) {
485 regnum
= ia64_rse_num_regs(bspstore
, laddr
);
486 *ia64_rse_skip_regs(krbs
, regnum
) = val
;
489 } else if (access_process_vm(child
, addr
, &val
, sizeof(val
), 1)
496 * Calculate the address of the end of the user-level register backing
497 * store. This is the address that would have been stored in ar.bsp
498 * if the user had executed a "cover" instruction right before
499 * entering the kernel. If CFMP is not NULL, it is used to return the
500 * "current frame mask" that was active at the time the kernel was
504 ia64_get_user_rbs_end (struct task_struct
*child
, struct pt_regs
*pt
,
507 unsigned long *krbs
, *bspstore
, cfm
= pt
->cr_ifs
;
510 krbs
= (unsigned long *) child
+ IA64_RBS_OFFSET
/8;
511 bspstore
= (unsigned long *) pt
->ar_bspstore
;
512 ndirty
= ia64_rse_num_regs(krbs
, krbs
+ (pt
->loadrs
>> 19));
515 ndirty
+= (cfm
& 0x7f);
517 cfm
&= ~(1UL << 63); /* clear valid bit */
521 return (unsigned long) ia64_rse_skip_regs(bspstore
, ndirty
);
525 * Synchronize (i.e, write) the RSE backing store living in kernel
526 * space to the VM of the CHILD task. SW and PT are the pointers to
527 * the switch_stack and pt_regs structures, respectively.
528 * USER_RBS_END is the user-level address at which the backing store
532 ia64_sync_user_rbs (struct task_struct
*child
, struct switch_stack
*sw
,
533 unsigned long user_rbs_start
, unsigned long user_rbs_end
)
535 unsigned long addr
, val
;
538 /* now copy word for word from kernel rbs to user rbs: */
539 for (addr
= user_rbs_start
; addr
< user_rbs_end
; addr
+= 8) {
540 ret
= ia64_peek(child
, sw
, user_rbs_end
, addr
, &val
);
543 if (access_process_vm(child
, addr
, &val
, sizeof(val
), 1)
551 thread_matches (struct task_struct
*thread
, unsigned long addr
)
553 unsigned long thread_rbs_end
;
554 struct pt_regs
*thread_regs
;
556 if (ptrace_check_attach(thread
, 0) < 0)
558 * If the thread is not in an attachable state, we'll
559 * ignore it. The net effect is that if ADDR happens
560 * to overlap with the portion of the thread's
561 * register backing store that is currently residing
562 * on the thread's kernel stack, then ptrace() may end
563 * up accessing a stale value. But if the thread
564 * isn't stopped, that's a problem anyhow, so we're
565 * doing as well as we can...
569 thread_regs
= ia64_task_regs(thread
);
570 thread_rbs_end
= ia64_get_user_rbs_end(thread
, thread_regs
, NULL
);
571 if (!on_kernel_rbs(addr
, thread_regs
->ar_bspstore
, thread_rbs_end
))
574 return 1; /* looks like we've got a winner */
578 * GDB apparently wants to be able to read the register-backing store
579 * of any thread when attached to a given process. If we are peeking
580 * or poking an address that happens to reside in the kernel-backing
581 * store of another thread, we need to attach to that thread, because
582 * otherwise we end up accessing stale data.
584 * task_list_lock must be read-locked before calling this routine!
586 static struct task_struct
*
587 find_thread_for_addr (struct task_struct
*child
, unsigned long addr
)
589 struct task_struct
*g
, *p
;
590 struct mm_struct
*mm
;
593 if (!(mm
= get_task_mm(child
)))
596 /* -1 because of our get_task_mm(): */
597 mm_users
= atomic_read(&mm
->mm_users
) - 1;
599 goto out
; /* not multi-threaded */
602 * First, traverse the child's thread-list. Good for scalability with
607 if (thread_matches(p
, addr
)) {
613 } while ((p
= next_thread(p
)) != child
);
615 do_each_thread(g
, p
) {
619 if (thread_matches(p
, addr
)) {
623 } while_each_thread(g
, p
);
630 * Write f32-f127 back to task->thread.fph if it has been modified.
633 ia64_flush_fph (struct task_struct
*task
)
635 struct ia64_psr
*psr
= ia64_psr(ia64_task_regs(task
));
637 if (ia64_is_local_fpu_owner(task
) && psr
->mfh
) {
639 task
->thread
.flags
|= IA64_THREAD_FPH_VALID
;
640 ia64_save_fpu(&task
->thread
.fph
[0]);
645 * Sync the fph state of the task so that it can be manipulated
646 * through thread.fph. If necessary, f32-f127 are written back to
647 * thread.fph or, if the fph state hasn't been used before, thread.fph
648 * is cleared to zeroes. Also, access to f32-f127 is disabled to
649 * ensure that the task picks up the state from thread.fph when it
653 ia64_sync_fph (struct task_struct
*task
)
655 struct ia64_psr
*psr
= ia64_psr(ia64_task_regs(task
));
657 ia64_flush_fph(task
);
658 if (!(task
->thread
.flags
& IA64_THREAD_FPH_VALID
)) {
659 task
->thread
.flags
|= IA64_THREAD_FPH_VALID
;
660 memset(&task
->thread
.fph
, 0, sizeof(task
->thread
.fph
));
667 access_fr (struct unw_frame_info
*info
, int regnum
, int hi
,
668 unsigned long *data
, int write_access
)
670 struct ia64_fpreg fpval
;
673 ret
= unw_get_fr(info
, regnum
, &fpval
);
678 fpval
.u
.bits
[hi
] = *data
;
679 ret
= unw_set_fr(info
, regnum
, fpval
);
681 *data
= fpval
.u
.bits
[hi
];
686 * Change the machine-state of CHILD such that it will return via the normal
687 * kernel exit-path, rather than the syscall-exit path.
690 convert_to_non_syscall (struct task_struct
*child
, struct pt_regs
*pt
,
693 struct unw_frame_info info
, prev_info
;
694 unsigned long ip
, pr
;
696 unw_init_from_blocked_task(&info
, child
);
699 if (unw_unwind(&info
) < 0)
701 if (unw_get_rp(&info
, &ip
) < 0)
703 if (ip
< FIXADDR_USER_END
)
707 unw_get_pr(&prev_info
, &pr
);
708 pr
&= ~(1UL << PRED_SYSCALL
);
709 pr
|= (1UL << PRED_NON_SYSCALL
);
710 unw_set_pr(&prev_info
, pr
);
712 pt
->cr_ifs
= (1UL << 63) | cfm
;
716 access_nat_bits (struct task_struct
*child
, struct pt_regs
*pt
,
717 struct unw_frame_info
*info
,
718 unsigned long *data
, int write_access
)
720 unsigned long regnum
, nat_bits
, scratch_unat
, dummy
= 0;
725 scratch_unat
= ia64_put_scratch_nat_bits(pt
, nat_bits
);
726 if (unw_set_ar(info
, UNW_AR_UNAT
, scratch_unat
) < 0) {
727 dprintk("ptrace: failed to set ar.unat\n");
730 for (regnum
= 4; regnum
<= 7; ++regnum
) {
731 unw_get_gr(info
, regnum
, &dummy
, &nat
);
732 unw_set_gr(info
, regnum
, dummy
,
733 (nat_bits
>> regnum
) & 1);
736 if (unw_get_ar(info
, UNW_AR_UNAT
, &scratch_unat
) < 0) {
737 dprintk("ptrace: failed to read ar.unat\n");
740 nat_bits
= ia64_get_scratch_nat_bits(pt
, scratch_unat
);
741 for (regnum
= 4; regnum
<= 7; ++regnum
) {
742 unw_get_gr(info
, regnum
, &dummy
, &nat
);
743 nat_bits
|= (nat
!= 0) << regnum
;
751 access_uarea (struct task_struct
*child
, unsigned long addr
,
752 unsigned long *data
, int write_access
)
754 unsigned long *ptr
, regnum
, urbs_end
, rnat_addr
, cfm
;
755 struct switch_stack
*sw
;
757 # define pt_reg_addr(pt, reg) ((void *) \
758 ((unsigned long) (pt) \
759 + offsetof(struct pt_regs, reg)))
762 pt
= ia64_task_regs(child
);
763 sw
= (struct switch_stack
*) (child
->thread
.ksp
+ 16);
765 if ((addr
& 0x7) != 0) {
766 dprintk("ptrace: unaligned register address 0x%lx\n", addr
);
770 if (addr
< PT_F127
+ 16) {
773 ia64_sync_fph(child
);
775 ia64_flush_fph(child
);
776 ptr
= (unsigned long *)
777 ((unsigned long) &child
->thread
.fph
+ addr
);
778 } else if ((addr
>= PT_F10
) && (addr
< PT_F11
+ 16)) {
779 /* scratch registers untouched by kernel (saved in pt_regs) */
780 ptr
= pt_reg_addr(pt
, f10
) + (addr
- PT_F10
);
781 } else if (addr
>= PT_F12
&& addr
< PT_F15
+ 16) {
783 * Scratch registers untouched by kernel (saved in
786 ptr
= (unsigned long *) ((long) sw
787 + (addr
- PT_NAT_BITS
- 32));
788 } else if (addr
< PT_AR_LC
+ 8) {
789 /* preserved state: */
790 struct unw_frame_info info
;
794 unw_init_from_blocked_task(&info
, child
);
795 if (unw_unwind_to_user(&info
) < 0)
800 return access_nat_bits(child
, pt
, &info
,
803 case PT_R4
: case PT_R5
: case PT_R6
: case PT_R7
:
805 /* read NaT bit first: */
808 ret
= unw_get_gr(&info
, (addr
- PT_R4
)/8 + 4,
813 return unw_access_gr(&info
, (addr
- PT_R4
)/8 + 4, data
,
816 case PT_B1
: case PT_B2
: case PT_B3
:
817 case PT_B4
: case PT_B5
:
818 return unw_access_br(&info
, (addr
- PT_B1
)/8 + 1, data
,
822 return unw_access_ar(&info
, UNW_AR_EC
, data
,
826 return unw_access_ar(&info
, UNW_AR_LC
, data
,
830 if (addr
>= PT_F2
&& addr
< PT_F5
+ 16)
831 return access_fr(&info
, (addr
- PT_F2
)/16 + 2,
832 (addr
& 8) != 0, data
,
834 else if (addr
>= PT_F16
&& addr
< PT_F31
+ 16)
835 return access_fr(&info
,
836 (addr
- PT_F16
)/16 + 16,
840 dprintk("ptrace: rejecting access to register "
841 "address 0x%lx\n", addr
);
845 } else if (addr
< PT_F9
+16) {
850 * By convention, we use PT_AR_BSP to refer to
851 * the end of the user-level backing store.
852 * Use ia64_rse_skip_regs(PT_AR_BSP, -CFM.sof)
853 * to get the real value of ar.bsp at the time
854 * the kernel was entered.
856 * Furthermore, when changing the contents of
857 * PT_AR_BSP (or PT_CFM) we MUST copy any
858 * users-level stacked registers that are
859 * stored on the kernel stack back to
860 * user-space because otherwise, we might end
861 * up clobbering kernel stacked registers.
862 * Also, if this happens while the task is
863 * blocked in a system call, which convert the
864 * state such that the non-system-call exit
865 * path is used. This ensures that the proper
866 * state will be picked up when resuming
867 * execution. However, it *also* means that
868 * once we write PT_AR_BSP/PT_CFM, it won't be
869 * possible to modify the syscall arguments of
870 * the pending system call any longer. This
871 * shouldn't be an issue because modifying
872 * PT_AR_BSP/PT_CFM generally implies that
873 * we're either abandoning the pending system
874 * call or that we defer it's re-execution
875 * (e.g., due to GDB doing an inferior
878 urbs_end
= ia64_get_user_rbs_end(child
, pt
, &cfm
);
880 if (*data
!= urbs_end
) {
881 if (ia64_sync_user_rbs(child
, sw
,
886 convert_to_non_syscall(child
,
890 * Simulate user-level write
894 pt
->ar_bspstore
= *data
;
901 urbs_end
= ia64_get_user_rbs_end(child
, pt
, &cfm
);
903 if (((cfm
^ *data
) & PFM_MASK
) != 0) {
904 if (ia64_sync_user_rbs(child
, sw
,
909 convert_to_non_syscall(child
,
912 pt
->cr_ifs
= ((pt
->cr_ifs
& ~PFM_MASK
)
913 | (*data
& PFM_MASK
));
921 pt
->cr_ipsr
= ((*data
& IPSR_MASK
)
922 | (pt
->cr_ipsr
& ~IPSR_MASK
));
924 *data
= (pt
->cr_ipsr
& IPSR_MASK
);
928 urbs_end
= ia64_get_user_rbs_end(child
, pt
, NULL
);
929 rnat_addr
= (long) ia64_rse_rnat_addr((long *)
932 return ia64_poke(child
, sw
, urbs_end
,
935 return ia64_peek(child
, sw
, urbs_end
,
939 ptr
= pt_reg_addr(pt
, r1
);
941 case PT_R2
: case PT_R3
:
942 ptr
= pt_reg_addr(pt
, r2
) + (addr
- PT_R2
);
944 case PT_R8
: case PT_R9
: case PT_R10
: case PT_R11
:
945 ptr
= pt_reg_addr(pt
, r8
) + (addr
- PT_R8
);
947 case PT_R12
: case PT_R13
:
948 ptr
= pt_reg_addr(pt
, r12
) + (addr
- PT_R12
);
951 ptr
= pt_reg_addr(pt
, r14
);
954 ptr
= pt_reg_addr(pt
, r15
);
956 case PT_R16
: case PT_R17
: case PT_R18
: case PT_R19
:
957 case PT_R20
: case PT_R21
: case PT_R22
: case PT_R23
:
958 case PT_R24
: case PT_R25
: case PT_R26
: case PT_R27
:
959 case PT_R28
: case PT_R29
: case PT_R30
: case PT_R31
:
960 ptr
= pt_reg_addr(pt
, r16
) + (addr
- PT_R16
);
963 ptr
= pt_reg_addr(pt
, b0
);
966 ptr
= pt_reg_addr(pt
, b6
);
969 ptr
= pt_reg_addr(pt
, b7
);
971 case PT_F6
: case PT_F6
+8: case PT_F7
: case PT_F7
+8:
972 case PT_F8
: case PT_F8
+8: case PT_F9
: case PT_F9
+8:
973 ptr
= pt_reg_addr(pt
, f6
) + (addr
- PT_F6
);
976 ptr
= pt_reg_addr(pt
, ar_bspstore
);
979 ptr
= pt_reg_addr(pt
, ar_rsc
);
982 ptr
= pt_reg_addr(pt
, ar_unat
);
985 ptr
= pt_reg_addr(pt
, ar_pfs
);
988 ptr
= pt_reg_addr(pt
, ar_ccv
);
991 ptr
= pt_reg_addr(pt
, ar_fpsr
);
994 ptr
= pt_reg_addr(pt
, cr_iip
);
997 ptr
= pt_reg_addr(pt
, pr
);
999 /* scratch register */
1002 /* disallow accessing anything else... */
1003 dprintk("ptrace: rejecting access to register "
1004 "address 0x%lx\n", addr
);
1007 } else if (addr
<= PT_AR_SSD
) {
1008 ptr
= pt_reg_addr(pt
, ar_csd
) + (addr
- PT_AR_CSD
);
1010 /* access debug registers */
1012 if (addr
>= PT_IBR
) {
1013 regnum
= (addr
- PT_IBR
) >> 3;
1014 ptr
= &child
->thread
.ibr
[0];
1016 regnum
= (addr
- PT_DBR
) >> 3;
1017 ptr
= &child
->thread
.dbr
[0];
1021 dprintk("ptrace: rejecting access to register "
1022 "address 0x%lx\n", addr
);
1025 #ifdef CONFIG_PERFMON
1027 * Check if debug registers are used by perfmon. This
1028 * test must be done once we know that we can do the
1029 * operation, i.e. the arguments are all valid, but
1030 * before we start modifying the state.
1032 * Perfmon needs to keep a count of how many processes
1033 * are trying to modify the debug registers for system
1034 * wide monitoring sessions.
1036 * We also include read access here, because they may
1037 * cause the PMU-installed debug register state
1038 * (dbr[], ibr[]) to be reset. The two arrays are also
1039 * used by perfmon, but we do not use
1040 * IA64_THREAD_DBG_VALID. The registers are restored
1041 * by the PMU context switch code.
1043 if (pfm_use_debug_registers(child
)) return -1;
1046 if (!(child
->thread
.flags
& IA64_THREAD_DBG_VALID
)) {
1047 child
->thread
.flags
|= IA64_THREAD_DBG_VALID
;
1048 memset(child
->thread
.dbr
, 0,
1049 sizeof(child
->thread
.dbr
));
1050 memset(child
->thread
.ibr
, 0,
1051 sizeof(child
->thread
.ibr
));
1056 if ((regnum
& 1) && write_access
) {
1057 /* don't let the user set kernel-level breakpoints: */
1058 *ptr
= *data
& ~(7UL << 56);
1070 ptrace_getregs (struct task_struct
*child
, struct pt_all_user_regs __user
*ppr
)
1072 unsigned long psr
, ec
, lc
, rnat
, bsp
, cfm
, nat_bits
, val
;
1073 struct unw_frame_info info
;
1074 struct ia64_fpreg fpval
;
1075 struct switch_stack
*sw
;
1077 long ret
, retval
= 0;
1081 if (!access_ok(VERIFY_WRITE
, ppr
, sizeof(struct pt_all_user_regs
)))
1084 pt
= ia64_task_regs(child
);
1085 sw
= (struct switch_stack
*) (child
->thread
.ksp
+ 16);
1086 unw_init_from_blocked_task(&info
, child
);
1087 if (unw_unwind_to_user(&info
) < 0) {
1091 if (((unsigned long) ppr
& 0x7) != 0) {
1092 dprintk("ptrace:unaligned register address %p\n", ppr
);
1096 if (access_uarea(child
, PT_CR_IPSR
, &psr
, 0) < 0
1097 || access_uarea(child
, PT_AR_EC
, &ec
, 0) < 0
1098 || access_uarea(child
, PT_AR_LC
, &lc
, 0) < 0
1099 || access_uarea(child
, PT_AR_RNAT
, &rnat
, 0) < 0
1100 || access_uarea(child
, PT_AR_BSP
, &bsp
, 0) < 0
1101 || access_uarea(child
, PT_CFM
, &cfm
, 0)
1102 || access_uarea(child
, PT_NAT_BITS
, &nat_bits
, 0))
1107 retval
|= __put_user(pt
->cr_iip
, &ppr
->cr_iip
);
1108 retval
|= __put_user(psr
, &ppr
->cr_ipsr
);
1112 retval
|= __put_user(pt
->ar_pfs
, &ppr
->ar
[PT_AUR_PFS
]);
1113 retval
|= __put_user(pt
->ar_rsc
, &ppr
->ar
[PT_AUR_RSC
]);
1114 retval
|= __put_user(pt
->ar_bspstore
, &ppr
->ar
[PT_AUR_BSPSTORE
]);
1115 retval
|= __put_user(pt
->ar_unat
, &ppr
->ar
[PT_AUR_UNAT
]);
1116 retval
|= __put_user(pt
->ar_ccv
, &ppr
->ar
[PT_AUR_CCV
]);
1117 retval
|= __put_user(pt
->ar_fpsr
, &ppr
->ar
[PT_AUR_FPSR
]);
1119 retval
|= __put_user(ec
, &ppr
->ar
[PT_AUR_EC
]);
1120 retval
|= __put_user(lc
, &ppr
->ar
[PT_AUR_LC
]);
1121 retval
|= __put_user(rnat
, &ppr
->ar
[PT_AUR_RNAT
]);
1122 retval
|= __put_user(bsp
, &ppr
->ar
[PT_AUR_BSP
]);
1123 retval
|= __put_user(cfm
, &ppr
->cfm
);
1127 retval
|= __copy_to_user(&ppr
->gr
[1], &pt
->r1
, sizeof(long));
1128 retval
|= __copy_to_user(&ppr
->gr
[2], &pt
->r2
, sizeof(long) *2);
1132 for (i
= 4; i
< 8; i
++) {
1133 if (unw_access_gr(&info
, i
, &val
, &nat
, 0) < 0)
1135 retval
|= __put_user(val
, &ppr
->gr
[i
]);
1140 retval
|= __copy_to_user(&ppr
->gr
[8], &pt
->r8
, sizeof(long) * 4);
1144 retval
|= __copy_to_user(&ppr
->gr
[12], &pt
->r12
, sizeof(long) * 2);
1145 retval
|= __copy_to_user(&ppr
->gr
[14], &pt
->r14
, sizeof(long));
1146 retval
|= __copy_to_user(&ppr
->gr
[15], &pt
->r15
, sizeof(long));
1150 retval
|= __copy_to_user(&ppr
->gr
[16], &pt
->r16
, sizeof(long) * 16);
1154 retval
|= __put_user(pt
->b0
, &ppr
->br
[0]);
1158 for (i
= 1; i
< 6; i
++) {
1159 if (unw_access_br(&info
, i
, &val
, 0) < 0)
1161 __put_user(val
, &ppr
->br
[i
]);
1166 retval
|= __put_user(pt
->b6
, &ppr
->br
[6]);
1167 retval
|= __put_user(pt
->b7
, &ppr
->br
[7]);
1171 for (i
= 2; i
< 6; i
++) {
1172 if (unw_get_fr(&info
, i
, &fpval
) < 0)
1174 retval
|= __copy_to_user(&ppr
->fr
[i
], &fpval
, sizeof (fpval
));
1179 retval
|= __copy_to_user(&ppr
->fr
[6], &pt
->f6
,
1180 sizeof(struct ia64_fpreg
) * 6);
1182 /* fp scratch regs(12-15) */
1184 retval
|= __copy_to_user(&ppr
->fr
[12], &sw
->f12
,
1185 sizeof(struct ia64_fpreg
) * 4);
1189 for (i
= 16; i
< 32; i
++) {
1190 if (unw_get_fr(&info
, i
, &fpval
) < 0)
1192 retval
|= __copy_to_user(&ppr
->fr
[i
], &fpval
, sizeof (fpval
));
1197 ia64_flush_fph(child
);
1198 retval
|= __copy_to_user(&ppr
->fr
[32], &child
->thread
.fph
,
1199 sizeof(ppr
->fr
[32]) * 96);
1203 retval
|= __put_user(pt
->pr
, &ppr
->pr
);
1207 retval
|= __put_user(nat_bits
, &ppr
->nat
);
1209 ret
= retval
? -EIO
: 0;
1214 ptrace_setregs (struct task_struct
*child
, struct pt_all_user_regs __user
*ppr
)
1216 unsigned long psr
, ec
, lc
, rnat
, bsp
, cfm
, nat_bits
, val
= 0;
1217 struct unw_frame_info info
;
1218 struct switch_stack
*sw
;
1219 struct ia64_fpreg fpval
;
1221 long ret
, retval
= 0;
1224 memset(&fpval
, 0, sizeof(fpval
));
1226 if (!access_ok(VERIFY_READ
, ppr
, sizeof(struct pt_all_user_regs
)))
1229 pt
= ia64_task_regs(child
);
1230 sw
= (struct switch_stack
*) (child
->thread
.ksp
+ 16);
1231 unw_init_from_blocked_task(&info
, child
);
1232 if (unw_unwind_to_user(&info
) < 0) {
1236 if (((unsigned long) ppr
& 0x7) != 0) {
1237 dprintk("ptrace:unaligned register address %p\n", ppr
);
1243 retval
|= __get_user(pt
->cr_iip
, &ppr
->cr_iip
);
1244 retval
|= __get_user(psr
, &ppr
->cr_ipsr
);
1248 retval
|= __get_user(pt
->ar_pfs
, &ppr
->ar
[PT_AUR_PFS
]);
1249 retval
|= __get_user(pt
->ar_rsc
, &ppr
->ar
[PT_AUR_RSC
]);
1250 retval
|= __get_user(pt
->ar_bspstore
, &ppr
->ar
[PT_AUR_BSPSTORE
]);
1251 retval
|= __get_user(pt
->ar_unat
, &ppr
->ar
[PT_AUR_UNAT
]);
1252 retval
|= __get_user(pt
->ar_ccv
, &ppr
->ar
[PT_AUR_CCV
]);
1253 retval
|= __get_user(pt
->ar_fpsr
, &ppr
->ar
[PT_AUR_FPSR
]);
1255 retval
|= __get_user(ec
, &ppr
->ar
[PT_AUR_EC
]);
1256 retval
|= __get_user(lc
, &ppr
->ar
[PT_AUR_LC
]);
1257 retval
|= __get_user(rnat
, &ppr
->ar
[PT_AUR_RNAT
]);
1258 retval
|= __get_user(bsp
, &ppr
->ar
[PT_AUR_BSP
]);
1259 retval
|= __get_user(cfm
, &ppr
->cfm
);
1263 retval
|= __copy_from_user(&pt
->r1
, &ppr
->gr
[1], sizeof(long));
1264 retval
|= __copy_from_user(&pt
->r2
, &ppr
->gr
[2], sizeof(long) * 2);
1268 for (i
= 4; i
< 8; i
++) {
1269 retval
|= __get_user(val
, &ppr
->gr
[i
]);
1270 /* NaT bit will be set via PT_NAT_BITS: */
1271 if (unw_set_gr(&info
, i
, val
, 0) < 0)
1277 retval
|= __copy_from_user(&pt
->r8
, &ppr
->gr
[8], sizeof(long) * 4);
1281 retval
|= __copy_from_user(&pt
->r12
, &ppr
->gr
[12], sizeof(long) * 2);
1282 retval
|= __copy_from_user(&pt
->r14
, &ppr
->gr
[14], sizeof(long));
1283 retval
|= __copy_from_user(&pt
->r15
, &ppr
->gr
[15], sizeof(long));
1287 retval
|= __copy_from_user(&pt
->r16
, &ppr
->gr
[16], sizeof(long) * 16);
1291 retval
|= __get_user(pt
->b0
, &ppr
->br
[0]);
1295 for (i
= 1; i
< 6; i
++) {
1296 retval
|= __get_user(val
, &ppr
->br
[i
]);
1297 unw_set_br(&info
, i
, val
);
1302 retval
|= __get_user(pt
->b6
, &ppr
->br
[6]);
1303 retval
|= __get_user(pt
->b7
, &ppr
->br
[7]);
1307 for (i
= 2; i
< 6; i
++) {
1308 retval
|= __copy_from_user(&fpval
, &ppr
->fr
[i
], sizeof(fpval
));
1309 if (unw_set_fr(&info
, i
, fpval
) < 0)
1315 retval
|= __copy_from_user(&pt
->f6
, &ppr
->fr
[6],
1316 sizeof(ppr
->fr
[6]) * 6);
1318 /* fp scratch regs(12-15) */
1320 retval
|= __copy_from_user(&sw
->f12
, &ppr
->fr
[12],
1321 sizeof(ppr
->fr
[12]) * 4);
1325 for (i
= 16; i
< 32; i
++) {
1326 retval
|= __copy_from_user(&fpval
, &ppr
->fr
[i
],
1328 if (unw_set_fr(&info
, i
, fpval
) < 0)
1334 ia64_sync_fph(child
);
1335 retval
|= __copy_from_user(&child
->thread
.fph
, &ppr
->fr
[32],
1336 sizeof(ppr
->fr
[32]) * 96);
1340 retval
|= __get_user(pt
->pr
, &ppr
->pr
);
1344 retval
|= __get_user(nat_bits
, &ppr
->nat
);
1346 retval
|= access_uarea(child
, PT_CR_IPSR
, &psr
, 1);
1347 retval
|= access_uarea(child
, PT_AR_EC
, &ec
, 1);
1348 retval
|= access_uarea(child
, PT_AR_LC
, &lc
, 1);
1349 retval
|= access_uarea(child
, PT_AR_RNAT
, &rnat
, 1);
1350 retval
|= access_uarea(child
, PT_AR_BSP
, &bsp
, 1);
1351 retval
|= access_uarea(child
, PT_CFM
, &cfm
, 1);
1352 retval
|= access_uarea(child
, PT_NAT_BITS
, &nat_bits
, 1);
1354 ret
= retval
? -EIO
: 0;
1359 * Called by kernel/ptrace.c when detaching..
1361 * Make sure the single step bit is not set.
1364 ptrace_disable (struct task_struct
*child
)
1366 struct ia64_psr
*child_psr
= ia64_psr(ia64_task_regs(child
));
1368 /* make sure the single step/taken-branch trap bits are not set: */
1374 sys_ptrace (long request
, pid_t pid
, unsigned long addr
, unsigned long data
)
1377 unsigned long urbs_end
, peek_or_poke
;
1378 struct task_struct
*child
;
1379 struct switch_stack
*sw
;
1384 if (request
== PTRACE_TRACEME
) {
1385 /* are we already being traced? */
1386 if (current
->ptrace
& PT_PTRACED
)
1388 ret
= security_ptrace(current
->parent
, current
);
1391 current
->ptrace
|= PT_PTRACED
;
1396 peek_or_poke
= (request
== PTRACE_PEEKTEXT
1397 || request
== PTRACE_PEEKDATA
1398 || request
== PTRACE_POKETEXT
1399 || request
== PTRACE_POKEDATA
);
1401 read_lock(&tasklist_lock
);
1403 child
= find_task_by_pid(pid
);
1406 child
= find_thread_for_addr(child
, addr
);
1407 get_task_struct(child
);
1410 read_unlock(&tasklist_lock
);
1414 if (pid
== 1) /* no messing around with init! */
1417 if (request
== PTRACE_ATTACH
) {
1418 ret
= ptrace_attach(child
);
1422 ret
= ptrace_check_attach(child
, request
== PTRACE_KILL
);
1426 pt
= ia64_task_regs(child
);
1427 sw
= (struct switch_stack
*) (child
->thread
.ksp
+ 16);
1430 case PTRACE_PEEKTEXT
:
1431 case PTRACE_PEEKDATA
:
1432 /* read word at location addr */
1433 urbs_end
= ia64_get_user_rbs_end(child
, pt
, NULL
);
1434 ret
= ia64_peek(child
, sw
, urbs_end
, addr
, &data
);
1437 /* ensure "ret" is not mistaken as an error code: */
1438 force_successful_syscall_return();
1442 case PTRACE_POKETEXT
:
1443 case PTRACE_POKEDATA
:
1444 /* write the word at location addr */
1445 urbs_end
= ia64_get_user_rbs_end(child
, pt
, NULL
);
1446 ret
= ia64_poke(child
, sw
, urbs_end
, addr
, data
);
1449 case PTRACE_PEEKUSR
:
1450 /* read the word at addr in the USER area */
1451 if (access_uarea(child
, addr
, &data
, 0) < 0) {
1456 /* ensure "ret" is not mistaken as an error code */
1457 force_successful_syscall_return();
1460 case PTRACE_POKEUSR
:
1461 /* write the word at addr in the USER area */
1462 if (access_uarea(child
, addr
, &data
, 1) < 0) {
1469 case PTRACE_OLD_GETSIGINFO
:
1470 /* for backwards-compatibility */
1471 ret
= ptrace_request(child
, PTRACE_GETSIGINFO
, addr
, data
);
1474 case PTRACE_OLD_SETSIGINFO
:
1475 /* for backwards-compatibility */
1476 ret
= ptrace_request(child
, PTRACE_SETSIGINFO
, addr
, data
);
1479 case PTRACE_SYSCALL
:
1480 /* continue and stop at next (return from) syscall */
1482 /* restart after signal. */
1486 if (request
== PTRACE_SYSCALL
)
1487 set_tsk_thread_flag(child
, TIF_SYSCALL_TRACE
);
1489 clear_tsk_thread_flag(child
, TIF_SYSCALL_TRACE
);
1490 child
->exit_code
= data
;
1493 * Make sure the single step/taken-branch trap bits
1496 ia64_psr(pt
)->ss
= 0;
1497 ia64_psr(pt
)->tb
= 0;
1499 wake_up_process(child
);
1505 * Make the child exit. Best I can do is send it a
1506 * sigkill. Perhaps it should be put in the status
1507 * that it wants to exit.
1509 if (child
->exit_state
== EXIT_ZOMBIE
)
1512 child
->exit_code
= SIGKILL
;
1514 ptrace_disable(child
);
1515 wake_up_process(child
);
1519 case PTRACE_SINGLESTEP
:
1520 /* let child execute for one instruction */
1521 case PTRACE_SINGLEBLOCK
:
1526 clear_tsk_thread_flag(child
, TIF_SYSCALL_TRACE
);
1527 if (request
== PTRACE_SINGLESTEP
) {
1528 ia64_psr(pt
)->ss
= 1;
1530 ia64_psr(pt
)->tb
= 1;
1532 child
->exit_code
= data
;
1534 /* give it a chance to run. */
1535 wake_up_process(child
);
1540 /* detach a process that was attached. */
1541 ret
= ptrace_detach(child
, data
);
1544 case PTRACE_GETREGS
:
1545 ret
= ptrace_getregs(child
,
1546 (struct pt_all_user_regs __user
*) data
);
1549 case PTRACE_SETREGS
:
1550 ret
= ptrace_setregs(child
,
1551 (struct pt_all_user_regs __user
*) data
);
1555 ret
= ptrace_request(child
, request
, addr
, data
);
1559 put_task_struct(child
);
1567 syscall_trace (void)
1569 if (!test_thread_flag(TIF_SYSCALL_TRACE
))
1571 if (!(current
->ptrace
& PT_PTRACED
))
1574 * The 0x80 provides a way for the tracing parent to
1575 * distinguish between a syscall stop and SIGTRAP delivery.
1577 ptrace_notify(SIGTRAP
1578 | ((current
->ptrace
& PT_TRACESYSGOOD
) ? 0x80 : 0));
1581 * This isn't the same as continuing with a signal, but it
1582 * will do for normal use. strace only continues with a
1583 * signal if the stopping signal is not SIGTRAP. -brl
1585 if (current
->exit_code
) {
1586 send_sig(current
->exit_code
, current
, 1);
1587 current
->exit_code
= 0;
1591 /* "asmlinkage" so the input arguments are preserved... */
1594 syscall_trace_enter (long arg0
, long arg1
, long arg2
, long arg3
,
1595 long arg4
, long arg5
, long arg6
, long arg7
,
1596 struct pt_regs regs
)
1600 if (unlikely(current
->audit_context
)) {
1601 if (IS_IA32_PROCESS(®s
))
1606 audit_syscall_entry(current
, syscall
, arg0
, arg1
, arg2
, arg3
);
1609 if (test_thread_flag(TIF_SYSCALL_TRACE
)
1610 && (current
->ptrace
& PT_PTRACED
))
1614 /* "asmlinkage" so the input arguments are preserved... */
1617 syscall_trace_leave (long arg0
, long arg1
, long arg2
, long arg3
,
1618 long arg4
, long arg5
, long arg6
, long arg7
,
1619 struct pt_regs regs
)
1621 if (unlikely(current
->audit_context
))
1622 audit_syscall_exit(current
, regs
.r8
);
1624 if (test_thread_flag(TIF_SYSCALL_TRACE
)
1625 && (current
->ptrace
& PT_PTRACED
))