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1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_POWERPC_HUGETLB_H
3 #define _ASM_POWERPC_HUGETLB_H
5 #ifdef CONFIG_HUGETLB_PAGE
7 #include <asm-generic/hugetlb.h>
9 extern struct kmem_cache
*hugepte_cache
;
11 #ifdef CONFIG_PPC_BOOK3S_64
13 #include <asm/book3s/64/hugetlb.h>
15 * This should work for other subarchs too. But right now we use the
16 * new format only for 64bit book3s
18 static inline pte_t
*hugepd_page(hugepd_t hpd
)
20 BUG_ON(!hugepd_ok(hpd
));
22 * We have only four bits to encode, MMU page size
24 BUILD_BUG_ON((MMU_PAGE_COUNT
- 1) > 0xf);
25 return __va(hpd_val(hpd
) & HUGEPD_ADDR_MASK
);
28 static inline unsigned int hugepd_mmu_psize(hugepd_t hpd
)
30 return (hpd_val(hpd
) & HUGEPD_SHIFT_MASK
) >> 2;
33 static inline unsigned int hugepd_shift(hugepd_t hpd
)
35 return mmu_psize_to_shift(hugepd_mmu_psize(hpd
));
37 static inline void flush_hugetlb_page(struct vm_area_struct
*vma
,
41 return radix__flush_hugetlb_page(vma
, vmaddr
);
44 static inline void __local_flush_hugetlb_page(struct vm_area_struct
*vma
,
48 return radix__local_flush_hugetlb_page(vma
, vmaddr
);
52 static inline pte_t
*hugepd_page(hugepd_t hpd
)
54 BUG_ON(!hugepd_ok(hpd
));
56 return (pte_t
*)__va(hpd_val(hpd
) &
57 ~(_PMD_PAGE_MASK
| _PMD_PRESENT_MASK
));
59 return (pte_t
*)((hpd_val(hpd
) &
60 ~HUGEPD_SHIFT_MASK
) | PD_HUGE
);
64 static inline unsigned int hugepd_shift(hugepd_t hpd
)
67 return ((hpd_val(hpd
) & _PMD_PAGE_MASK
) >> 1) + 17;
69 return hpd_val(hpd
) & HUGEPD_SHIFT_MASK
;
73 #endif /* CONFIG_PPC_BOOK3S_64 */
76 static inline pte_t
*hugepte_offset(hugepd_t hpd
, unsigned long addr
,
80 * On FSL BookE, we have multiple higher-level table entries that
81 * point to the same hugepte. Just use the first one since they're all
82 * identical. So for that case, idx=0.
84 unsigned long idx
= 0;
86 pte_t
*dir
= hugepd_page(hpd
);
87 #ifndef CONFIG_PPC_FSL_BOOK3E
88 idx
= (addr
& ((1UL << pdshift
) - 1)) >> hugepd_shift(hpd
);
94 pte_t
*huge_pte_offset_and_shift(struct mm_struct
*mm
,
95 unsigned long addr
, unsigned *shift
);
97 void flush_dcache_icache_hugepage(struct page
*page
);
99 #if defined(CONFIG_PPC_MM_SLICES)
100 int is_hugepage_only_range(struct mm_struct
*mm
, unsigned long addr
,
103 static inline int is_hugepage_only_range(struct mm_struct
*mm
,
111 void book3e_hugetlb_preload(struct vm_area_struct
*vma
, unsigned long ea
,
113 #ifdef CONFIG_PPC_8xx
114 static inline void flush_hugetlb_page(struct vm_area_struct
*vma
,
115 unsigned long vmaddr
)
117 flush_tlb_page(vma
, vmaddr
);
120 void flush_hugetlb_page(struct vm_area_struct
*vma
, unsigned long vmaddr
);
123 void hugetlb_free_pgd_range(struct mmu_gather
*tlb
, unsigned long addr
,
124 unsigned long end
, unsigned long floor
,
125 unsigned long ceiling
);
128 * The version of vma_mmu_pagesize() in arch/powerpc/mm/hugetlbpage.c needs
129 * to override the version in mm/hugetlb.c
131 #define vma_mmu_pagesize vma_mmu_pagesize
134 * If the arch doesn't supply something else, assume that hugepage
135 * size aligned regions are ok without further preparation.
137 static inline int prepare_hugepage_range(struct file
*file
,
138 unsigned long addr
, unsigned long len
)
140 struct hstate
*h
= hstate_file(file
);
141 if (len
& ~huge_page_mask(h
))
143 if (addr
& ~huge_page_mask(h
))
148 static inline void set_huge_pte_at(struct mm_struct
*mm
, unsigned long addr
,
149 pte_t
*ptep
, pte_t pte
)
151 set_pte_at(mm
, addr
, ptep
, pte
);
154 static inline pte_t
huge_ptep_get_and_clear(struct mm_struct
*mm
,
155 unsigned long addr
, pte_t
*ptep
)
158 return __pte(pte_update(mm
, addr
, ptep
, ~0UL, 0, 1));
160 return __pte(pte_update(ptep
, ~0UL, 0));
164 static inline void huge_ptep_clear_flush(struct vm_area_struct
*vma
,
165 unsigned long addr
, pte_t
*ptep
)
168 pte
= huge_ptep_get_and_clear(vma
->vm_mm
, addr
, ptep
);
169 flush_hugetlb_page(vma
, addr
);
172 static inline int huge_pte_none(pte_t pte
)
174 return pte_none(pte
);
177 static inline pte_t
huge_pte_wrprotect(pte_t pte
)
179 return pte_wrprotect(pte
);
182 static inline int huge_ptep_set_access_flags(struct vm_area_struct
*vma
,
183 unsigned long addr
, pte_t
*ptep
,
184 pte_t pte
, int dirty
)
186 #ifdef HUGETLB_NEED_PRELOAD
188 * The "return 1" forces a call of update_mmu_cache, which will write a
189 * TLB entry. Without this, platforms that don't do a write of the TLB
190 * entry in the TLB miss handler asm will fault ad infinitum.
192 ptep_set_access_flags(vma
, addr
, ptep
, pte
, dirty
);
195 return ptep_set_access_flags(vma
, addr
, ptep
, pte
, dirty
);
199 static inline pte_t
huge_ptep_get(pte_t
*ptep
)
204 static inline void arch_clear_hugepage_flags(struct page
*page
)
208 #else /* ! CONFIG_HUGETLB_PAGE */
209 static inline void flush_hugetlb_page(struct vm_area_struct
*vma
,
210 unsigned long vmaddr
)
214 #define hugepd_shift(x) 0
215 static inline pte_t
*hugepte_offset(hugepd_t hpd
, unsigned long addr
,
220 #endif /* CONFIG_HUGETLB_PAGE */
222 #endif /* _ASM_POWERPC_HUGETLB_H */