1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_I8259_H
3 #define _ASM_X86_I8259_H
5 #include <linux/delay.h>
8 extern unsigned int cached_irq_mask
;
10 #define __byte(x, y) (((unsigned char *)&(y))[x])
11 #define cached_master_mask (__byte(0, cached_irq_mask))
12 #define cached_slave_mask (__byte(1, cached_irq_mask))
14 /* i8259A PIC registers */
15 #define PIC_MASTER_CMD 0x20
16 #define PIC_MASTER_IMR 0x21
17 #define PIC_MASTER_ISR PIC_MASTER_CMD
18 #define PIC_MASTER_POLL PIC_MASTER_ISR
19 #define PIC_MASTER_OCW3 PIC_MASTER_ISR
20 #define PIC_SLAVE_CMD 0xa0
21 #define PIC_SLAVE_IMR 0xa1
23 /* i8259A PIC related value */
24 #define PIC_CASCADE_IR 2
25 #define MASTER_ICW4_DEFAULT 0x01
26 #define SLAVE_ICW4_DEFAULT 0x01
27 #define PIC_ICW4_AEOI 2
29 extern raw_spinlock_t i8259A_lock
;
31 /* the PIC may need a careful delay on some platforms, hence specific calls */
32 static inline unsigned char inb_pic(unsigned int port
)
34 unsigned char value
= inb(port
);
37 * delay for some accesses to PIC on motherboard or in chipset
38 * must be at least one microsecond, so be safe here:
45 static inline void outb_pic(unsigned char value
, unsigned int port
)
49 * delay for some accesses to PIC on motherboard or in chipset
50 * must be at least one microsecond, so be safe here:
55 extern struct irq_chip i8259A_chip
;
59 struct irq_chip
*chip
;
60 void (*mask
)(unsigned int irq
);
61 void (*unmask
)(unsigned int irq
);
62 void (*mask_all
)(void);
63 void (*restore_mask
)(void);
64 void (*init
)(int auto_eoi
);
66 int (*irq_pending
)(unsigned int irq
);
67 void (*make_irq
)(unsigned int irq
);
70 extern struct legacy_pic
*legacy_pic
;
71 extern struct legacy_pic null_legacy_pic
;
73 static inline bool has_legacy_pic(void)
75 return legacy_pic
!= &null_legacy_pic
;
78 static inline int nr_legacy_irqs(void)
80 return legacy_pic
->nr_legacy_irqs
;
83 #endif /* _ASM_X86_I8259_H */