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1 /*
2 * Intel CPU Microcode Update Driver for Linux
3 *
4 * Copyright (C) 2000-2006 Tigran Aivazian <aivazian.tigran@gmail.com>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
6 *
7 * Intel CPU microcode early update for Linux
8 *
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18 /*
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
21 *
22 *#define DEBUG
23 */
24 #define pr_fmt(fmt) "microcode: " fmt
25
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/cpu.h>
34 #include <linux/mm.h>
35
36 #include <asm/microcode_intel.h>
37 #include <asm/intel-family.h>
38 #include <asm/processor.h>
39 #include <asm/tlbflush.h>
40 #include <asm/setup.h>
41 #include <asm/msr.h>
42
43 static const char ucode_path[] = "kernel/x86/microcode/GenuineIntel.bin";
44
45 /* Current microcode patch used in early patching on the APs. */
46 static struct microcode_intel *intel_ucode_patch;
47
48 static inline bool cpu_signatures_match(unsigned int s1, unsigned int p1,
49 unsigned int s2, unsigned int p2)
50 {
51 if (s1 != s2)
52 return false;
53
54 /* Processor flags are either both 0 ... */
55 if (!p1 && !p2)
56 return true;
57
58 /* ... or they intersect. */
59 return p1 & p2;
60 }
61
62 /*
63 * Returns 1 if update has been found, 0 otherwise.
64 */
65 static int find_matching_signature(void *mc, unsigned int csig, int cpf)
66 {
67 struct microcode_header_intel *mc_hdr = mc;
68 struct extended_sigtable *ext_hdr;
69 struct extended_signature *ext_sig;
70 int i;
71
72 if (cpu_signatures_match(csig, cpf, mc_hdr->sig, mc_hdr->pf))
73 return 1;
74
75 /* Look for ext. headers: */
76 if (get_totalsize(mc_hdr) <= get_datasize(mc_hdr) + MC_HEADER_SIZE)
77 return 0;
78
79 ext_hdr = mc + get_datasize(mc_hdr) + MC_HEADER_SIZE;
80 ext_sig = (void *)ext_hdr + EXT_HEADER_SIZE;
81
82 for (i = 0; i < ext_hdr->count; i++) {
83 if (cpu_signatures_match(csig, cpf, ext_sig->sig, ext_sig->pf))
84 return 1;
85 ext_sig++;
86 }
87 return 0;
88 }
89
90 /*
91 * Returns 1 if update has been found, 0 otherwise.
92 */
93 static int has_newer_microcode(void *mc, unsigned int csig, int cpf, int new_rev)
94 {
95 struct microcode_header_intel *mc_hdr = mc;
96
97 if (mc_hdr->rev <= new_rev)
98 return 0;
99
100 return find_matching_signature(mc, csig, cpf);
101 }
102
103 /*
104 * Given CPU signature and a microcode patch, this function finds if the
105 * microcode patch has matching family and model with the CPU.
106 *
107 * %true - if there's a match
108 * %false - otherwise
109 */
110 static bool microcode_matches(struct microcode_header_intel *mc_header,
111 unsigned long sig)
112 {
113 unsigned long total_size = get_totalsize(mc_header);
114 unsigned long data_size = get_datasize(mc_header);
115 struct extended_sigtable *ext_header;
116 unsigned int fam_ucode, model_ucode;
117 struct extended_signature *ext_sig;
118 unsigned int fam, model;
119 int ext_sigcount, i;
120
121 fam = x86_family(sig);
122 model = x86_model(sig);
123
124 fam_ucode = x86_family(mc_header->sig);
125 model_ucode = x86_model(mc_header->sig);
126
127 if (fam == fam_ucode && model == model_ucode)
128 return true;
129
130 /* Look for ext. headers: */
131 if (total_size <= data_size + MC_HEADER_SIZE)
132 return false;
133
134 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
135 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
136 ext_sigcount = ext_header->count;
137
138 for (i = 0; i < ext_sigcount; i++) {
139 fam_ucode = x86_family(ext_sig->sig);
140 model_ucode = x86_model(ext_sig->sig);
141
142 if (fam == fam_ucode && model == model_ucode)
143 return true;
144
145 ext_sig++;
146 }
147 return false;
148 }
149
150 static struct ucode_patch *memdup_patch(void *data, unsigned int size)
151 {
152 struct ucode_patch *p;
153
154 p = kzalloc(sizeof(struct ucode_patch), GFP_KERNEL);
155 if (!p)
156 return NULL;
157
158 p->data = kmemdup(data, size, GFP_KERNEL);
159 if (!p->data) {
160 kfree(p);
161 return NULL;
162 }
163
164 return p;
165 }
166
167 static void save_microcode_patch(void *data, unsigned int size)
168 {
169 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
170 struct ucode_patch *iter, *tmp, *p = NULL;
171 bool prev_found = false;
172 unsigned int sig, pf;
173
174 mc_hdr = (struct microcode_header_intel *)data;
175
176 list_for_each_entry_safe(iter, tmp, &microcode_cache, plist) {
177 mc_saved_hdr = (struct microcode_header_intel *)iter->data;
178 sig = mc_saved_hdr->sig;
179 pf = mc_saved_hdr->pf;
180
181 if (find_matching_signature(data, sig, pf)) {
182 prev_found = true;
183
184 if (mc_hdr->rev <= mc_saved_hdr->rev)
185 continue;
186
187 p = memdup_patch(data, size);
188 if (!p)
189 pr_err("Error allocating buffer %p\n", data);
190 else
191 list_replace(&iter->plist, &p->plist);
192 }
193 }
194
195 /*
196 * There weren't any previous patches found in the list cache; save the
197 * newly found.
198 */
199 if (!prev_found) {
200 p = memdup_patch(data, size);
201 if (!p)
202 pr_err("Error allocating buffer for %p\n", data);
203 else
204 list_add_tail(&p->plist, &microcode_cache);
205 }
206
207 if (!p)
208 return;
209
210 /*
211 * Save for early loading. On 32-bit, that needs to be a physical
212 * address as the APs are running from physical addresses, before
213 * paging has been enabled.
214 */
215 if (IS_ENABLED(CONFIG_X86_32))
216 intel_ucode_patch = (struct microcode_intel *)__pa_nodebug(p->data);
217 else
218 intel_ucode_patch = p->data;
219 }
220
221 static int microcode_sanity_check(void *mc, int print_err)
222 {
223 unsigned long total_size, data_size, ext_table_size;
224 struct microcode_header_intel *mc_header = mc;
225 struct extended_sigtable *ext_header = NULL;
226 u32 sum, orig_sum, ext_sigcount = 0, i;
227 struct extended_signature *ext_sig;
228
229 total_size = get_totalsize(mc_header);
230 data_size = get_datasize(mc_header);
231
232 if (data_size + MC_HEADER_SIZE > total_size) {
233 if (print_err)
234 pr_err("Error: bad microcode data file size.\n");
235 return -EINVAL;
236 }
237
238 if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
239 if (print_err)
240 pr_err("Error: invalid/unknown microcode update format.\n");
241 return -EINVAL;
242 }
243
244 ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
245 if (ext_table_size) {
246 u32 ext_table_sum = 0;
247 u32 *ext_tablep;
248
249 if ((ext_table_size < EXT_HEADER_SIZE)
250 || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
251 if (print_err)
252 pr_err("Error: truncated extended signature table.\n");
253 return -EINVAL;
254 }
255
256 ext_header = mc + MC_HEADER_SIZE + data_size;
257 if (ext_table_size != exttable_size(ext_header)) {
258 if (print_err)
259 pr_err("Error: extended signature table size mismatch.\n");
260 return -EFAULT;
261 }
262
263 ext_sigcount = ext_header->count;
264
265 /*
266 * Check extended table checksum: the sum of all dwords that
267 * comprise a valid table must be 0.
268 */
269 ext_tablep = (u32 *)ext_header;
270
271 i = ext_table_size / sizeof(u32);
272 while (i--)
273 ext_table_sum += ext_tablep[i];
274
275 if (ext_table_sum) {
276 if (print_err)
277 pr_warn("Bad extended signature table checksum, aborting.\n");
278 return -EINVAL;
279 }
280 }
281
282 /*
283 * Calculate the checksum of update data and header. The checksum of
284 * valid update data and header including the extended signature table
285 * must be 0.
286 */
287 orig_sum = 0;
288 i = (MC_HEADER_SIZE + data_size) / sizeof(u32);
289 while (i--)
290 orig_sum += ((u32 *)mc)[i];
291
292 if (orig_sum) {
293 if (print_err)
294 pr_err("Bad microcode data checksum, aborting.\n");
295 return -EINVAL;
296 }
297
298 if (!ext_table_size)
299 return 0;
300
301 /*
302 * Check extended signature checksum: 0 => valid.
303 */
304 for (i = 0; i < ext_sigcount; i++) {
305 ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
306 EXT_SIGNATURE_SIZE * i;
307
308 sum = (mc_header->sig + mc_header->pf + mc_header->cksum) -
309 (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
310 if (sum) {
311 if (print_err)
312 pr_err("Bad extended signature checksum, aborting.\n");
313 return -EINVAL;
314 }
315 }
316 return 0;
317 }
318
319 /*
320 * Get microcode matching with BSP's model. Only CPUs with the same model as
321 * BSP can stay in the platform.
322 */
323 static struct microcode_intel *
324 scan_microcode(void *data, size_t size, struct ucode_cpu_info *uci, bool save)
325 {
326 struct microcode_header_intel *mc_header;
327 struct microcode_intel *patch = NULL;
328 unsigned int mc_size;
329
330 while (size) {
331 if (size < sizeof(struct microcode_header_intel))
332 break;
333
334 mc_header = (struct microcode_header_intel *)data;
335
336 mc_size = get_totalsize(mc_header);
337 if (!mc_size ||
338 mc_size > size ||
339 microcode_sanity_check(data, 0) < 0)
340 break;
341
342 size -= mc_size;
343
344 if (!microcode_matches(mc_header, uci->cpu_sig.sig)) {
345 data += mc_size;
346 continue;
347 }
348
349 if (save) {
350 save_microcode_patch(data, mc_size);
351 goto next;
352 }
353
354
355 if (!patch) {
356 if (!has_newer_microcode(data,
357 uci->cpu_sig.sig,
358 uci->cpu_sig.pf,
359 uci->cpu_sig.rev))
360 goto next;
361
362 } else {
363 struct microcode_header_intel *phdr = &patch->hdr;
364
365 if (!has_newer_microcode(data,
366 phdr->sig,
367 phdr->pf,
368 phdr->rev))
369 goto next;
370 }
371
372 /* We have a newer patch, save it. */
373 patch = data;
374
375 next:
376 data += mc_size;
377 }
378
379 if (size)
380 return NULL;
381
382 return patch;
383 }
384
385 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
386 {
387 unsigned int val[2];
388 unsigned int family, model;
389 struct cpu_signature csig = { 0 };
390 unsigned int eax, ebx, ecx, edx;
391
392 memset(uci, 0, sizeof(*uci));
393
394 eax = 0x00000001;
395 ecx = 0;
396 native_cpuid(&eax, &ebx, &ecx, &edx);
397 csig.sig = eax;
398
399 family = x86_family(eax);
400 model = x86_model(eax);
401
402 if ((model >= 5) || (family > 6)) {
403 /* get processor flags from MSR 0x17 */
404 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
405 csig.pf = 1 << ((val[1] >> 18) & 7);
406 }
407
408 csig.rev = intel_get_microcode_revision();
409
410 uci->cpu_sig = csig;
411 uci->valid = 1;
412
413 return 0;
414 }
415
416 static void show_saved_mc(void)
417 {
418 #ifdef DEBUG
419 int i = 0, j;
420 unsigned int sig, pf, rev, total_size, data_size, date;
421 struct ucode_cpu_info uci;
422 struct ucode_patch *p;
423
424 if (list_empty(&microcode_cache)) {
425 pr_debug("no microcode data saved.\n");
426 return;
427 }
428
429 collect_cpu_info_early(&uci);
430
431 sig = uci.cpu_sig.sig;
432 pf = uci.cpu_sig.pf;
433 rev = uci.cpu_sig.rev;
434 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
435
436 list_for_each_entry(p, &microcode_cache, plist) {
437 struct microcode_header_intel *mc_saved_header;
438 struct extended_sigtable *ext_header;
439 struct extended_signature *ext_sig;
440 int ext_sigcount;
441
442 mc_saved_header = (struct microcode_header_intel *)p->data;
443
444 sig = mc_saved_header->sig;
445 pf = mc_saved_header->pf;
446 rev = mc_saved_header->rev;
447 date = mc_saved_header->date;
448
449 total_size = get_totalsize(mc_saved_header);
450 data_size = get_datasize(mc_saved_header);
451
452 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
453 i++, sig, pf, rev, total_size,
454 date & 0xffff,
455 date >> 24,
456 (date >> 16) & 0xff);
457
458 /* Look for ext. headers: */
459 if (total_size <= data_size + MC_HEADER_SIZE)
460 continue;
461
462 ext_header = (void *)mc_saved_header + data_size + MC_HEADER_SIZE;
463 ext_sigcount = ext_header->count;
464 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
465
466 for (j = 0; j < ext_sigcount; j++) {
467 sig = ext_sig->sig;
468 pf = ext_sig->pf;
469
470 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
471 j, sig, pf);
472
473 ext_sig++;
474 }
475 }
476 #endif
477 }
478
479 /*
480 * Save this microcode patch. It will be loaded early when a CPU is
481 * hot-added or resumes.
482 */
483 static void save_mc_for_early(u8 *mc, unsigned int size)
484 {
485 #ifdef CONFIG_HOTPLUG_CPU
486 /* Synchronization during CPU hotplug. */
487 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
488
489 mutex_lock(&x86_cpu_microcode_mutex);
490
491 save_microcode_patch(mc, size);
492 show_saved_mc();
493
494 mutex_unlock(&x86_cpu_microcode_mutex);
495 #endif
496 }
497
498 static bool load_builtin_intel_microcode(struct cpio_data *cp)
499 {
500 unsigned int eax = 1, ebx, ecx = 0, edx;
501 char name[30];
502
503 if (IS_ENABLED(CONFIG_X86_32))
504 return false;
505
506 native_cpuid(&eax, &ebx, &ecx, &edx);
507
508 sprintf(name, "intel-ucode/%02x-%02x-%02x",
509 x86_family(eax), x86_model(eax), x86_stepping(eax));
510
511 return get_builtin_firmware(cp, name);
512 }
513
514 /*
515 * Print ucode update info.
516 */
517 static void
518 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
519 {
520 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
521 uci->cpu_sig.rev,
522 date & 0xffff,
523 date >> 24,
524 (date >> 16) & 0xff);
525 }
526
527 #ifdef CONFIG_X86_32
528
529 static int delay_ucode_info;
530 static int current_mc_date;
531
532 /*
533 * Print early updated ucode info after printk works. This is delayed info dump.
534 */
535 void show_ucode_info_early(void)
536 {
537 struct ucode_cpu_info uci;
538
539 if (delay_ucode_info) {
540 collect_cpu_info_early(&uci);
541 print_ucode_info(&uci, current_mc_date);
542 delay_ucode_info = 0;
543 }
544 }
545
546 /*
547 * At this point, we can not call printk() yet. Delay printing microcode info in
548 * show_ucode_info_early() until printk() works.
549 */
550 static void print_ucode(struct ucode_cpu_info *uci)
551 {
552 struct microcode_intel *mc;
553 int *delay_ucode_info_p;
554 int *current_mc_date_p;
555
556 mc = uci->mc;
557 if (!mc)
558 return;
559
560 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
561 current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
562
563 *delay_ucode_info_p = 1;
564 *current_mc_date_p = mc->hdr.date;
565 }
566 #else
567
568 static inline void print_ucode(struct ucode_cpu_info *uci)
569 {
570 struct microcode_intel *mc;
571
572 mc = uci->mc;
573 if (!mc)
574 return;
575
576 print_ucode_info(uci, mc->hdr.date);
577 }
578 #endif
579
580 static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
581 {
582 struct microcode_intel *mc;
583 u32 rev;
584
585 mc = uci->mc;
586 if (!mc)
587 return 0;
588
589 /* write microcode via MSR 0x79 */
590 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
591
592 rev = intel_get_microcode_revision();
593 if (rev != mc->hdr.rev)
594 return -1;
595
596 uci->cpu_sig.rev = rev;
597
598 if (early)
599 print_ucode(uci);
600 else
601 print_ucode_info(uci, mc->hdr.date);
602
603 return 0;
604 }
605
606 int __init save_microcode_in_initrd_intel(void)
607 {
608 struct ucode_cpu_info uci;
609 struct cpio_data cp;
610
611 /*
612 * initrd is going away, clear patch ptr. We will scan the microcode one
613 * last time before jettisoning and save a patch, if found. Then we will
614 * update that pointer too, with a stable patch address to use when
615 * resuming the cores.
616 */
617 intel_ucode_patch = NULL;
618
619 if (!load_builtin_intel_microcode(&cp))
620 cp = find_microcode_in_initrd(ucode_path, false);
621
622 if (!(cp.data && cp.size))
623 return 0;
624
625 collect_cpu_info_early(&uci);
626
627 scan_microcode(cp.data, cp.size, &uci, true);
628
629 show_saved_mc();
630
631 return 0;
632 }
633
634 /*
635 * @res_patch, output: a pointer to the patch we found.
636 */
637 static struct microcode_intel *__load_ucode_intel(struct ucode_cpu_info *uci)
638 {
639 static const char *path;
640 struct cpio_data cp;
641 bool use_pa;
642
643 if (IS_ENABLED(CONFIG_X86_32)) {
644 path = (const char *)__pa_nodebug(ucode_path);
645 use_pa = true;
646 } else {
647 path = ucode_path;
648 use_pa = false;
649 }
650
651 /* try built-in microcode first */
652 if (!load_builtin_intel_microcode(&cp))
653 cp = find_microcode_in_initrd(path, use_pa);
654
655 if (!(cp.data && cp.size))
656 return NULL;
657
658 collect_cpu_info_early(uci);
659
660 return scan_microcode(cp.data, cp.size, uci, false);
661 }
662
663 void __init load_ucode_intel_bsp(void)
664 {
665 struct microcode_intel *patch;
666 struct ucode_cpu_info uci;
667
668 patch = __load_ucode_intel(&uci);
669 if (!patch)
670 return;
671
672 uci.mc = patch;
673
674 apply_microcode_early(&uci, true);
675 }
676
677 void load_ucode_intel_ap(void)
678 {
679 struct microcode_intel *patch, **iup;
680 struct ucode_cpu_info uci;
681
682 if (IS_ENABLED(CONFIG_X86_32))
683 iup = (struct microcode_intel **) __pa_nodebug(&intel_ucode_patch);
684 else
685 iup = &intel_ucode_patch;
686
687 reget:
688 if (!*iup) {
689 patch = __load_ucode_intel(&uci);
690 if (!patch)
691 return;
692
693 *iup = patch;
694 }
695
696 uci.mc = *iup;
697
698 if (apply_microcode_early(&uci, true)) {
699 /* Mixed-silicon system? Try to refetch the proper patch: */
700 *iup = NULL;
701
702 goto reget;
703 }
704 }
705
706 static struct microcode_intel *find_patch(struct ucode_cpu_info *uci)
707 {
708 struct microcode_header_intel *phdr;
709 struct ucode_patch *iter, *tmp;
710
711 list_for_each_entry_safe(iter, tmp, &microcode_cache, plist) {
712
713 phdr = (struct microcode_header_intel *)iter->data;
714
715 if (phdr->rev <= uci->cpu_sig.rev)
716 continue;
717
718 if (!find_matching_signature(phdr,
719 uci->cpu_sig.sig,
720 uci->cpu_sig.pf))
721 continue;
722
723 return iter->data;
724 }
725 return NULL;
726 }
727
728 void reload_ucode_intel(void)
729 {
730 struct microcode_intel *p;
731 struct ucode_cpu_info uci;
732
733 collect_cpu_info_early(&uci);
734
735 p = find_patch(&uci);
736 if (!p)
737 return;
738
739 uci.mc = p;
740
741 apply_microcode_early(&uci, false);
742 }
743
744 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
745 {
746 static struct cpu_signature prev;
747 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
748 unsigned int val[2];
749
750 memset(csig, 0, sizeof(*csig));
751
752 csig->sig = cpuid_eax(0x00000001);
753
754 if ((c->x86_model >= 5) || (c->x86 > 6)) {
755 /* get processor flags from MSR 0x17 */
756 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
757 csig->pf = 1 << ((val[1] >> 18) & 7);
758 }
759
760 csig->rev = c->microcode;
761
762 /* No extra locking on prev, races are harmless. */
763 if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
764 pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
765 csig->sig, csig->pf, csig->rev);
766 prev = *csig;
767 }
768
769 return 0;
770 }
771
772 static int apply_microcode_intel(int cpu)
773 {
774 struct microcode_intel *mc;
775 struct ucode_cpu_info *uci;
776 struct cpuinfo_x86 *c;
777 static int prev_rev;
778 u32 rev;
779
780 /* We should bind the task to the CPU */
781 if (WARN_ON(raw_smp_processor_id() != cpu))
782 return -1;
783
784 uci = ucode_cpu_info + cpu;
785 mc = uci->mc;
786 if (!mc) {
787 /* Look for a newer patch in our cache: */
788 mc = find_patch(uci);
789 if (!mc)
790 return 0;
791 }
792
793 /* write microcode via MSR 0x79 */
794 wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
795
796 rev = intel_get_microcode_revision();
797
798 if (rev != mc->hdr.rev) {
799 pr_err("CPU%d update to revision 0x%x failed\n",
800 cpu, mc->hdr.rev);
801 return -1;
802 }
803
804 if (rev != prev_rev) {
805 pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
806 rev,
807 mc->hdr.date & 0xffff,
808 mc->hdr.date >> 24,
809 (mc->hdr.date >> 16) & 0xff);
810 prev_rev = rev;
811 }
812
813 c = &cpu_data(cpu);
814
815 uci->cpu_sig.rev = rev;
816 c->microcode = rev;
817
818 return 0;
819 }
820
821 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
822 int (*get_ucode_data)(void *, const void *, size_t))
823 {
824 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
825 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
826 int new_rev = uci->cpu_sig.rev;
827 unsigned int leftover = size;
828 unsigned int curr_mc_size = 0, new_mc_size = 0;
829 unsigned int csig, cpf;
830
831 while (leftover) {
832 struct microcode_header_intel mc_header;
833 unsigned int mc_size;
834
835 if (leftover < sizeof(mc_header)) {
836 pr_err("error! Truncated header in microcode data file\n");
837 break;
838 }
839
840 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
841 break;
842
843 mc_size = get_totalsize(&mc_header);
844 if (!mc_size || mc_size > leftover) {
845 pr_err("error! Bad data in microcode data file\n");
846 break;
847 }
848
849 /* For performance reasons, reuse mc area when possible */
850 if (!mc || mc_size > curr_mc_size) {
851 vfree(mc);
852 mc = vmalloc(mc_size);
853 if (!mc)
854 break;
855 curr_mc_size = mc_size;
856 }
857
858 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
859 microcode_sanity_check(mc, 1) < 0) {
860 break;
861 }
862
863 csig = uci->cpu_sig.sig;
864 cpf = uci->cpu_sig.pf;
865 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
866 vfree(new_mc);
867 new_rev = mc_header.rev;
868 new_mc = mc;
869 new_mc_size = mc_size;
870 mc = NULL; /* trigger new vmalloc */
871 }
872
873 ucode_ptr += mc_size;
874 leftover -= mc_size;
875 }
876
877 vfree(mc);
878
879 if (leftover) {
880 vfree(new_mc);
881 return UCODE_ERROR;
882 }
883
884 if (!new_mc)
885 return UCODE_NFOUND;
886
887 vfree(uci->mc);
888 uci->mc = (struct microcode_intel *)new_mc;
889
890 /*
891 * If early loading microcode is supported, save this mc into
892 * permanent memory. So it will be loaded early when a CPU is hot added
893 * or resumes.
894 */
895 save_mc_for_early(new_mc, new_mc_size);
896
897 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
898 cpu, new_rev, uci->cpu_sig.rev);
899
900 return UCODE_OK;
901 }
902
903 static int get_ucode_fw(void *to, const void *from, size_t n)
904 {
905 memcpy(to, from, n);
906 return 0;
907 }
908
909 static bool is_blacklisted(unsigned int cpu)
910 {
911 struct cpuinfo_x86 *c = &cpu_data(cpu);
912
913 if (c->x86 == 6 && c->x86_model == INTEL_FAM6_BROADWELL_X) {
914 pr_err_once("late loading on model 79 is disabled.\n");
915 return true;
916 }
917
918 return false;
919 }
920
921 static enum ucode_state request_microcode_fw(int cpu, struct device *device,
922 bool refresh_fw)
923 {
924 char name[30];
925 struct cpuinfo_x86 *c = &cpu_data(cpu);
926 const struct firmware *firmware;
927 enum ucode_state ret;
928
929 if (is_blacklisted(cpu))
930 return UCODE_NFOUND;
931
932 sprintf(name, "intel-ucode/%02x-%02x-%02x",
933 c->x86, c->x86_model, c->x86_mask);
934
935 if (request_firmware_direct(&firmware, name, device)) {
936 pr_debug("data file %s load failed\n", name);
937 return UCODE_NFOUND;
938 }
939
940 ret = generic_load_microcode(cpu, (void *)firmware->data,
941 firmware->size, &get_ucode_fw);
942
943 release_firmware(firmware);
944
945 return ret;
946 }
947
948 static int get_ucode_user(void *to, const void *from, size_t n)
949 {
950 return copy_from_user(to, from, n);
951 }
952
953 static enum ucode_state
954 request_microcode_user(int cpu, const void __user *buf, size_t size)
955 {
956 if (is_blacklisted(cpu))
957 return UCODE_NFOUND;
958
959 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
960 }
961
962 static struct microcode_ops microcode_intel_ops = {
963 .request_microcode_user = request_microcode_user,
964 .request_microcode_fw = request_microcode_fw,
965 .collect_cpu_info = collect_cpu_info,
966 .apply_microcode = apply_microcode_intel,
967 };
968
969 struct microcode_ops * __init init_intel_microcode(void)
970 {
971 struct cpuinfo_x86 *c = &boot_cpu_data;
972
973 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
974 cpu_has(c, X86_FEATURE_IA64)) {
975 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
976 return NULL;
977 }
978
979 return &microcode_intel_ops;
980 }