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KVM: MTRR: clean up mtrr default type
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1 /*
2 * vMTRR implementation
3 *
4 * Copyright (C) 2006 Qumranet, Inc.
5 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
6 * Copyright(C) 2015 Intel Corporation.
7 *
8 * Authors:
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
11 * Marcelo Tosatti <mtosatti@redhat.com>
12 * Paolo Bonzini <pbonzini@redhat.com>
13 * Xiao Guangrong <guangrong.xiao@linux.intel.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 */
18
19 #include <linux/kvm_host.h>
20 #include <asm/mtrr.h>
21
22 #include "cpuid.h"
23 #include "mmu.h"
24
25 #define IA32_MTRR_DEF_TYPE_E (1ULL << 11)
26 #define IA32_MTRR_DEF_TYPE_FE (1ULL << 10)
27 #define IA32_MTRR_DEF_TYPE_TYPE_MASK (0xff)
28
29 static bool msr_mtrr_valid(unsigned msr)
30 {
31 switch (msr) {
32 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
33 case MSR_MTRRfix64K_00000:
34 case MSR_MTRRfix16K_80000:
35 case MSR_MTRRfix16K_A0000:
36 case MSR_MTRRfix4K_C0000:
37 case MSR_MTRRfix4K_C8000:
38 case MSR_MTRRfix4K_D0000:
39 case MSR_MTRRfix4K_D8000:
40 case MSR_MTRRfix4K_E0000:
41 case MSR_MTRRfix4K_E8000:
42 case MSR_MTRRfix4K_F0000:
43 case MSR_MTRRfix4K_F8000:
44 case MSR_MTRRdefType:
45 case MSR_IA32_CR_PAT:
46 return true;
47 case 0x2f8:
48 return true;
49 }
50 return false;
51 }
52
53 static bool valid_pat_type(unsigned t)
54 {
55 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
56 }
57
58 static bool valid_mtrr_type(unsigned t)
59 {
60 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
61 }
62
63 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
64 {
65 int i;
66 u64 mask;
67
68 if (!msr_mtrr_valid(msr))
69 return false;
70
71 if (msr == MSR_IA32_CR_PAT) {
72 for (i = 0; i < 8; i++)
73 if (!valid_pat_type((data >> (i * 8)) & 0xff))
74 return false;
75 return true;
76 } else if (msr == MSR_MTRRdefType) {
77 if (data & ~0xcff)
78 return false;
79 return valid_mtrr_type(data & 0xff);
80 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
81 for (i = 0; i < 8 ; i++)
82 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
83 return false;
84 return true;
85 }
86
87 /* variable MTRRs */
88 WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
89
90 mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
91 if ((msr & 1) == 0) {
92 /* MTRR base */
93 if (!valid_mtrr_type(data & 0xff))
94 return false;
95 mask |= 0xf00;
96 } else
97 /* MTRR mask */
98 mask |= 0x7ff;
99 if (data & mask) {
100 kvm_inject_gp(vcpu, 0);
101 return false;
102 }
103
104 return true;
105 }
106 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
107
108 static bool mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
109 {
110 return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_E);
111 }
112
113 static bool fixed_mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
114 {
115 return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_FE);
116 }
117
118 static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)
119 {
120 return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK;
121 }
122
123 static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
124 {
125 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
126 gfn_t start, end, mask;
127 int index;
128 bool is_fixed = true;
129
130 if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
131 !kvm_arch_has_noncoherent_dma(vcpu->kvm))
132 return;
133
134 if (!mtrr_is_enabled(mtrr_state) && msr != MSR_MTRRdefType)
135 return;
136
137 switch (msr) {
138 case MSR_MTRRfix64K_00000:
139 start = 0x0;
140 end = 0x80000;
141 break;
142 case MSR_MTRRfix16K_80000:
143 start = 0x80000;
144 end = 0xa0000;
145 break;
146 case MSR_MTRRfix16K_A0000:
147 start = 0xa0000;
148 end = 0xc0000;
149 break;
150 case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
151 index = msr - MSR_MTRRfix4K_C0000;
152 start = 0xc0000 + index * (32 << 10);
153 end = start + (32 << 10);
154 break;
155 case MSR_MTRRdefType:
156 is_fixed = false;
157 start = 0x0;
158 end = ~0ULL;
159 break;
160 default:
161 /* variable range MTRRs. */
162 is_fixed = false;
163 index = (msr - 0x200) / 2;
164 start = (((u64)mtrr_state->var_ranges[index].base_hi) << 32) +
165 (mtrr_state->var_ranges[index].base_lo & PAGE_MASK);
166 mask = (((u64)mtrr_state->var_ranges[index].mask_hi) << 32) +
167 (mtrr_state->var_ranges[index].mask_lo & PAGE_MASK);
168 mask |= ~0ULL << cpuid_maxphyaddr(vcpu);
169
170 end = ((start & mask) | ~mask) + 1;
171 }
172
173 if (is_fixed && !fixed_mtrr_is_enabled(mtrr_state))
174 return;
175
176 kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
177 }
178
179 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
180 {
181 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
182
183 if (!kvm_mtrr_valid(vcpu, msr, data))
184 return 1;
185
186 if (msr == MSR_MTRRdefType)
187 vcpu->arch.mtrr_state.deftype = data;
188 else if (msr == MSR_MTRRfix64K_00000)
189 p[0] = data;
190 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
191 p[1 + msr - MSR_MTRRfix16K_80000] = data;
192 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
193 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
194 else if (msr == MSR_IA32_CR_PAT)
195 vcpu->arch.pat = data;
196 else { /* Variable MTRRs */
197 int idx, is_mtrr_mask;
198 u64 *pt;
199
200 idx = (msr - 0x200) / 2;
201 is_mtrr_mask = msr - 0x200 - 2 * idx;
202 if (!is_mtrr_mask)
203 pt =
204 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
205 else
206 pt =
207 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
208 *pt = data;
209 }
210
211 update_mtrr(vcpu, msr);
212 return 0;
213 }
214
215 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
216 {
217 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
218
219 /* MSR_MTRRcap is a readonly MSR. */
220 if (msr == MSR_MTRRcap) {
221 /*
222 * SMRR = 0
223 * WC = 1
224 * FIX = 1
225 * VCNT = KVM_NR_VAR_MTRR
226 */
227 *pdata = 0x500 | KVM_NR_VAR_MTRR;
228 return 0;
229 }
230
231 if (!msr_mtrr_valid(msr))
232 return 1;
233
234 if (msr == MSR_MTRRdefType)
235 *pdata = vcpu->arch.mtrr_state.deftype;
236 else if (msr == MSR_MTRRfix64K_00000)
237 *pdata = p[0];
238 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
239 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
240 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
241 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
242 else if (msr == MSR_IA32_CR_PAT)
243 *pdata = vcpu->arch.pat;
244 else { /* Variable MTRRs */
245 int idx, is_mtrr_mask;
246 u64 *pt;
247
248 idx = (msr - 0x200) / 2;
249 is_mtrr_mask = msr - 0x200 - 2 * idx;
250 if (!is_mtrr_mask)
251 pt =
252 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
253 else
254 pt =
255 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
256 *pdata = *pt;
257 }
258
259 return 0;
260 }
261
262 /*
263 * The function is based on mtrr_type_lookup() in
264 * arch/x86/kernel/cpu/mtrr/generic.c
265 */
266 static int get_mtrr_type(struct kvm_mtrr *mtrr_state,
267 u64 start, u64 end)
268 {
269 u64 base, mask;
270 u8 prev_match, curr_match;
271 int i, num_var_ranges = KVM_NR_VAR_MTRR;
272
273 /* MTRR is completely disabled, use UC for all of physical memory. */
274 if (!mtrr_is_enabled(mtrr_state))
275 return MTRR_TYPE_UNCACHABLE;
276
277 /* Make end inclusive end, instead of exclusive */
278 end--;
279
280 /* Look in fixed ranges. Just return the type as per start */
281 if (fixed_mtrr_is_enabled(mtrr_state) && (start < 0x100000)) {
282 int idx;
283
284 if (start < 0x80000) {
285 idx = 0;
286 idx += (start >> 16);
287 return mtrr_state->fixed_ranges[idx];
288 } else if (start < 0xC0000) {
289 idx = 1 * 8;
290 idx += ((start - 0x80000) >> 14);
291 return mtrr_state->fixed_ranges[idx];
292 } else if (start < 0x1000000) {
293 idx = 3 * 8;
294 idx += ((start - 0xC0000) >> 12);
295 return mtrr_state->fixed_ranges[idx];
296 }
297 }
298
299 /*
300 * Look in variable ranges
301 * Look of multiple ranges matching this address and pick type
302 * as per MTRR precedence
303 */
304 prev_match = 0xFF;
305 for (i = 0; i < num_var_ranges; ++i) {
306 unsigned short start_state, end_state;
307
308 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
309 continue;
310
311 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
312 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
313 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
314 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
315
316 start_state = ((start & mask) == (base & mask));
317 end_state = ((end & mask) == (base & mask));
318 if (start_state != end_state)
319 return 0xFE;
320
321 if ((start & mask) != (base & mask))
322 continue;
323
324 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
325 if (prev_match == 0xFF) {
326 prev_match = curr_match;
327 continue;
328 }
329
330 if (prev_match == MTRR_TYPE_UNCACHABLE ||
331 curr_match == MTRR_TYPE_UNCACHABLE)
332 return MTRR_TYPE_UNCACHABLE;
333
334 if ((prev_match == MTRR_TYPE_WRBACK &&
335 curr_match == MTRR_TYPE_WRTHROUGH) ||
336 (prev_match == MTRR_TYPE_WRTHROUGH &&
337 curr_match == MTRR_TYPE_WRBACK)) {
338 prev_match = MTRR_TYPE_WRTHROUGH;
339 curr_match = MTRR_TYPE_WRTHROUGH;
340 }
341
342 if (prev_match != curr_match)
343 return MTRR_TYPE_UNCACHABLE;
344 }
345
346 if (prev_match != 0xFF)
347 return prev_match;
348
349 return mtrr_default_type(mtrr_state);
350 }
351
352 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
353 {
354 u8 mtrr;
355
356 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
357 (gfn << PAGE_SHIFT) + PAGE_SIZE);
358 if (mtrr == 0xfe || mtrr == 0xff)
359 mtrr = MTRR_TYPE_WRBACK;
360 return mtrr;
361 }
362 EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);