2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
33 #include <linux/clocksource.h>
34 #include <linux/interrupt.h>
35 #include <linux/kvm.h>
37 #include <linux/vmalloc.h>
38 #include <linux/export.h>
39 #include <linux/moduleparam.h>
40 #include <linux/mman.h>
41 #include <linux/highmem.h>
42 #include <linux/iommu.h>
43 #include <linux/intel-iommu.h>
44 #include <linux/cpufreq.h>
45 #include <linux/user-return-notifier.h>
46 #include <linux/srcu.h>
47 #include <linux/slab.h>
48 #include <linux/perf_event.h>
49 #include <linux/uaccess.h>
50 #include <linux/hash.h>
51 #include <linux/pci.h>
52 #include <linux/timekeeper_internal.h>
53 #include <linux/pvclock_gtod.h>
54 #include <linux/kvm_irqfd.h>
55 #include <linux/irqbypass.h>
56 #include <linux/sched/stat.h>
58 #include <trace/events/kvm.h>
60 #include <asm/debugreg.h>
64 #include <linux/kernel_stat.h>
65 #include <asm/fpu/internal.h> /* Ugh! */
66 #include <asm/pvclock.h>
67 #include <asm/div64.h>
68 #include <asm/irq_remapping.h>
70 #define CREATE_TRACE_POINTS
73 #define MAX_IO_MSRS 256
74 #define KVM_MAX_MCE_BANKS 32
75 u64 __read_mostly kvm_mce_cap_supported
= MCG_CTL_P
| MCG_SER_P
;
76 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported
);
78 #define emul_to_vcpu(ctxt) \
79 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
82 * - enable syscall per default because its emulated by KVM
83 * - enable LME and LMA per default on 64 bit KVM
87 u64 __read_mostly efer_reserved_bits
= ~((u64
)(EFER_SCE
| EFER_LME
| EFER_LMA
));
89 static u64 __read_mostly efer_reserved_bits
= ~((u64
)EFER_SCE
);
92 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
93 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
95 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
96 KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
98 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
99 static void process_nmi(struct kvm_vcpu
*vcpu
);
100 static void enter_smm(struct kvm_vcpu
*vcpu
);
101 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
);
103 struct kvm_x86_ops
*kvm_x86_ops __read_mostly
;
104 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
106 static bool __read_mostly ignore_msrs
= 0;
107 module_param(ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
109 unsigned int min_timer_period_us
= 500;
110 module_param(min_timer_period_us
, uint
, S_IRUGO
| S_IWUSR
);
112 static bool __read_mostly kvmclock_periodic_sync
= true;
113 module_param(kvmclock_periodic_sync
, bool, S_IRUGO
);
115 bool __read_mostly kvm_has_tsc_control
;
116 EXPORT_SYMBOL_GPL(kvm_has_tsc_control
);
117 u32 __read_mostly kvm_max_guest_tsc_khz
;
118 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz
);
119 u8 __read_mostly kvm_tsc_scaling_ratio_frac_bits
;
120 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits
);
121 u64 __read_mostly kvm_max_tsc_scaling_ratio
;
122 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio
);
123 u64 __read_mostly kvm_default_tsc_scaling_ratio
;
124 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio
);
126 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
127 static u32 __read_mostly tsc_tolerance_ppm
= 250;
128 module_param(tsc_tolerance_ppm
, uint
, S_IRUGO
| S_IWUSR
);
130 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
131 unsigned int __read_mostly lapic_timer_advance_ns
= 0;
132 module_param(lapic_timer_advance_ns
, uint
, S_IRUGO
| S_IWUSR
);
134 static bool __read_mostly vector_hashing
= true;
135 module_param(vector_hashing
, bool, S_IRUGO
);
137 #define KVM_NR_SHARED_MSRS 16
139 struct kvm_shared_msrs_global
{
141 u32 msrs
[KVM_NR_SHARED_MSRS
];
144 struct kvm_shared_msrs
{
145 struct user_return_notifier urn
;
147 struct kvm_shared_msr_values
{
150 } values
[KVM_NR_SHARED_MSRS
];
153 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
154 static struct kvm_shared_msrs __percpu
*shared_msrs
;
156 struct kvm_stats_debugfs_item debugfs_entries
[] = {
157 { "pf_fixed", VCPU_STAT(pf_fixed
) },
158 { "pf_guest", VCPU_STAT(pf_guest
) },
159 { "tlb_flush", VCPU_STAT(tlb_flush
) },
160 { "invlpg", VCPU_STAT(invlpg
) },
161 { "exits", VCPU_STAT(exits
) },
162 { "io_exits", VCPU_STAT(io_exits
) },
163 { "mmio_exits", VCPU_STAT(mmio_exits
) },
164 { "signal_exits", VCPU_STAT(signal_exits
) },
165 { "irq_window", VCPU_STAT(irq_window_exits
) },
166 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
167 { "halt_exits", VCPU_STAT(halt_exits
) },
168 { "halt_successful_poll", VCPU_STAT(halt_successful_poll
) },
169 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll
) },
170 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid
) },
171 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
172 { "hypercalls", VCPU_STAT(hypercalls
) },
173 { "request_irq", VCPU_STAT(request_irq_exits
) },
174 { "irq_exits", VCPU_STAT(irq_exits
) },
175 { "host_state_reload", VCPU_STAT(host_state_reload
) },
176 { "efer_reload", VCPU_STAT(efer_reload
) },
177 { "fpu_reload", VCPU_STAT(fpu_reload
) },
178 { "insn_emulation", VCPU_STAT(insn_emulation
) },
179 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
180 { "irq_injections", VCPU_STAT(irq_injections
) },
181 { "nmi_injections", VCPU_STAT(nmi_injections
) },
182 { "req_event", VCPU_STAT(req_event
) },
183 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
184 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
185 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
186 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
187 { "mmu_flooded", VM_STAT(mmu_flooded
) },
188 { "mmu_recycled", VM_STAT(mmu_recycled
) },
189 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
190 { "mmu_unsync", VM_STAT(mmu_unsync
) },
191 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
192 { "largepages", VM_STAT(lpages
) },
193 { "max_mmu_page_hash_collisions",
194 VM_STAT(max_mmu_page_hash_collisions
) },
198 u64 __read_mostly host_xcr0
;
200 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
);
202 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu
*vcpu
)
205 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
); i
++)
206 vcpu
->arch
.apf
.gfns
[i
] = ~0;
209 static void kvm_on_user_return(struct user_return_notifier
*urn
)
212 struct kvm_shared_msrs
*locals
213 = container_of(urn
, struct kvm_shared_msrs
, urn
);
214 struct kvm_shared_msr_values
*values
;
218 * Disabling irqs at this point since the following code could be
219 * interrupted and executed through kvm_arch_hardware_disable()
221 local_irq_save(flags
);
222 if (locals
->registered
) {
223 locals
->registered
= false;
224 user_return_notifier_unregister(urn
);
226 local_irq_restore(flags
);
227 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
228 values
= &locals
->values
[slot
];
229 if (values
->host
!= values
->curr
) {
230 wrmsrl(shared_msrs_global
.msrs
[slot
], values
->host
);
231 values
->curr
= values
->host
;
236 static void shared_msr_update(unsigned slot
, u32 msr
)
239 unsigned int cpu
= smp_processor_id();
240 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
242 /* only read, and nobody should modify it at this time,
243 * so don't need lock */
244 if (slot
>= shared_msrs_global
.nr
) {
245 printk(KERN_ERR
"kvm: invalid MSR slot!");
248 rdmsrl_safe(msr
, &value
);
249 smsr
->values
[slot
].host
= value
;
250 smsr
->values
[slot
].curr
= value
;
253 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
255 BUG_ON(slot
>= KVM_NR_SHARED_MSRS
);
256 shared_msrs_global
.msrs
[slot
] = msr
;
257 if (slot
>= shared_msrs_global
.nr
)
258 shared_msrs_global
.nr
= slot
+ 1;
260 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
262 static void kvm_shared_msr_cpu_online(void)
266 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
267 shared_msr_update(i
, shared_msrs_global
.msrs
[i
]);
270 int kvm_set_shared_msr(unsigned slot
, u64 value
, u64 mask
)
272 unsigned int cpu
= smp_processor_id();
273 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
276 if (((value
^ smsr
->values
[slot
].curr
) & mask
) == 0)
278 smsr
->values
[slot
].curr
= value
;
279 err
= wrmsrl_safe(shared_msrs_global
.msrs
[slot
], value
);
283 if (!smsr
->registered
) {
284 smsr
->urn
.on_user_return
= kvm_on_user_return
;
285 user_return_notifier_register(&smsr
->urn
);
286 smsr
->registered
= true;
290 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
292 static void drop_user_return_notifiers(void)
294 unsigned int cpu
= smp_processor_id();
295 struct kvm_shared_msrs
*smsr
= per_cpu_ptr(shared_msrs
, cpu
);
297 if (smsr
->registered
)
298 kvm_on_user_return(&smsr
->urn
);
301 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
303 return vcpu
->arch
.apic_base
;
305 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
307 int kvm_set_apic_base(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
309 u64 old_state
= vcpu
->arch
.apic_base
&
310 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
311 u64 new_state
= msr_info
->data
&
312 (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
);
313 u64 reserved_bits
= ((~0ULL) << cpuid_maxphyaddr(vcpu
)) | 0x2ff |
314 (guest_cpuid_has(vcpu
, X86_FEATURE_X2APIC
) ? 0 : X2APIC_ENABLE
);
316 if ((msr_info
->data
& reserved_bits
) || new_state
== X2APIC_ENABLE
)
318 if (!msr_info
->host_initiated
&&
319 ((new_state
== MSR_IA32_APICBASE_ENABLE
&&
320 old_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
)) ||
321 (new_state
== (MSR_IA32_APICBASE_ENABLE
| X2APIC_ENABLE
) &&
325 kvm_lapic_set_base(vcpu
, msr_info
->data
);
328 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
330 asmlinkage __visible
void kvm_spurious_fault(void)
332 /* Fault while not rebooting. We want the trace. */
335 EXPORT_SYMBOL_GPL(kvm_spurious_fault
);
337 #define EXCPT_BENIGN 0
338 #define EXCPT_CONTRIBUTORY 1
341 static int exception_class(int vector
)
351 return EXCPT_CONTRIBUTORY
;
358 #define EXCPT_FAULT 0
360 #define EXCPT_ABORT 2
361 #define EXCPT_INTERRUPT 3
363 static int exception_type(int vector
)
367 if (WARN_ON(vector
> 31 || vector
== NMI_VECTOR
))
368 return EXCPT_INTERRUPT
;
372 /* #DB is trap, as instruction watchpoints are handled elsewhere */
373 if (mask
& ((1 << DB_VECTOR
) | (1 << BP_VECTOR
) | (1 << OF_VECTOR
)))
376 if (mask
& ((1 << DF_VECTOR
) | (1 << MC_VECTOR
)))
379 /* Reserved exceptions will result in fault */
383 static void kvm_multiple_exception(struct kvm_vcpu
*vcpu
,
384 unsigned nr
, bool has_error
, u32 error_code
,
390 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
392 if (!vcpu
->arch
.exception
.pending
) {
394 if (has_error
&& !is_protmode(vcpu
))
396 vcpu
->arch
.exception
.pending
= true;
397 vcpu
->arch
.exception
.has_error_code
= has_error
;
398 vcpu
->arch
.exception
.nr
= nr
;
399 vcpu
->arch
.exception
.error_code
= error_code
;
400 vcpu
->arch
.exception
.reinject
= reinject
;
404 /* to check exception */
405 prev_nr
= vcpu
->arch
.exception
.nr
;
406 if (prev_nr
== DF_VECTOR
) {
407 /* triple fault -> shutdown */
408 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
411 class1
= exception_class(prev_nr
);
412 class2
= exception_class(nr
);
413 if ((class1
== EXCPT_CONTRIBUTORY
&& class2
== EXCPT_CONTRIBUTORY
)
414 || (class1
== EXCPT_PF
&& class2
!= EXCPT_BENIGN
)) {
415 /* generate double fault per SDM Table 5-5 */
416 vcpu
->arch
.exception
.pending
= true;
417 vcpu
->arch
.exception
.has_error_code
= true;
418 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
419 vcpu
->arch
.exception
.error_code
= 0;
421 /* replace previous exception with a new one in a hope
422 that instruction re-execution will regenerate lost
427 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
429 kvm_multiple_exception(vcpu
, nr
, false, 0, false);
431 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
433 void kvm_requeue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
435 kvm_multiple_exception(vcpu
, nr
, false, 0, true);
437 EXPORT_SYMBOL_GPL(kvm_requeue_exception
);
439 int kvm_complete_insn_gp(struct kvm_vcpu
*vcpu
, int err
)
442 kvm_inject_gp(vcpu
, 0);
444 return kvm_skip_emulated_instruction(vcpu
);
448 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp
);
450 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
452 ++vcpu
->stat
.pf_guest
;
453 vcpu
->arch
.exception
.nested_apf
=
454 is_guest_mode(vcpu
) && fault
->async_page_fault
;
455 if (vcpu
->arch
.exception
.nested_apf
)
456 vcpu
->arch
.apf
.nested_apf_token
= fault
->address
;
458 vcpu
->arch
.cr2
= fault
->address
;
459 kvm_queue_exception_e(vcpu
, PF_VECTOR
, fault
->error_code
);
461 EXPORT_SYMBOL_GPL(kvm_inject_page_fault
);
463 static bool kvm_propagate_fault(struct kvm_vcpu
*vcpu
, struct x86_exception
*fault
)
465 if (mmu_is_nested(vcpu
) && !fault
->nested_page_fault
)
466 vcpu
->arch
.nested_mmu
.inject_page_fault(vcpu
, fault
);
468 vcpu
->arch
.mmu
.inject_page_fault(vcpu
, fault
);
470 return fault
->nested_page_fault
;
473 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
475 atomic_inc(&vcpu
->arch
.nmi_queued
);
476 kvm_make_request(KVM_REQ_NMI
, vcpu
);
478 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
480 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
482 kvm_multiple_exception(vcpu
, nr
, true, error_code
, false);
484 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
486 void kvm_requeue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
488 kvm_multiple_exception(vcpu
, nr
, true, error_code
, true);
490 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e
);
493 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
494 * a #GP and return false.
496 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
498 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
500 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
503 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
505 bool kvm_require_dr(struct kvm_vcpu
*vcpu
, int dr
)
507 if ((dr
!= 4 && dr
!= 5) || !kvm_read_cr4_bits(vcpu
, X86_CR4_DE
))
510 kvm_queue_exception(vcpu
, UD_VECTOR
);
513 EXPORT_SYMBOL_GPL(kvm_require_dr
);
516 * This function will be used to read from the physical memory of the currently
517 * running guest. The difference to kvm_vcpu_read_guest_page is that this function
518 * can read from guest physical or from the guest's guest physical memory.
520 int kvm_read_guest_page_mmu(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
,
521 gfn_t ngfn
, void *data
, int offset
, int len
,
524 struct x86_exception exception
;
528 ngpa
= gfn_to_gpa(ngfn
);
529 real_gfn
= mmu
->translate_gpa(vcpu
, ngpa
, access
, &exception
);
530 if (real_gfn
== UNMAPPED_GVA
)
533 real_gfn
= gpa_to_gfn(real_gfn
);
535 return kvm_vcpu_read_guest_page(vcpu
, real_gfn
, data
, offset
, len
);
537 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu
);
539 static int kvm_read_nested_guest_page(struct kvm_vcpu
*vcpu
, gfn_t gfn
,
540 void *data
, int offset
, int len
, u32 access
)
542 return kvm_read_guest_page_mmu(vcpu
, vcpu
->arch
.walk_mmu
, gfn
,
543 data
, offset
, len
, access
);
547 * Load the pae pdptrs. Return true is they are all valid.
549 int load_pdptrs(struct kvm_vcpu
*vcpu
, struct kvm_mmu
*mmu
, unsigned long cr3
)
551 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
552 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
555 u64 pdpte
[ARRAY_SIZE(mmu
->pdptrs
)];
557 ret
= kvm_read_guest_page_mmu(vcpu
, mmu
, pdpt_gfn
, pdpte
,
558 offset
* sizeof(u64
), sizeof(pdpte
),
559 PFERR_USER_MASK
|PFERR_WRITE_MASK
);
564 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
565 if ((pdpte
[i
] & PT_PRESENT_MASK
) &&
567 vcpu
->arch
.mmu
.guest_rsvd_check
.rsvd_bits_mask
[0][2])) {
574 memcpy(mmu
->pdptrs
, pdpte
, sizeof(mmu
->pdptrs
));
575 __set_bit(VCPU_EXREG_PDPTR
,
576 (unsigned long *)&vcpu
->arch
.regs_avail
);
577 __set_bit(VCPU_EXREG_PDPTR
,
578 (unsigned long *)&vcpu
->arch
.regs_dirty
);
583 EXPORT_SYMBOL_GPL(load_pdptrs
);
585 bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
587 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.walk_mmu
->pdptrs
)];
593 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
596 if (!test_bit(VCPU_EXREG_PDPTR
,
597 (unsigned long *)&vcpu
->arch
.regs_avail
))
600 gfn
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) >> PAGE_SHIFT
;
601 offset
= (kvm_read_cr3(vcpu
) & 0xffffffe0ul
) & (PAGE_SIZE
- 1);
602 r
= kvm_read_nested_guest_page(vcpu
, gfn
, pdpte
, offset
, sizeof(pdpte
),
603 PFERR_USER_MASK
| PFERR_WRITE_MASK
);
606 changed
= memcmp(pdpte
, vcpu
->arch
.walk_mmu
->pdptrs
, sizeof(pdpte
)) != 0;
611 EXPORT_SYMBOL_GPL(pdptrs_changed
);
613 int kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
615 unsigned long old_cr0
= kvm_read_cr0(vcpu
);
616 unsigned long update_bits
= X86_CR0_PG
| X86_CR0_WP
;
621 if (cr0
& 0xffffffff00000000UL
)
625 cr0
&= ~CR0_RESERVED_BITS
;
627 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
))
630 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
))
633 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
635 if ((vcpu
->arch
.efer
& EFER_LME
)) {
640 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
645 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
650 if (!(cr0
& X86_CR0_PG
) && kvm_read_cr4_bits(vcpu
, X86_CR4_PCIDE
))
653 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
655 if ((cr0
^ old_cr0
) & X86_CR0_PG
) {
656 kvm_clear_async_pf_completion_queue(vcpu
);
657 kvm_async_pf_hash_reset(vcpu
);
660 if ((cr0
^ old_cr0
) & update_bits
)
661 kvm_mmu_reset_context(vcpu
);
663 if (((cr0
^ old_cr0
) & X86_CR0_CD
) &&
664 kvm_arch_has_noncoherent_dma(vcpu
->kvm
) &&
665 !kvm_check_has_quirk(vcpu
->kvm
, KVM_X86_QUIRK_CD_NW_CLEARED
))
666 kvm_zap_gfn_range(vcpu
->kvm
, 0, ~0ULL);
670 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
672 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
674 (void)kvm_set_cr0(vcpu
, kvm_read_cr0_bits(vcpu
, ~0x0eul
) | (msw
& 0x0f));
676 EXPORT_SYMBOL_GPL(kvm_lmsw
);
678 static void kvm_load_guest_xcr0(struct kvm_vcpu
*vcpu
)
680 if (kvm_read_cr4_bits(vcpu
, X86_CR4_OSXSAVE
) &&
681 !vcpu
->guest_xcr0_loaded
) {
682 /* kvm_set_xcr() also depends on this */
683 xsetbv(XCR_XFEATURE_ENABLED_MASK
, vcpu
->arch
.xcr0
);
684 vcpu
->guest_xcr0_loaded
= 1;
688 static void kvm_put_guest_xcr0(struct kvm_vcpu
*vcpu
)
690 if (vcpu
->guest_xcr0_loaded
) {
691 if (vcpu
->arch
.xcr0
!= host_xcr0
)
692 xsetbv(XCR_XFEATURE_ENABLED_MASK
, host_xcr0
);
693 vcpu
->guest_xcr0_loaded
= 0;
697 static int __kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
700 u64 old_xcr0
= vcpu
->arch
.xcr0
;
703 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
704 if (index
!= XCR_XFEATURE_ENABLED_MASK
)
706 if (!(xcr0
& XFEATURE_MASK_FP
))
708 if ((xcr0
& XFEATURE_MASK_YMM
) && !(xcr0
& XFEATURE_MASK_SSE
))
712 * Do not allow the guest to set bits that we do not support
713 * saving. However, xcr0 bit 0 is always set, even if the
714 * emulated CPU does not support XSAVE (see fx_init).
716 valid_bits
= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FP
;
717 if (xcr0
& ~valid_bits
)
720 if ((!(xcr0
& XFEATURE_MASK_BNDREGS
)) !=
721 (!(xcr0
& XFEATURE_MASK_BNDCSR
)))
724 if (xcr0
& XFEATURE_MASK_AVX512
) {
725 if (!(xcr0
& XFEATURE_MASK_YMM
))
727 if ((xcr0
& XFEATURE_MASK_AVX512
) != XFEATURE_MASK_AVX512
)
730 vcpu
->arch
.xcr0
= xcr0
;
732 if ((xcr0
^ old_xcr0
) & XFEATURE_MASK_EXTEND
)
733 kvm_update_cpuid(vcpu
);
737 int kvm_set_xcr(struct kvm_vcpu
*vcpu
, u32 index
, u64 xcr
)
739 if (kvm_x86_ops
->get_cpl(vcpu
) != 0 ||
740 __kvm_set_xcr(vcpu
, index
, xcr
)) {
741 kvm_inject_gp(vcpu
, 0);
746 EXPORT_SYMBOL_GPL(kvm_set_xcr
);
748 int kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
750 unsigned long old_cr4
= kvm_read_cr4(vcpu
);
751 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
|
752 X86_CR4_SMEP
| X86_CR4_SMAP
| X86_CR4_PKE
;
754 if (cr4
& CR4_RESERVED_BITS
)
757 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) && (cr4
& X86_CR4_OSXSAVE
))
760 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMEP
) && (cr4
& X86_CR4_SMEP
))
763 if (!guest_cpuid_has(vcpu
, X86_FEATURE_SMAP
) && (cr4
& X86_CR4_SMAP
))
766 if (!guest_cpuid_has(vcpu
, X86_FEATURE_FSGSBASE
) && (cr4
& X86_CR4_FSGSBASE
))
769 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PKU
) && (cr4
& X86_CR4_PKE
))
772 if (is_long_mode(vcpu
)) {
773 if (!(cr4
& X86_CR4_PAE
))
775 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
776 && ((cr4
^ old_cr4
) & pdptr_bits
)
777 && !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
,
781 if ((cr4
& X86_CR4_PCIDE
) && !(old_cr4
& X86_CR4_PCIDE
)) {
782 if (!guest_cpuid_has(vcpu
, X86_FEATURE_PCID
))
785 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
786 if ((kvm_read_cr3(vcpu
) & X86_CR3_PCID_MASK
) || !is_long_mode(vcpu
))
790 if (kvm_x86_ops
->set_cr4(vcpu
, cr4
))
793 if (((cr4
^ old_cr4
) & pdptr_bits
) ||
794 (!(cr4
& X86_CR4_PCIDE
) && (old_cr4
& X86_CR4_PCIDE
)))
795 kvm_mmu_reset_context(vcpu
);
797 if ((cr4
^ old_cr4
) & (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
798 kvm_update_cpuid(vcpu
);
802 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
804 int kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
807 cr3
&= ~CR3_PCID_INVD
;
810 if (cr3
== kvm_read_cr3(vcpu
) && !pdptrs_changed(vcpu
)) {
811 kvm_mmu_sync_roots(vcpu
);
812 kvm_make_request(KVM_REQ_TLB_FLUSH
, vcpu
);
816 if (is_long_mode(vcpu
) &&
817 (cr3
& rsvd_bits(cpuid_maxphyaddr(vcpu
), 62)))
819 else if (is_pae(vcpu
) && is_paging(vcpu
) &&
820 !load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, cr3
))
823 vcpu
->arch
.cr3
= cr3
;
824 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
825 kvm_mmu_new_cr3(vcpu
);
828 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
830 int kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
832 if (cr8
& CR8_RESERVED_BITS
)
834 if (lapic_in_kernel(vcpu
))
835 kvm_lapic_set_tpr(vcpu
, cr8
);
837 vcpu
->arch
.cr8
= cr8
;
840 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
842 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
844 if (lapic_in_kernel(vcpu
))
845 return kvm_lapic_get_cr8(vcpu
);
847 return vcpu
->arch
.cr8
;
849 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
851 static void kvm_update_dr0123(struct kvm_vcpu
*vcpu
)
855 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)) {
856 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
857 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
858 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_RELOAD
;
862 static void kvm_update_dr6(struct kvm_vcpu
*vcpu
)
864 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
865 kvm_x86_ops
->set_dr6(vcpu
, vcpu
->arch
.dr6
);
868 static void kvm_update_dr7(struct kvm_vcpu
*vcpu
)
872 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
873 dr7
= vcpu
->arch
.guest_debug_dr7
;
875 dr7
= vcpu
->arch
.dr7
;
876 kvm_x86_ops
->set_dr7(vcpu
, dr7
);
877 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_BP_ENABLED
;
878 if (dr7
& DR7_BP_EN_MASK
)
879 vcpu
->arch
.switch_db_regs
|= KVM_DEBUGREG_BP_ENABLED
;
882 static u64
kvm_dr6_fixed(struct kvm_vcpu
*vcpu
)
884 u64 fixed
= DR6_FIXED_1
;
886 if (!guest_cpuid_has(vcpu
, X86_FEATURE_RTM
))
891 static int __kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
895 vcpu
->arch
.db
[dr
] = val
;
896 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
))
897 vcpu
->arch
.eff_db
[dr
] = val
;
902 if (val
& 0xffffffff00000000ULL
)
904 vcpu
->arch
.dr6
= (val
& DR6_VOLATILE
) | kvm_dr6_fixed(vcpu
);
905 kvm_update_dr6(vcpu
);
910 if (val
& 0xffffffff00000000ULL
)
912 vcpu
->arch
.dr7
= (val
& DR7_VOLATILE
) | DR7_FIXED_1
;
913 kvm_update_dr7(vcpu
);
920 int kvm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long val
)
922 if (__kvm_set_dr(vcpu
, dr
, val
)) {
923 kvm_inject_gp(vcpu
, 0);
928 EXPORT_SYMBOL_GPL(kvm_set_dr
);
930 int kvm_get_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long *val
)
934 *val
= vcpu
->arch
.db
[dr
];
939 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
)
940 *val
= vcpu
->arch
.dr6
;
942 *val
= kvm_x86_ops
->get_dr6(vcpu
);
947 *val
= vcpu
->arch
.dr7
;
952 EXPORT_SYMBOL_GPL(kvm_get_dr
);
954 bool kvm_rdpmc(struct kvm_vcpu
*vcpu
)
956 u32 ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
960 err
= kvm_pmu_rdpmc(vcpu
, ecx
, &data
);
963 kvm_register_write(vcpu
, VCPU_REGS_RAX
, (u32
)data
);
964 kvm_register_write(vcpu
, VCPU_REGS_RDX
, data
>> 32);
967 EXPORT_SYMBOL_GPL(kvm_rdpmc
);
970 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
971 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
973 * This list is modified at module load time to reflect the
974 * capabilities of the host cpu. This capabilities test skips MSRs that are
975 * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
976 * may depend on host virtualization features rather than host cpu features.
979 static u32 msrs_to_save
[] = {
980 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
983 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
985 MSR_IA32_TSC
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
,
986 MSR_IA32_FEATURE_CONTROL
, MSR_IA32_BNDCFGS
, MSR_TSC_AUX
,
989 static unsigned num_msrs_to_save
;
991 static u32 emulated_msrs
[] = {
992 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
993 MSR_KVM_SYSTEM_TIME_NEW
, MSR_KVM_WALL_CLOCK_NEW
,
994 HV_X64_MSR_GUEST_OS_ID
, HV_X64_MSR_HYPERCALL
,
995 HV_X64_MSR_TIME_REF_COUNT
, HV_X64_MSR_REFERENCE_TSC
,
996 HV_X64_MSR_TSC_FREQUENCY
, HV_X64_MSR_APIC_FREQUENCY
,
997 HV_X64_MSR_CRASH_P0
, HV_X64_MSR_CRASH_P1
, HV_X64_MSR_CRASH_P2
,
998 HV_X64_MSR_CRASH_P3
, HV_X64_MSR_CRASH_P4
, HV_X64_MSR_CRASH_CTL
,
1000 HV_X64_MSR_VP_INDEX
,
1001 HV_X64_MSR_VP_RUNTIME
,
1002 HV_X64_MSR_SCONTROL
,
1003 HV_X64_MSR_STIMER0_CONFIG
,
1004 HV_X64_MSR_APIC_ASSIST_PAGE
, MSR_KVM_ASYNC_PF_EN
, MSR_KVM_STEAL_TIME
,
1007 MSR_IA32_TSC_ADJUST
,
1008 MSR_IA32_TSCDEADLINE
,
1009 MSR_IA32_MISC_ENABLE
,
1010 MSR_IA32_MCG_STATUS
,
1012 MSR_IA32_MCG_EXT_CTL
,
1015 MSR_MISC_FEATURES_ENABLES
,
1018 static unsigned num_emulated_msrs
;
1020 bool kvm_valid_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1022 if (efer
& efer_reserved_bits
)
1025 if (efer
& EFER_FFXSR
&& !guest_cpuid_has(vcpu
, X86_FEATURE_FXSR_OPT
))
1028 if (efer
& EFER_SVME
&& !guest_cpuid_has(vcpu
, X86_FEATURE_SVM
))
1033 EXPORT_SYMBOL_GPL(kvm_valid_efer
);
1035 static int set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1037 u64 old_efer
= vcpu
->arch
.efer
;
1039 if (!kvm_valid_efer(vcpu
, efer
))
1043 && (vcpu
->arch
.efer
& EFER_LME
) != (efer
& EFER_LME
))
1047 efer
|= vcpu
->arch
.efer
& EFER_LMA
;
1049 kvm_x86_ops
->set_efer(vcpu
, efer
);
1051 /* Update reserved bits */
1052 if ((efer
^ old_efer
) & EFER_NX
)
1053 kvm_mmu_reset_context(vcpu
);
1058 void kvm_enable_efer_bits(u64 mask
)
1060 efer_reserved_bits
&= ~mask
;
1062 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
1065 * Writes msr value into into the appropriate "register".
1066 * Returns 0 on success, non-0 otherwise.
1067 * Assumes vcpu_load() was already called.
1069 int kvm_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1071 switch (msr
->index
) {
1074 case MSR_KERNEL_GS_BASE
:
1077 if (is_noncanonical_address(msr
->data
))
1080 case MSR_IA32_SYSENTER_EIP
:
1081 case MSR_IA32_SYSENTER_ESP
:
1083 * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1084 * non-canonical address is written on Intel but not on
1085 * AMD (which ignores the top 32-bits, because it does
1086 * not implement 64-bit SYSENTER).
1088 * 64-bit code should hence be able to write a non-canonical
1089 * value on AMD. Making the address canonical ensures that
1090 * vmentry does not fail on Intel after writing a non-canonical
1091 * value, and that something deterministic happens if the guest
1092 * invokes 64-bit SYSENTER.
1094 msr
->data
= get_canonical(msr
->data
);
1096 return kvm_x86_ops
->set_msr(vcpu
, msr
);
1098 EXPORT_SYMBOL_GPL(kvm_set_msr
);
1101 * Adapt set_msr() to msr_io()'s calling convention
1103 static int do_get_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1105 struct msr_data msr
;
1109 msr
.host_initiated
= true;
1110 r
= kvm_get_msr(vcpu
, &msr
);
1118 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
1120 struct msr_data msr
;
1124 msr
.host_initiated
= true;
1125 return kvm_set_msr(vcpu
, &msr
);
1128 #ifdef CONFIG_X86_64
1129 struct pvclock_gtod_data
{
1132 struct { /* extract of a clocksource struct */
1145 static struct pvclock_gtod_data pvclock_gtod_data
;
1147 static void update_pvclock_gtod(struct timekeeper
*tk
)
1149 struct pvclock_gtod_data
*vdata
= &pvclock_gtod_data
;
1152 boot_ns
= ktime_to_ns(ktime_add(tk
->tkr_mono
.base
, tk
->offs_boot
));
1154 write_seqcount_begin(&vdata
->seq
);
1156 /* copy pvclock gtod data */
1157 vdata
->clock
.vclock_mode
= tk
->tkr_mono
.clock
->archdata
.vclock_mode
;
1158 vdata
->clock
.cycle_last
= tk
->tkr_mono
.cycle_last
;
1159 vdata
->clock
.mask
= tk
->tkr_mono
.mask
;
1160 vdata
->clock
.mult
= tk
->tkr_mono
.mult
;
1161 vdata
->clock
.shift
= tk
->tkr_mono
.shift
;
1163 vdata
->boot_ns
= boot_ns
;
1164 vdata
->nsec_base
= tk
->tkr_mono
.xtime_nsec
;
1166 vdata
->wall_time_sec
= tk
->xtime_sec
;
1168 write_seqcount_end(&vdata
->seq
);
1172 void kvm_set_pending_timer(struct kvm_vcpu
*vcpu
)
1175 * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1176 * vcpu_enter_guest. This function is only called from
1177 * the physical CPU that is running vcpu.
1179 kvm_make_request(KVM_REQ_PENDING_TIMER
, vcpu
);
1182 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
1186 struct pvclock_wall_clock wc
;
1187 struct timespec64 boot
;
1192 r
= kvm_read_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1197 ++version
; /* first time write, random junk */
1201 if (kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
)))
1205 * The guest calculates current wall clock time by adding
1206 * system time (updated by kvm_guest_time_update below) to the
1207 * wall clock specified here. guest system time equals host
1208 * system time for us, thus we must fill in host boot time here.
1210 getboottime64(&boot
);
1212 if (kvm
->arch
.kvmclock_offset
) {
1213 struct timespec64 ts
= ns_to_timespec64(kvm
->arch
.kvmclock_offset
);
1214 boot
= timespec64_sub(boot
, ts
);
1216 wc
.sec
= (u32
)boot
.tv_sec
; /* overflow in 2106 guest time */
1217 wc
.nsec
= boot
.tv_nsec
;
1218 wc
.version
= version
;
1220 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
1223 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
1226 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
1228 do_shl32_div32(dividend
, divisor
);
1232 static void kvm_get_time_scale(uint64_t scaled_hz
, uint64_t base_hz
,
1233 s8
*pshift
, u32
*pmultiplier
)
1241 scaled64
= scaled_hz
;
1242 while (tps64
> scaled64
*2 || tps64
& 0xffffffff00000000ULL
) {
1247 tps32
= (uint32_t)tps64
;
1248 while (tps32
<= scaled64
|| scaled64
& 0xffffffff00000000ULL
) {
1249 if (scaled64
& 0xffffffff00000000ULL
|| tps32
& 0x80000000)
1257 *pmultiplier
= div_frac(scaled64
, tps32
);
1259 pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1260 __func__
, base_hz
, scaled_hz
, shift
, *pmultiplier
);
1263 #ifdef CONFIG_X86_64
1264 static atomic_t kvm_guest_has_master_clock
= ATOMIC_INIT(0);
1267 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
1268 static unsigned long max_tsc_khz
;
1270 static u32
adjust_tsc_khz(u32 khz
, s32 ppm
)
1272 u64 v
= (u64
)khz
* (1000000 + ppm
);
1277 static int set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
, bool scale
)
1281 /* Guest TSC same frequency as host TSC? */
1283 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1287 /* TSC scaling supported? */
1288 if (!kvm_has_tsc_control
) {
1289 if (user_tsc_khz
> tsc_khz
) {
1290 vcpu
->arch
.tsc_catchup
= 1;
1291 vcpu
->arch
.tsc_always_catchup
= 1;
1294 WARN(1, "user requested TSC rate below hardware speed\n");
1299 /* TSC scaling required - calculate ratio */
1300 ratio
= mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits
,
1301 user_tsc_khz
, tsc_khz
);
1303 if (ratio
== 0 || ratio
>= kvm_max_tsc_scaling_ratio
) {
1304 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1309 vcpu
->arch
.tsc_scaling_ratio
= ratio
;
1313 static int kvm_set_tsc_khz(struct kvm_vcpu
*vcpu
, u32 user_tsc_khz
)
1315 u32 thresh_lo
, thresh_hi
;
1316 int use_scaling
= 0;
1318 /* tsc_khz can be zero if TSC calibration fails */
1319 if (user_tsc_khz
== 0) {
1320 /* set tsc_scaling_ratio to a safe value */
1321 vcpu
->arch
.tsc_scaling_ratio
= kvm_default_tsc_scaling_ratio
;
1325 /* Compute a scale to convert nanoseconds in TSC cycles */
1326 kvm_get_time_scale(user_tsc_khz
* 1000LL, NSEC_PER_SEC
,
1327 &vcpu
->arch
.virtual_tsc_shift
,
1328 &vcpu
->arch
.virtual_tsc_mult
);
1329 vcpu
->arch
.virtual_tsc_khz
= user_tsc_khz
;
1332 * Compute the variation in TSC rate which is acceptable
1333 * within the range of tolerance and decide if the
1334 * rate being applied is within that bounds of the hardware
1335 * rate. If so, no scaling or compensation need be done.
1337 thresh_lo
= adjust_tsc_khz(tsc_khz
, -tsc_tolerance_ppm
);
1338 thresh_hi
= adjust_tsc_khz(tsc_khz
, tsc_tolerance_ppm
);
1339 if (user_tsc_khz
< thresh_lo
|| user_tsc_khz
> thresh_hi
) {
1340 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz
, thresh_lo
, thresh_hi
);
1343 return set_tsc_khz(vcpu
, user_tsc_khz
, use_scaling
);
1346 static u64
compute_guest_tsc(struct kvm_vcpu
*vcpu
, s64 kernel_ns
)
1348 u64 tsc
= pvclock_scale_delta(kernel_ns
-vcpu
->arch
.this_tsc_nsec
,
1349 vcpu
->arch
.virtual_tsc_mult
,
1350 vcpu
->arch
.virtual_tsc_shift
);
1351 tsc
+= vcpu
->arch
.this_tsc_write
;
1355 static void kvm_track_tsc_matching(struct kvm_vcpu
*vcpu
)
1357 #ifdef CONFIG_X86_64
1359 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
1360 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1362 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1363 atomic_read(&vcpu
->kvm
->online_vcpus
));
1366 * Once the masterclock is enabled, always perform request in
1367 * order to update it.
1369 * In order to enable masterclock, the host clocksource must be TSC
1370 * and the vcpus need to have matched TSCs. When that happens,
1371 * perform request to enable masterclock.
1373 if (ka
->use_master_clock
||
1374 (gtod
->clock
.vclock_mode
== VCLOCK_TSC
&& vcpus_matched
))
1375 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
1377 trace_kvm_track_tsc(vcpu
->vcpu_id
, ka
->nr_vcpus_matched_tsc
,
1378 atomic_read(&vcpu
->kvm
->online_vcpus
),
1379 ka
->use_master_clock
, gtod
->clock
.vclock_mode
);
1383 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu
*vcpu
, s64 offset
)
1385 u64 curr_offset
= vcpu
->arch
.tsc_offset
;
1386 vcpu
->arch
.ia32_tsc_adjust_msr
+= offset
- curr_offset
;
1390 * Multiply tsc by a fixed point number represented by ratio.
1392 * The most significant 64-N bits (mult) of ratio represent the
1393 * integral part of the fixed point number; the remaining N bits
1394 * (frac) represent the fractional part, ie. ratio represents a fixed
1395 * point number (mult + frac * 2^(-N)).
1397 * N equals to kvm_tsc_scaling_ratio_frac_bits.
1399 static inline u64
__scale_tsc(u64 ratio
, u64 tsc
)
1401 return mul_u64_u64_shr(tsc
, ratio
, kvm_tsc_scaling_ratio_frac_bits
);
1404 u64
kvm_scale_tsc(struct kvm_vcpu
*vcpu
, u64 tsc
)
1407 u64 ratio
= vcpu
->arch
.tsc_scaling_ratio
;
1409 if (ratio
!= kvm_default_tsc_scaling_ratio
)
1410 _tsc
= __scale_tsc(ratio
, tsc
);
1414 EXPORT_SYMBOL_GPL(kvm_scale_tsc
);
1416 static u64
kvm_compute_tsc_offset(struct kvm_vcpu
*vcpu
, u64 target_tsc
)
1420 tsc
= kvm_scale_tsc(vcpu
, rdtsc());
1422 return target_tsc
- tsc
;
1425 u64
kvm_read_l1_tsc(struct kvm_vcpu
*vcpu
, u64 host_tsc
)
1427 return vcpu
->arch
.tsc_offset
+ kvm_scale_tsc(vcpu
, host_tsc
);
1429 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc
);
1431 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu
*vcpu
, u64 offset
)
1433 kvm_x86_ops
->write_tsc_offset(vcpu
, offset
);
1434 vcpu
->arch
.tsc_offset
= offset
;
1437 void kvm_write_tsc(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
1439 struct kvm
*kvm
= vcpu
->kvm
;
1440 u64 offset
, ns
, elapsed
;
1441 unsigned long flags
;
1443 bool already_matched
;
1444 u64 data
= msr
->data
;
1445 bool synchronizing
= false;
1447 raw_spin_lock_irqsave(&kvm
->arch
.tsc_write_lock
, flags
);
1448 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1449 ns
= ktime_get_boot_ns();
1450 elapsed
= ns
- kvm
->arch
.last_tsc_nsec
;
1452 if (vcpu
->arch
.virtual_tsc_khz
) {
1453 if (data
== 0 && msr
->host_initiated
) {
1455 * detection of vcpu initialization -- need to sync
1456 * with other vCPUs. This particularly helps to keep
1457 * kvm_clock stable after CPU hotplug
1459 synchronizing
= true;
1461 u64 tsc_exp
= kvm
->arch
.last_tsc_write
+
1462 nsec_to_cycles(vcpu
, elapsed
);
1463 u64 tsc_hz
= vcpu
->arch
.virtual_tsc_khz
* 1000LL;
1465 * Special case: TSC write with a small delta (1 second)
1466 * of virtual cycle time against real time is
1467 * interpreted as an attempt to synchronize the CPU.
1469 synchronizing
= data
< tsc_exp
+ tsc_hz
&&
1470 data
+ tsc_hz
> tsc_exp
;
1475 * For a reliable TSC, we can match TSC offsets, and for an unstable
1476 * TSC, we add elapsed time in this computation. We could let the
1477 * compensation code attempt to catch up if we fall behind, but
1478 * it's better to try to match offsets from the beginning.
1480 if (synchronizing
&&
1481 vcpu
->arch
.virtual_tsc_khz
== kvm
->arch
.last_tsc_khz
) {
1482 if (!check_tsc_unstable()) {
1483 offset
= kvm
->arch
.cur_tsc_offset
;
1484 pr_debug("kvm: matched tsc offset for %llu\n", data
);
1486 u64 delta
= nsec_to_cycles(vcpu
, elapsed
);
1488 offset
= kvm_compute_tsc_offset(vcpu
, data
);
1489 pr_debug("kvm: adjusted tsc offset by %llu\n", delta
);
1492 already_matched
= (vcpu
->arch
.this_tsc_generation
== kvm
->arch
.cur_tsc_generation
);
1495 * We split periods of matched TSC writes into generations.
1496 * For each generation, we track the original measured
1497 * nanosecond time, offset, and write, so if TSCs are in
1498 * sync, we can match exact offset, and if not, we can match
1499 * exact software computation in compute_guest_tsc()
1501 * These values are tracked in kvm->arch.cur_xxx variables.
1503 kvm
->arch
.cur_tsc_generation
++;
1504 kvm
->arch
.cur_tsc_nsec
= ns
;
1505 kvm
->arch
.cur_tsc_write
= data
;
1506 kvm
->arch
.cur_tsc_offset
= offset
;
1508 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1509 kvm
->arch
.cur_tsc_generation
, data
);
1513 * We also track th most recent recorded KHZ, write and time to
1514 * allow the matching interval to be extended at each write.
1516 kvm
->arch
.last_tsc_nsec
= ns
;
1517 kvm
->arch
.last_tsc_write
= data
;
1518 kvm
->arch
.last_tsc_khz
= vcpu
->arch
.virtual_tsc_khz
;
1520 vcpu
->arch
.last_guest_tsc
= data
;
1522 /* Keep track of which generation this VCPU has synchronized to */
1523 vcpu
->arch
.this_tsc_generation
= kvm
->arch
.cur_tsc_generation
;
1524 vcpu
->arch
.this_tsc_nsec
= kvm
->arch
.cur_tsc_nsec
;
1525 vcpu
->arch
.this_tsc_write
= kvm
->arch
.cur_tsc_write
;
1527 if (!msr
->host_initiated
&& guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
))
1528 update_ia32_tsc_adjust_msr(vcpu
, offset
);
1530 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
1531 raw_spin_unlock_irqrestore(&kvm
->arch
.tsc_write_lock
, flags
);
1533 spin_lock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1535 kvm
->arch
.nr_vcpus_matched_tsc
= 0;
1536 } else if (!already_matched
) {
1537 kvm
->arch
.nr_vcpus_matched_tsc
++;
1540 kvm_track_tsc_matching(vcpu
);
1541 spin_unlock(&kvm
->arch
.pvclock_gtod_sync_lock
);
1544 EXPORT_SYMBOL_GPL(kvm_write_tsc
);
1546 static inline void adjust_tsc_offset_guest(struct kvm_vcpu
*vcpu
,
1549 kvm_vcpu_write_tsc_offset(vcpu
, vcpu
->arch
.tsc_offset
+ adjustment
);
1552 static inline void adjust_tsc_offset_host(struct kvm_vcpu
*vcpu
, s64 adjustment
)
1554 if (vcpu
->arch
.tsc_scaling_ratio
!= kvm_default_tsc_scaling_ratio
)
1555 WARN_ON(adjustment
< 0);
1556 adjustment
= kvm_scale_tsc(vcpu
, (u64
) adjustment
);
1557 adjust_tsc_offset_guest(vcpu
, adjustment
);
1560 #ifdef CONFIG_X86_64
1562 static u64
read_tsc(void)
1564 u64 ret
= (u64
)rdtsc_ordered();
1565 u64 last
= pvclock_gtod_data
.clock
.cycle_last
;
1567 if (likely(ret
>= last
))
1571 * GCC likes to generate cmov here, but this branch is extremely
1572 * predictable (it's just a function of time and the likely is
1573 * very likely) and there's a data dependence, so force GCC
1574 * to generate a branch instead. I don't barrier() because
1575 * we don't actually need a barrier, and if this function
1576 * ever gets inlined it will generate worse code.
1582 static inline u64
vgettsc(u64
*cycle_now
)
1585 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1587 *cycle_now
= read_tsc();
1589 v
= (*cycle_now
- gtod
->clock
.cycle_last
) & gtod
->clock
.mask
;
1590 return v
* gtod
->clock
.mult
;
1593 static int do_monotonic_boot(s64
*t
, u64
*cycle_now
)
1595 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1601 seq
= read_seqcount_begin(>od
->seq
);
1602 mode
= gtod
->clock
.vclock_mode
;
1603 ns
= gtod
->nsec_base
;
1604 ns
+= vgettsc(cycle_now
);
1605 ns
>>= gtod
->clock
.shift
;
1606 ns
+= gtod
->boot_ns
;
1607 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1613 static int do_realtime(struct timespec
*ts
, u64
*cycle_now
)
1615 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
1621 seq
= read_seqcount_begin(>od
->seq
);
1622 mode
= gtod
->clock
.vclock_mode
;
1623 ts
->tv_sec
= gtod
->wall_time_sec
;
1624 ns
= gtod
->nsec_base
;
1625 ns
+= vgettsc(cycle_now
);
1626 ns
>>= gtod
->clock
.shift
;
1627 } while (unlikely(read_seqcount_retry(>od
->seq
, seq
)));
1629 ts
->tv_sec
+= __iter_div_u64_rem(ns
, NSEC_PER_SEC
, &ns
);
1635 /* returns true if host is using tsc clocksource */
1636 static bool kvm_get_time_and_clockread(s64
*kernel_ns
, u64
*cycle_now
)
1638 /* checked again under seqlock below */
1639 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1642 return do_monotonic_boot(kernel_ns
, cycle_now
) == VCLOCK_TSC
;
1645 /* returns true if host is using tsc clocksource */
1646 static bool kvm_get_walltime_and_clockread(struct timespec
*ts
,
1649 /* checked again under seqlock below */
1650 if (pvclock_gtod_data
.clock
.vclock_mode
!= VCLOCK_TSC
)
1653 return do_realtime(ts
, cycle_now
) == VCLOCK_TSC
;
1659 * Assuming a stable TSC across physical CPUS, and a stable TSC
1660 * across virtual CPUs, the following condition is possible.
1661 * Each numbered line represents an event visible to both
1662 * CPUs at the next numbered event.
1664 * "timespecX" represents host monotonic time. "tscX" represents
1667 * VCPU0 on CPU0 | VCPU1 on CPU1
1669 * 1. read timespec0,tsc0
1670 * 2. | timespec1 = timespec0 + N
1672 * 3. transition to guest | transition to guest
1673 * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1674 * 5. | ret1 = timespec1 + (rdtsc - tsc1)
1675 * | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1677 * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1680 * - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1682 * - 0 < N - M => M < N
1684 * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1685 * always the case (the difference between two distinct xtime instances
1686 * might be smaller then the difference between corresponding TSC reads,
1687 * when updating guest vcpus pvclock areas).
1689 * To avoid that problem, do not allow visibility of distinct
1690 * system_timestamp/tsc_timestamp values simultaneously: use a master
1691 * copy of host monotonic time values. Update that master copy
1694 * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1698 static void pvclock_update_vm_gtod_copy(struct kvm
*kvm
)
1700 #ifdef CONFIG_X86_64
1701 struct kvm_arch
*ka
= &kvm
->arch
;
1703 bool host_tsc_clocksource
, vcpus_matched
;
1705 vcpus_matched
= (ka
->nr_vcpus_matched_tsc
+ 1 ==
1706 atomic_read(&kvm
->online_vcpus
));
1709 * If the host uses TSC clock, then passthrough TSC as stable
1712 host_tsc_clocksource
= kvm_get_time_and_clockread(
1713 &ka
->master_kernel_ns
,
1714 &ka
->master_cycle_now
);
1716 ka
->use_master_clock
= host_tsc_clocksource
&& vcpus_matched
1717 && !ka
->backwards_tsc_observed
1718 && !ka
->boot_vcpu_runs_old_kvmclock
;
1720 if (ka
->use_master_clock
)
1721 atomic_set(&kvm_guest_has_master_clock
, 1);
1723 vclock_mode
= pvclock_gtod_data
.clock
.vclock_mode
;
1724 trace_kvm_update_master_clock(ka
->use_master_clock
, vclock_mode
,
1729 void kvm_make_mclock_inprogress_request(struct kvm
*kvm
)
1731 kvm_make_all_cpus_request(kvm
, KVM_REQ_MCLOCK_INPROGRESS
);
1734 static void kvm_gen_update_masterclock(struct kvm
*kvm
)
1736 #ifdef CONFIG_X86_64
1738 struct kvm_vcpu
*vcpu
;
1739 struct kvm_arch
*ka
= &kvm
->arch
;
1741 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1742 kvm_make_mclock_inprogress_request(kvm
);
1743 /* no guest entries from this point */
1744 pvclock_update_vm_gtod_copy(kvm
);
1746 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1747 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1749 /* guest entries allowed */
1750 kvm_for_each_vcpu(i
, vcpu
, kvm
)
1751 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS
, vcpu
);
1753 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1757 u64
get_kvmclock_ns(struct kvm
*kvm
)
1759 struct kvm_arch
*ka
= &kvm
->arch
;
1760 struct pvclock_vcpu_time_info hv_clock
;
1763 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1764 if (!ka
->use_master_clock
) {
1765 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1766 return ktime_get_boot_ns() + ka
->kvmclock_offset
;
1769 hv_clock
.tsc_timestamp
= ka
->master_cycle_now
;
1770 hv_clock
.system_time
= ka
->master_kernel_ns
+ ka
->kvmclock_offset
;
1771 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1773 /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1776 kvm_get_time_scale(NSEC_PER_SEC
, __this_cpu_read(cpu_tsc_khz
) * 1000LL,
1777 &hv_clock
.tsc_shift
,
1778 &hv_clock
.tsc_to_system_mul
);
1779 ret
= __pvclock_read_cycles(&hv_clock
, rdtsc());
1786 static void kvm_setup_pvclock_page(struct kvm_vcpu
*v
)
1788 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1789 struct pvclock_vcpu_time_info guest_hv_clock
;
1791 if (unlikely(kvm_read_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1792 &guest_hv_clock
, sizeof(guest_hv_clock
))))
1795 /* This VCPU is paused, but it's legal for a guest to read another
1796 * VCPU's kvmclock, so we really have to follow the specification where
1797 * it says that version is odd if data is being modified, and even after
1800 * Version field updates must be kept separate. This is because
1801 * kvm_write_guest_cached might use a "rep movs" instruction, and
1802 * writes within a string instruction are weakly ordered. So there
1803 * are three writes overall.
1805 * As a small optimization, only write the version field in the first
1806 * and third write. The vcpu->pv_time cache is still valid, because the
1807 * version field is the first in the struct.
1809 BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info
, version
) != 0);
1811 vcpu
->hv_clock
.version
= guest_hv_clock
.version
+ 1;
1812 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1814 sizeof(vcpu
->hv_clock
.version
));
1818 /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1819 vcpu
->hv_clock
.flags
|= (guest_hv_clock
.flags
& PVCLOCK_GUEST_STOPPED
);
1821 if (vcpu
->pvclock_set_guest_stopped_request
) {
1822 vcpu
->hv_clock
.flags
|= PVCLOCK_GUEST_STOPPED
;
1823 vcpu
->pvclock_set_guest_stopped_request
= false;
1826 trace_kvm_pvclock_update(v
->vcpu_id
, &vcpu
->hv_clock
);
1828 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1830 sizeof(vcpu
->hv_clock
));
1834 vcpu
->hv_clock
.version
++;
1835 kvm_write_guest_cached(v
->kvm
, &vcpu
->pv_time
,
1837 sizeof(vcpu
->hv_clock
.version
));
1840 static int kvm_guest_time_update(struct kvm_vcpu
*v
)
1842 unsigned long flags
, tgt_tsc_khz
;
1843 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
1844 struct kvm_arch
*ka
= &v
->kvm
->arch
;
1846 u64 tsc_timestamp
, host_tsc
;
1848 bool use_master_clock
;
1854 * If the host uses TSC clock, then passthrough TSC as stable
1857 spin_lock(&ka
->pvclock_gtod_sync_lock
);
1858 use_master_clock
= ka
->use_master_clock
;
1859 if (use_master_clock
) {
1860 host_tsc
= ka
->master_cycle_now
;
1861 kernel_ns
= ka
->master_kernel_ns
;
1863 spin_unlock(&ka
->pvclock_gtod_sync_lock
);
1865 /* Keep irq disabled to prevent changes to the clock */
1866 local_irq_save(flags
);
1867 tgt_tsc_khz
= __this_cpu_read(cpu_tsc_khz
);
1868 if (unlikely(tgt_tsc_khz
== 0)) {
1869 local_irq_restore(flags
);
1870 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1873 if (!use_master_clock
) {
1875 kernel_ns
= ktime_get_boot_ns();
1878 tsc_timestamp
= kvm_read_l1_tsc(v
, host_tsc
);
1881 * We may have to catch up the TSC to match elapsed wall clock
1882 * time for two reasons, even if kvmclock is used.
1883 * 1) CPU could have been running below the maximum TSC rate
1884 * 2) Broken TSC compensation resets the base at each VCPU
1885 * entry to avoid unknown leaps of TSC even when running
1886 * again on the same CPU. This may cause apparent elapsed
1887 * time to disappear, and the guest to stand still or run
1890 if (vcpu
->tsc_catchup
) {
1891 u64 tsc
= compute_guest_tsc(v
, kernel_ns
);
1892 if (tsc
> tsc_timestamp
) {
1893 adjust_tsc_offset_guest(v
, tsc
- tsc_timestamp
);
1894 tsc_timestamp
= tsc
;
1898 local_irq_restore(flags
);
1900 /* With all the info we got, fill in the values */
1902 if (kvm_has_tsc_control
)
1903 tgt_tsc_khz
= kvm_scale_tsc(v
, tgt_tsc_khz
);
1905 if (unlikely(vcpu
->hw_tsc_khz
!= tgt_tsc_khz
)) {
1906 kvm_get_time_scale(NSEC_PER_SEC
, tgt_tsc_khz
* 1000LL,
1907 &vcpu
->hv_clock
.tsc_shift
,
1908 &vcpu
->hv_clock
.tsc_to_system_mul
);
1909 vcpu
->hw_tsc_khz
= tgt_tsc_khz
;
1912 vcpu
->hv_clock
.tsc_timestamp
= tsc_timestamp
;
1913 vcpu
->hv_clock
.system_time
= kernel_ns
+ v
->kvm
->arch
.kvmclock_offset
;
1914 vcpu
->last_guest_tsc
= tsc_timestamp
;
1916 /* If the host uses TSC clocksource, then it is stable */
1918 if (use_master_clock
)
1919 pvclock_flags
|= PVCLOCK_TSC_STABLE_BIT
;
1921 vcpu
->hv_clock
.flags
= pvclock_flags
;
1923 if (vcpu
->pv_time_enabled
)
1924 kvm_setup_pvclock_page(v
);
1925 if (v
== kvm_get_vcpu(v
->kvm
, 0))
1926 kvm_hv_setup_tsc_page(v
->kvm
, &vcpu
->hv_clock
);
1931 * kvmclock updates which are isolated to a given vcpu, such as
1932 * vcpu->cpu migration, should not allow system_timestamp from
1933 * the rest of the vcpus to remain static. Otherwise ntp frequency
1934 * correction applies to one vcpu's system_timestamp but not
1937 * So in those cases, request a kvmclock update for all vcpus.
1938 * We need to rate-limit these requests though, as they can
1939 * considerably slow guests that have a large number of vcpus.
1940 * The time for a remote vcpu to update its kvmclock is bound
1941 * by the delay we use to rate-limit the updates.
1944 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1946 static void kvmclock_update_fn(struct work_struct
*work
)
1949 struct delayed_work
*dwork
= to_delayed_work(work
);
1950 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1951 kvmclock_update_work
);
1952 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1953 struct kvm_vcpu
*vcpu
;
1955 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
1956 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
1957 kvm_vcpu_kick(vcpu
);
1961 static void kvm_gen_kvmclock_update(struct kvm_vcpu
*v
)
1963 struct kvm
*kvm
= v
->kvm
;
1965 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, v
);
1966 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
,
1967 KVMCLOCK_UPDATE_DELAY
);
1970 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1972 static void kvmclock_sync_fn(struct work_struct
*work
)
1974 struct delayed_work
*dwork
= to_delayed_work(work
);
1975 struct kvm_arch
*ka
= container_of(dwork
, struct kvm_arch
,
1976 kvmclock_sync_work
);
1977 struct kvm
*kvm
= container_of(ka
, struct kvm
, arch
);
1979 if (!kvmclock_periodic_sync
)
1982 schedule_delayed_work(&kvm
->arch
.kvmclock_update_work
, 0);
1983 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
1984 KVMCLOCK_SYNC_PERIOD
);
1987 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
1989 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1990 unsigned bank_num
= mcg_cap
& 0xff;
1993 case MSR_IA32_MCG_STATUS
:
1994 vcpu
->arch
.mcg_status
= data
;
1996 case MSR_IA32_MCG_CTL
:
1997 if (!(mcg_cap
& MCG_CTL_P
))
1999 if (data
!= 0 && data
!= ~(u64
)0)
2001 vcpu
->arch
.mcg_ctl
= data
;
2004 if (msr
>= MSR_IA32_MC0_CTL
&&
2005 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2006 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2007 /* only 0 or all 1s can be written to IA32_MCi_CTL
2008 * some Linux kernels though clear bit 10 in bank 4 to
2009 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2010 * this to avoid an uncatched #GP in the guest
2012 if ((offset
& 0x3) == 0 &&
2013 data
!= 0 && (data
| (1 << 10)) != ~(u64
)0)
2015 vcpu
->arch
.mce_banks
[offset
] = data
;
2023 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
2025 struct kvm
*kvm
= vcpu
->kvm
;
2026 int lm
= is_long_mode(vcpu
);
2027 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
2028 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
2029 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
2030 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
2031 u32 page_num
= data
& ~PAGE_MASK
;
2032 u64 page_addr
= data
& PAGE_MASK
;
2037 if (page_num
>= blob_size
)
2040 page
= memdup_user(blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
);
2045 if (kvm_vcpu_write_guest(vcpu
, page_addr
, page
, PAGE_SIZE
))
2054 static int kvm_pv_enable_async_pf(struct kvm_vcpu
*vcpu
, u64 data
)
2056 gpa_t gpa
= data
& ~0x3f;
2058 /* Bits 3:5 are reserved, Should be zero */
2062 vcpu
->arch
.apf
.msr_val
= data
;
2064 if (!(data
& KVM_ASYNC_PF_ENABLED
)) {
2065 kvm_clear_async_pf_completion_queue(vcpu
);
2066 kvm_async_pf_hash_reset(vcpu
);
2070 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, gpa
,
2074 vcpu
->arch
.apf
.send_user_only
= !(data
& KVM_ASYNC_PF_SEND_ALWAYS
);
2075 vcpu
->arch
.apf
.delivery_as_pf_vmexit
= data
& KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT
;
2076 kvm_async_pf_wakeup_all(vcpu
);
2080 static void kvmclock_reset(struct kvm_vcpu
*vcpu
)
2082 vcpu
->arch
.pv_time_enabled
= false;
2085 static void record_steal_time(struct kvm_vcpu
*vcpu
)
2087 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2090 if (unlikely(kvm_read_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2091 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
))))
2094 vcpu
->arch
.st
.steal
.preempted
= 0;
2096 if (vcpu
->arch
.st
.steal
.version
& 1)
2097 vcpu
->arch
.st
.steal
.version
+= 1; /* first time write, random junk */
2099 vcpu
->arch
.st
.steal
.version
+= 1;
2101 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2102 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2106 vcpu
->arch
.st
.steal
.steal
+= current
->sched_info
.run_delay
-
2107 vcpu
->arch
.st
.last_steal
;
2108 vcpu
->arch
.st
.last_steal
= current
->sched_info
.run_delay
;
2110 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2111 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2115 vcpu
->arch
.st
.steal
.version
+= 1;
2117 kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2118 &vcpu
->arch
.st
.steal
, sizeof(struct kvm_steal_time
));
2121 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2124 u32 msr
= msr_info
->index
;
2125 u64 data
= msr_info
->data
;
2128 case MSR_AMD64_NB_CFG
:
2129 case MSR_IA32_UCODE_REV
:
2130 case MSR_IA32_UCODE_WRITE
:
2131 case MSR_VM_HSAVE_PA
:
2132 case MSR_AMD64_PATCH_LOADER
:
2133 case MSR_AMD64_BU_CFG2
:
2134 case MSR_AMD64_DC_CFG
:
2138 return set_efer(vcpu
, data
);
2140 data
&= ~(u64
)0x40; /* ignore flush filter disable */
2141 data
&= ~(u64
)0x100; /* ignore ignne emulation enable */
2142 data
&= ~(u64
)0x8; /* ignore TLB cache disable */
2143 data
&= ~(u64
)0x40000; /* ignore Mc status write enable */
2145 vcpu_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
2150 case MSR_FAM10H_MMIO_CONF_BASE
:
2152 vcpu_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
2157 case MSR_IA32_DEBUGCTLMSR
:
2159 /* We support the non-activated case already */
2161 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
2162 /* Values other than LBR and BTF are vendor-specific,
2163 thus reserved and should throw a #GP */
2166 vcpu_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2169 case 0x200 ... 0x2ff:
2170 return kvm_mtrr_set_msr(vcpu
, msr
, data
);
2171 case MSR_IA32_APICBASE
:
2172 return kvm_set_apic_base(vcpu
, msr_info
);
2173 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2174 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
2175 case MSR_IA32_TSCDEADLINE
:
2176 kvm_set_lapic_tscdeadline_msr(vcpu
, data
);
2178 case MSR_IA32_TSC_ADJUST
:
2179 if (guest_cpuid_has(vcpu
, X86_FEATURE_TSC_ADJUST
)) {
2180 if (!msr_info
->host_initiated
) {
2181 s64 adj
= data
- vcpu
->arch
.ia32_tsc_adjust_msr
;
2182 adjust_tsc_offset_guest(vcpu
, adj
);
2184 vcpu
->arch
.ia32_tsc_adjust_msr
= data
;
2187 case MSR_IA32_MISC_ENABLE
:
2188 vcpu
->arch
.ia32_misc_enable_msr
= data
;
2190 case MSR_IA32_SMBASE
:
2191 if (!msr_info
->host_initiated
)
2193 vcpu
->arch
.smbase
= data
;
2195 case MSR_KVM_WALL_CLOCK_NEW
:
2196 case MSR_KVM_WALL_CLOCK
:
2197 vcpu
->kvm
->arch
.wall_clock
= data
;
2198 kvm_write_wall_clock(vcpu
->kvm
, data
);
2200 case MSR_KVM_SYSTEM_TIME_NEW
:
2201 case MSR_KVM_SYSTEM_TIME
: {
2202 struct kvm_arch
*ka
= &vcpu
->kvm
->arch
;
2204 kvmclock_reset(vcpu
);
2206 if (vcpu
->vcpu_id
== 0 && !msr_info
->host_initiated
) {
2207 bool tmp
= (msr
== MSR_KVM_SYSTEM_TIME
);
2209 if (ka
->boot_vcpu_runs_old_kvmclock
!= tmp
)
2210 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
2212 ka
->boot_vcpu_runs_old_kvmclock
= tmp
;
2215 vcpu
->arch
.time
= data
;
2216 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2218 /* we verify if the enable bit is set... */
2222 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
,
2223 &vcpu
->arch
.pv_time
, data
& ~1ULL,
2224 sizeof(struct pvclock_vcpu_time_info
)))
2225 vcpu
->arch
.pv_time_enabled
= false;
2227 vcpu
->arch
.pv_time_enabled
= true;
2231 case MSR_KVM_ASYNC_PF_EN
:
2232 if (kvm_pv_enable_async_pf(vcpu
, data
))
2235 case MSR_KVM_STEAL_TIME
:
2237 if (unlikely(!sched_info_on()))
2240 if (data
& KVM_STEAL_RESERVED_MASK
)
2243 if (kvm_gfn_to_hva_cache_init(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2244 data
& KVM_STEAL_VALID_BITS
,
2245 sizeof(struct kvm_steal_time
)))
2248 vcpu
->arch
.st
.msr_val
= data
;
2250 if (!(data
& KVM_MSR_ENABLED
))
2253 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2256 case MSR_KVM_PV_EOI_EN
:
2257 if (kvm_lapic_enable_pv_eoi(vcpu
, data
))
2261 case MSR_IA32_MCG_CTL
:
2262 case MSR_IA32_MCG_STATUS
:
2263 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2264 return set_msr_mce(vcpu
, msr
, data
);
2266 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2267 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2268 pr
= true; /* fall through */
2269 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2270 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2271 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2272 return kvm_pmu_set_msr(vcpu
, msr_info
);
2274 if (pr
|| data
!= 0)
2275 vcpu_unimpl(vcpu
, "disabled perfctr wrmsr: "
2276 "0x%x data 0x%llx\n", msr
, data
);
2278 case MSR_K7_CLK_CTL
:
2280 * Ignore all writes to this no longer documented MSR.
2281 * Writes are only relevant for old K7 processors,
2282 * all pre-dating SVM, but a recommended workaround from
2283 * AMD for these chips. It is possible to specify the
2284 * affected processor models on the command line, hence
2285 * the need to ignore the workaround.
2288 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2289 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2290 case HV_X64_MSR_CRASH_CTL
:
2291 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2292 return kvm_hv_set_msr_common(vcpu
, msr
, data
,
2293 msr_info
->host_initiated
);
2294 case MSR_IA32_BBL_CR_CTL3
:
2295 /* Drop writes to this legacy MSR -- see rdmsr
2296 * counterpart for further detail.
2298 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n", msr
, data
);
2300 case MSR_AMD64_OSVW_ID_LENGTH
:
2301 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2303 vcpu
->arch
.osvw
.length
= data
;
2305 case MSR_AMD64_OSVW_STATUS
:
2306 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2308 vcpu
->arch
.osvw
.status
= data
;
2310 case MSR_PLATFORM_INFO
:
2311 if (!msr_info
->host_initiated
||
2312 data
& ~MSR_PLATFORM_INFO_CPUID_FAULT
||
2313 (!(data
& MSR_PLATFORM_INFO_CPUID_FAULT
) &&
2314 cpuid_fault_enabled(vcpu
)))
2316 vcpu
->arch
.msr_platform_info
= data
;
2318 case MSR_MISC_FEATURES_ENABLES
:
2319 if (data
& ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
||
2320 (data
& MSR_MISC_FEATURES_ENABLES_CPUID_FAULT
&&
2321 !supports_cpuid_fault(vcpu
)))
2323 vcpu
->arch
.msr_misc_features_enables
= data
;
2326 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
2327 return xen_hvm_config(vcpu
, data
);
2328 if (kvm_pmu_is_valid_msr(vcpu
, msr
))
2329 return kvm_pmu_set_msr(vcpu
, msr_info
);
2331 vcpu_debug_ratelimited(vcpu
, "unhandled wrmsr: 0x%x data 0x%llx\n",
2335 vcpu_unimpl(vcpu
, "ignored wrmsr: 0x%x data 0x%llx\n",
2342 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
2346 * Reads an msr value (of 'msr_index') into 'pdata'.
2347 * Returns 0 on success, non-0 otherwise.
2348 * Assumes vcpu_load() was already called.
2350 int kvm_get_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr
)
2352 return kvm_x86_ops
->get_msr(vcpu
, msr
);
2354 EXPORT_SYMBOL_GPL(kvm_get_msr
);
2356 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
2359 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
2360 unsigned bank_num
= mcg_cap
& 0xff;
2363 case MSR_IA32_P5_MC_ADDR
:
2364 case MSR_IA32_P5_MC_TYPE
:
2367 case MSR_IA32_MCG_CAP
:
2368 data
= vcpu
->arch
.mcg_cap
;
2370 case MSR_IA32_MCG_CTL
:
2371 if (!(mcg_cap
& MCG_CTL_P
))
2373 data
= vcpu
->arch
.mcg_ctl
;
2375 case MSR_IA32_MCG_STATUS
:
2376 data
= vcpu
->arch
.mcg_status
;
2379 if (msr
>= MSR_IA32_MC0_CTL
&&
2380 msr
< MSR_IA32_MCx_CTL(bank_num
)) {
2381 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
2382 data
= vcpu
->arch
.mce_banks
[offset
];
2391 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
)
2393 switch (msr_info
->index
) {
2394 case MSR_IA32_PLATFORM_ID
:
2395 case MSR_IA32_EBL_CR_POWERON
:
2396 case MSR_IA32_DEBUGCTLMSR
:
2397 case MSR_IA32_LASTBRANCHFROMIP
:
2398 case MSR_IA32_LASTBRANCHTOIP
:
2399 case MSR_IA32_LASTINTFROMIP
:
2400 case MSR_IA32_LASTINTTOIP
:
2402 case MSR_K8_TSEG_ADDR
:
2403 case MSR_K8_TSEG_MASK
:
2405 case MSR_VM_HSAVE_PA
:
2406 case MSR_K8_INT_PENDING_MSG
:
2407 case MSR_AMD64_NB_CFG
:
2408 case MSR_FAM10H_MMIO_CONF_BASE
:
2409 case MSR_AMD64_BU_CFG2
:
2410 case MSR_IA32_PERF_CTL
:
2411 case MSR_AMD64_DC_CFG
:
2414 case MSR_K7_EVNTSEL0
... MSR_K7_EVNTSEL3
:
2415 case MSR_K7_PERFCTR0
... MSR_K7_PERFCTR3
:
2416 case MSR_P6_PERFCTR0
... MSR_P6_PERFCTR1
:
2417 case MSR_P6_EVNTSEL0
... MSR_P6_EVNTSEL1
:
2418 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2419 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2422 case MSR_IA32_UCODE_REV
:
2423 msr_info
->data
= 0x100000000ULL
;
2426 case 0x200 ... 0x2ff:
2427 return kvm_mtrr_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2428 case 0xcd: /* fsb frequency */
2432 * MSR_EBC_FREQUENCY_ID
2433 * Conservative value valid for even the basic CPU models.
2434 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2435 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2436 * and 266MHz for model 3, or 4. Set Core Clock
2437 * Frequency to System Bus Frequency Ratio to 1 (bits
2438 * 31:24) even though these are only valid for CPU
2439 * models > 2, however guests may end up dividing or
2440 * multiplying by zero otherwise.
2442 case MSR_EBC_FREQUENCY_ID
:
2443 msr_info
->data
= 1 << 24;
2445 case MSR_IA32_APICBASE
:
2446 msr_info
->data
= kvm_get_apic_base(vcpu
);
2448 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
2449 return kvm_x2apic_msr_read(vcpu
, msr_info
->index
, &msr_info
->data
);
2451 case MSR_IA32_TSCDEADLINE
:
2452 msr_info
->data
= kvm_get_lapic_tscdeadline_msr(vcpu
);
2454 case MSR_IA32_TSC_ADJUST
:
2455 msr_info
->data
= (u64
)vcpu
->arch
.ia32_tsc_adjust_msr
;
2457 case MSR_IA32_MISC_ENABLE
:
2458 msr_info
->data
= vcpu
->arch
.ia32_misc_enable_msr
;
2460 case MSR_IA32_SMBASE
:
2461 if (!msr_info
->host_initiated
)
2463 msr_info
->data
= vcpu
->arch
.smbase
;
2465 case MSR_IA32_PERF_STATUS
:
2466 /* TSC increment by tick */
2467 msr_info
->data
= 1000ULL;
2468 /* CPU multiplier */
2469 msr_info
->data
|= (((uint64_t)4ULL) << 40);
2472 msr_info
->data
= vcpu
->arch
.efer
;
2474 case MSR_KVM_WALL_CLOCK
:
2475 case MSR_KVM_WALL_CLOCK_NEW
:
2476 msr_info
->data
= vcpu
->kvm
->arch
.wall_clock
;
2478 case MSR_KVM_SYSTEM_TIME
:
2479 case MSR_KVM_SYSTEM_TIME_NEW
:
2480 msr_info
->data
= vcpu
->arch
.time
;
2482 case MSR_KVM_ASYNC_PF_EN
:
2483 msr_info
->data
= vcpu
->arch
.apf
.msr_val
;
2485 case MSR_KVM_STEAL_TIME
:
2486 msr_info
->data
= vcpu
->arch
.st
.msr_val
;
2488 case MSR_KVM_PV_EOI_EN
:
2489 msr_info
->data
= vcpu
->arch
.pv_eoi
.msr_val
;
2491 case MSR_IA32_P5_MC_ADDR
:
2492 case MSR_IA32_P5_MC_TYPE
:
2493 case MSR_IA32_MCG_CAP
:
2494 case MSR_IA32_MCG_CTL
:
2495 case MSR_IA32_MCG_STATUS
:
2496 case MSR_IA32_MC0_CTL
... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS
) - 1:
2497 return get_msr_mce(vcpu
, msr_info
->index
, &msr_info
->data
);
2498 case MSR_K7_CLK_CTL
:
2500 * Provide expected ramp-up count for K7. All other
2501 * are set to zero, indicating minimum divisors for
2504 * This prevents guest kernels on AMD host with CPU
2505 * type 6, model 8 and higher from exploding due to
2506 * the rdmsr failing.
2508 msr_info
->data
= 0x20000000;
2510 case HV_X64_MSR_GUEST_OS_ID
... HV_X64_MSR_SINT15
:
2511 case HV_X64_MSR_CRASH_P0
... HV_X64_MSR_CRASH_P4
:
2512 case HV_X64_MSR_CRASH_CTL
:
2513 case HV_X64_MSR_STIMER0_CONFIG
... HV_X64_MSR_STIMER3_COUNT
:
2514 return kvm_hv_get_msr_common(vcpu
,
2515 msr_info
->index
, &msr_info
->data
);
2517 case MSR_IA32_BBL_CR_CTL3
:
2518 /* This legacy MSR exists but isn't fully documented in current
2519 * silicon. It is however accessed by winxp in very narrow
2520 * scenarios where it sets bit #19, itself documented as
2521 * a "reserved" bit. Best effort attempt to source coherent
2522 * read data here should the balance of the register be
2523 * interpreted by the guest:
2525 * L2 cache control register 3: 64GB range, 256KB size,
2526 * enabled, latency 0x1, configured
2528 msr_info
->data
= 0xbe702111;
2530 case MSR_AMD64_OSVW_ID_LENGTH
:
2531 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2533 msr_info
->data
= vcpu
->arch
.osvw
.length
;
2535 case MSR_AMD64_OSVW_STATUS
:
2536 if (!guest_cpuid_has(vcpu
, X86_FEATURE_OSVW
))
2538 msr_info
->data
= vcpu
->arch
.osvw
.status
;
2540 case MSR_PLATFORM_INFO
:
2541 msr_info
->data
= vcpu
->arch
.msr_platform_info
;
2543 case MSR_MISC_FEATURES_ENABLES
:
2544 msr_info
->data
= vcpu
->arch
.msr_misc_features_enables
;
2547 if (kvm_pmu_is_valid_msr(vcpu
, msr_info
->index
))
2548 return kvm_pmu_get_msr(vcpu
, msr_info
->index
, &msr_info
->data
);
2550 vcpu_debug_ratelimited(vcpu
, "unhandled rdmsr: 0x%x\n",
2554 vcpu_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr_info
->index
);
2561 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
2564 * Read or write a bunch of msrs. All parameters are kernel addresses.
2566 * @return number of msrs set successfully.
2568 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
2569 struct kvm_msr_entry
*entries
,
2570 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2571 unsigned index
, u64
*data
))
2575 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2576 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
2577 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
2579 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2585 * Read or write a bunch of msrs. Parameters are user addresses.
2587 * @return number of msrs set successfully.
2589 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
2590 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
2591 unsigned index
, u64
*data
),
2594 struct kvm_msrs msrs
;
2595 struct kvm_msr_entry
*entries
;
2600 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
2604 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
2607 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
2608 entries
= memdup_user(user_msrs
->entries
, size
);
2609 if (IS_ERR(entries
)) {
2610 r
= PTR_ERR(entries
);
2614 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
2619 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
2630 int kvm_vm_ioctl_check_extension(struct kvm
*kvm
, long ext
)
2635 case KVM_CAP_IRQCHIP
:
2637 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
2638 case KVM_CAP_SET_TSS_ADDR
:
2639 case KVM_CAP_EXT_CPUID
:
2640 case KVM_CAP_EXT_EMUL_CPUID
:
2641 case KVM_CAP_CLOCKSOURCE
:
2643 case KVM_CAP_NOP_IO_DELAY
:
2644 case KVM_CAP_MP_STATE
:
2645 case KVM_CAP_SYNC_MMU
:
2646 case KVM_CAP_USER_NMI
:
2647 case KVM_CAP_REINJECT_CONTROL
:
2648 case KVM_CAP_IRQ_INJECT_STATUS
:
2649 case KVM_CAP_IOEVENTFD
:
2650 case KVM_CAP_IOEVENTFD_NO_LENGTH
:
2652 case KVM_CAP_PIT_STATE2
:
2653 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
2654 case KVM_CAP_XEN_HVM
:
2655 case KVM_CAP_VCPU_EVENTS
:
2656 case KVM_CAP_HYPERV
:
2657 case KVM_CAP_HYPERV_VAPIC
:
2658 case KVM_CAP_HYPERV_SPIN
:
2659 case KVM_CAP_HYPERV_SYNIC
:
2660 case KVM_CAP_HYPERV_SYNIC2
:
2661 case KVM_CAP_HYPERV_VP_INDEX
:
2662 case KVM_CAP_PCI_SEGMENT
:
2663 case KVM_CAP_DEBUGREGS
:
2664 case KVM_CAP_X86_ROBUST_SINGLESTEP
:
2666 case KVM_CAP_ASYNC_PF
:
2667 case KVM_CAP_GET_TSC_KHZ
:
2668 case KVM_CAP_KVMCLOCK_CTRL
:
2669 case KVM_CAP_READONLY_MEM
:
2670 case KVM_CAP_HYPERV_TIME
:
2671 case KVM_CAP_IOAPIC_POLARITY_IGNORED
:
2672 case KVM_CAP_TSC_DEADLINE_TIMER
:
2673 case KVM_CAP_ENABLE_CAP_VM
:
2674 case KVM_CAP_DISABLE_QUIRKS
:
2675 case KVM_CAP_SET_BOOT_CPU_ID
:
2676 case KVM_CAP_SPLIT_IRQCHIP
:
2677 case KVM_CAP_IMMEDIATE_EXIT
:
2680 case KVM_CAP_ADJUST_CLOCK
:
2681 r
= KVM_CLOCK_TSC_STABLE
;
2683 case KVM_CAP_X86_GUEST_MWAIT
:
2684 r
= kvm_mwait_in_guest();
2686 case KVM_CAP_X86_SMM
:
2687 /* SMBASE is usually relocated above 1M on modern chipsets,
2688 * and SMM handlers might indeed rely on 4G segment limits,
2689 * so do not report SMM to be available if real mode is
2690 * emulated via vm86 mode. Still, do not go to great lengths
2691 * to avoid userspace's usage of the feature, because it is a
2692 * fringe case that is not enabled except via specific settings
2693 * of the module parameters.
2695 r
= kvm_x86_ops
->cpu_has_high_real_mode_segbase();
2698 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
2700 case KVM_CAP_NR_VCPUS
:
2701 r
= KVM_SOFT_MAX_VCPUS
;
2703 case KVM_CAP_MAX_VCPUS
:
2706 case KVM_CAP_NR_MEMSLOTS
:
2707 r
= KVM_USER_MEM_SLOTS
;
2709 case KVM_CAP_PV_MMU
: /* obsolete */
2713 r
= KVM_MAX_MCE_BANKS
;
2716 r
= boot_cpu_has(X86_FEATURE_XSAVE
);
2718 case KVM_CAP_TSC_CONTROL
:
2719 r
= kvm_has_tsc_control
;
2721 case KVM_CAP_X2APIC_API
:
2722 r
= KVM_X2APIC_API_VALID_FLAGS
;
2732 long kvm_arch_dev_ioctl(struct file
*filp
,
2733 unsigned int ioctl
, unsigned long arg
)
2735 void __user
*argp
= (void __user
*)arg
;
2739 case KVM_GET_MSR_INDEX_LIST
: {
2740 struct kvm_msr_list __user
*user_msr_list
= argp
;
2741 struct kvm_msr_list msr_list
;
2745 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
2748 msr_list
.nmsrs
= num_msrs_to_save
+ num_emulated_msrs
;
2749 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
2752 if (n
< msr_list
.nmsrs
)
2755 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
2756 num_msrs_to_save
* sizeof(u32
)))
2758 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
2760 num_emulated_msrs
* sizeof(u32
)))
2765 case KVM_GET_SUPPORTED_CPUID
:
2766 case KVM_GET_EMULATED_CPUID
: {
2767 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
2768 struct kvm_cpuid2 cpuid
;
2771 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
2774 r
= kvm_dev_ioctl_get_cpuid(&cpuid
, cpuid_arg
->entries
,
2780 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
2785 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
2787 if (copy_to_user(argp
, &kvm_mce_cap_supported
,
2788 sizeof(kvm_mce_cap_supported
)))
2800 static void wbinvd_ipi(void *garbage
)
2805 static bool need_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
2807 return kvm_arch_has_noncoherent_dma(vcpu
->kvm
);
2810 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
2812 /* Address WBINVD may be executed by guest */
2813 if (need_emulate_wbinvd(vcpu
)) {
2814 if (kvm_x86_ops
->has_wbinvd_exit())
2815 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
2816 else if (vcpu
->cpu
!= -1 && vcpu
->cpu
!= cpu
)
2817 smp_call_function_single(vcpu
->cpu
,
2818 wbinvd_ipi
, NULL
, 1);
2821 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
2823 /* Apply any externally detected TSC adjustments (due to suspend) */
2824 if (unlikely(vcpu
->arch
.tsc_offset_adjustment
)) {
2825 adjust_tsc_offset_host(vcpu
, vcpu
->arch
.tsc_offset_adjustment
);
2826 vcpu
->arch
.tsc_offset_adjustment
= 0;
2827 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
2830 if (unlikely(vcpu
->cpu
!= cpu
) || check_tsc_unstable()) {
2831 s64 tsc_delta
= !vcpu
->arch
.last_host_tsc
? 0 :
2832 rdtsc() - vcpu
->arch
.last_host_tsc
;
2834 mark_tsc_unstable("KVM discovered backwards TSC");
2836 if (check_tsc_unstable()) {
2837 u64 offset
= kvm_compute_tsc_offset(vcpu
,
2838 vcpu
->arch
.last_guest_tsc
);
2839 kvm_vcpu_write_tsc_offset(vcpu
, offset
);
2840 vcpu
->arch
.tsc_catchup
= 1;
2843 if (kvm_lapic_hv_timer_in_use(vcpu
))
2844 kvm_lapic_restart_hv_timer(vcpu
);
2847 * On a host with synchronized TSC, there is no need to update
2848 * kvmclock on vcpu->cpu migration
2850 if (!vcpu
->kvm
->arch
.use_master_clock
|| vcpu
->cpu
== -1)
2851 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
);
2852 if (vcpu
->cpu
!= cpu
)
2853 kvm_make_request(KVM_REQ_MIGRATE_TIMER
, vcpu
);
2857 kvm_make_request(KVM_REQ_STEAL_UPDATE
, vcpu
);
2860 static void kvm_steal_time_set_preempted(struct kvm_vcpu
*vcpu
)
2862 if (!(vcpu
->arch
.st
.msr_val
& KVM_MSR_ENABLED
))
2865 vcpu
->arch
.st
.steal
.preempted
= 1;
2867 kvm_write_guest_offset_cached(vcpu
->kvm
, &vcpu
->arch
.st
.stime
,
2868 &vcpu
->arch
.st
.steal
.preempted
,
2869 offsetof(struct kvm_steal_time
, preempted
),
2870 sizeof(vcpu
->arch
.st
.steal
.preempted
));
2873 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
2877 if (vcpu
->preempted
)
2878 vcpu
->arch
.preempted_in_kernel
= !kvm_x86_ops
->get_cpl(vcpu
);
2881 * Disable page faults because we're in atomic context here.
2882 * kvm_write_guest_offset_cached() would call might_fault()
2883 * that relies on pagefault_disable() to tell if there's a
2884 * bug. NOTE: the write to guest memory may not go through if
2885 * during postcopy live migration or if there's heavy guest
2888 pagefault_disable();
2890 * kvm_memslots() will be called by
2891 * kvm_write_guest_offset_cached() so take the srcu lock.
2893 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
2894 kvm_steal_time_set_preempted(vcpu
);
2895 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
2897 kvm_x86_ops
->vcpu_put(vcpu
);
2898 kvm_put_guest_fpu(vcpu
);
2899 vcpu
->arch
.last_host_tsc
= rdtsc();
2902 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
2903 struct kvm_lapic_state
*s
)
2905 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
2906 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
2908 return kvm_apic_get_state(vcpu
, s
);
2911 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
2912 struct kvm_lapic_state
*s
)
2916 r
= kvm_apic_set_state(vcpu
, s
);
2919 update_cr8_intercept(vcpu
);
2924 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu
*vcpu
)
2926 return (!lapic_in_kernel(vcpu
) ||
2927 kvm_apic_accept_pic_intr(vcpu
));
2931 * if userspace requested an interrupt window, check that the
2932 * interrupt window is open.
2934 * No need to exit to userspace if we already have an interrupt queued.
2936 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu
*vcpu
)
2938 return kvm_arch_interrupt_allowed(vcpu
) &&
2939 !kvm_cpu_has_interrupt(vcpu
) &&
2940 !kvm_event_needs_reinjection(vcpu
) &&
2941 kvm_cpu_accept_dm_intr(vcpu
);
2944 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
2945 struct kvm_interrupt
*irq
)
2947 if (irq
->irq
>= KVM_NR_INTERRUPTS
)
2950 if (!irqchip_in_kernel(vcpu
->kvm
)) {
2951 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
2952 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2957 * With in-kernel LAPIC, we only use this to inject EXTINT, so
2958 * fail for in-kernel 8259.
2960 if (pic_in_kernel(vcpu
->kvm
))
2963 if (vcpu
->arch
.pending_external_vector
!= -1)
2966 vcpu
->arch
.pending_external_vector
= irq
->irq
;
2967 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
2971 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
2973 kvm_inject_nmi(vcpu
);
2978 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu
*vcpu
)
2980 kvm_make_request(KVM_REQ_SMI
, vcpu
);
2985 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
2986 struct kvm_tpr_access_ctl
*tac
)
2990 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
2994 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
2998 unsigned bank_num
= mcg_cap
& 0xff, bank
;
3001 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
3003 if (mcg_cap
& ~(kvm_mce_cap_supported
| 0xff | 0xff0000))
3006 vcpu
->arch
.mcg_cap
= mcg_cap
;
3007 /* Init IA32_MCG_CTL to all 1s */
3008 if (mcg_cap
& MCG_CTL_P
)
3009 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
3010 /* Init IA32_MCi_CTL to all 1s */
3011 for (bank
= 0; bank
< bank_num
; bank
++)
3012 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
3014 if (kvm_x86_ops
->setup_mce
)
3015 kvm_x86_ops
->setup_mce(vcpu
);
3020 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
3021 struct kvm_x86_mce
*mce
)
3023 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
3024 unsigned bank_num
= mcg_cap
& 0xff;
3025 u64
*banks
= vcpu
->arch
.mce_banks
;
3027 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
3030 * if IA32_MCG_CTL is not all 1s, the uncorrected error
3031 * reporting is disabled
3033 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
3034 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
3036 banks
+= 4 * mce
->bank
;
3038 * if IA32_MCi_CTL is not all 1s, the uncorrected error
3039 * reporting is disabled for the bank
3041 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
3043 if (mce
->status
& MCI_STATUS_UC
) {
3044 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
3045 !kvm_read_cr4_bits(vcpu
, X86_CR4_MCE
)) {
3046 kvm_make_request(KVM_REQ_TRIPLE_FAULT
, vcpu
);
3049 if (banks
[1] & MCI_STATUS_VAL
)
3050 mce
->status
|= MCI_STATUS_OVER
;
3051 banks
[2] = mce
->addr
;
3052 banks
[3] = mce
->misc
;
3053 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
3054 banks
[1] = mce
->status
;
3055 kvm_queue_exception(vcpu
, MC_VECTOR
);
3056 } else if (!(banks
[1] & MCI_STATUS_VAL
)
3057 || !(banks
[1] & MCI_STATUS_UC
)) {
3058 if (banks
[1] & MCI_STATUS_VAL
)
3059 mce
->status
|= MCI_STATUS_OVER
;
3060 banks
[2] = mce
->addr
;
3061 banks
[3] = mce
->misc
;
3062 banks
[1] = mce
->status
;
3064 banks
[1] |= MCI_STATUS_OVER
;
3068 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu
*vcpu
,
3069 struct kvm_vcpu_events
*events
)
3072 events
->exception
.injected
=
3073 vcpu
->arch
.exception
.pending
&&
3074 !kvm_exception_is_soft(vcpu
->arch
.exception
.nr
);
3075 events
->exception
.nr
= vcpu
->arch
.exception
.nr
;
3076 events
->exception
.has_error_code
= vcpu
->arch
.exception
.has_error_code
;
3077 events
->exception
.pad
= 0;
3078 events
->exception
.error_code
= vcpu
->arch
.exception
.error_code
;
3080 events
->interrupt
.injected
=
3081 vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
;
3082 events
->interrupt
.nr
= vcpu
->arch
.interrupt
.nr
;
3083 events
->interrupt
.soft
= 0;
3084 events
->interrupt
.shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
3086 events
->nmi
.injected
= vcpu
->arch
.nmi_injected
;
3087 events
->nmi
.pending
= vcpu
->arch
.nmi_pending
!= 0;
3088 events
->nmi
.masked
= kvm_x86_ops
->get_nmi_mask(vcpu
);
3089 events
->nmi
.pad
= 0;
3091 events
->sipi_vector
= 0; /* never valid when reporting to user space */
3093 events
->smi
.smm
= is_smm(vcpu
);
3094 events
->smi
.pending
= vcpu
->arch
.smi_pending
;
3095 events
->smi
.smm_inside_nmi
=
3096 !!(vcpu
->arch
.hflags
& HF_SMM_INSIDE_NMI_MASK
);
3097 events
->smi
.latched_init
= kvm_lapic_latched_init(vcpu
);
3099 events
->flags
= (KVM_VCPUEVENT_VALID_NMI_PENDING
3100 | KVM_VCPUEVENT_VALID_SHADOW
3101 | KVM_VCPUEVENT_VALID_SMM
);
3102 memset(&events
->reserved
, 0, sizeof(events
->reserved
));
3105 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
);
3107 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu
*vcpu
,
3108 struct kvm_vcpu_events
*events
)
3110 if (events
->flags
& ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3111 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3112 | KVM_VCPUEVENT_VALID_SHADOW
3113 | KVM_VCPUEVENT_VALID_SMM
))
3116 if (events
->exception
.injected
&&
3117 (events
->exception
.nr
> 31 || events
->exception
.nr
== NMI_VECTOR
||
3118 is_guest_mode(vcpu
)))
3121 /* INITs are latched while in SMM */
3122 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
&&
3123 (events
->smi
.smm
|| events
->smi
.pending
) &&
3124 vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
)
3128 vcpu
->arch
.exception
.pending
= events
->exception
.injected
;
3129 vcpu
->arch
.exception
.nr
= events
->exception
.nr
;
3130 vcpu
->arch
.exception
.has_error_code
= events
->exception
.has_error_code
;
3131 vcpu
->arch
.exception
.error_code
= events
->exception
.error_code
;
3133 vcpu
->arch
.interrupt
.pending
= events
->interrupt
.injected
;
3134 vcpu
->arch
.interrupt
.nr
= events
->interrupt
.nr
;
3135 vcpu
->arch
.interrupt
.soft
= events
->interrupt
.soft
;
3136 if (events
->flags
& KVM_VCPUEVENT_VALID_SHADOW
)
3137 kvm_x86_ops
->set_interrupt_shadow(vcpu
,
3138 events
->interrupt
.shadow
);
3140 vcpu
->arch
.nmi_injected
= events
->nmi
.injected
;
3141 if (events
->flags
& KVM_VCPUEVENT_VALID_NMI_PENDING
)
3142 vcpu
->arch
.nmi_pending
= events
->nmi
.pending
;
3143 kvm_x86_ops
->set_nmi_mask(vcpu
, events
->nmi
.masked
);
3145 if (events
->flags
& KVM_VCPUEVENT_VALID_SIPI_VECTOR
&&
3146 lapic_in_kernel(vcpu
))
3147 vcpu
->arch
.apic
->sipi_vector
= events
->sipi_vector
;
3149 if (events
->flags
& KVM_VCPUEVENT_VALID_SMM
) {
3150 u32 hflags
= vcpu
->arch
.hflags
;
3151 if (events
->smi
.smm
)
3152 hflags
|= HF_SMM_MASK
;
3154 hflags
&= ~HF_SMM_MASK
;
3155 kvm_set_hflags(vcpu
, hflags
);
3157 vcpu
->arch
.smi_pending
= events
->smi
.pending
;
3159 if (events
->smi
.smm
) {
3160 if (events
->smi
.smm_inside_nmi
)
3161 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
3163 vcpu
->arch
.hflags
&= ~HF_SMM_INSIDE_NMI_MASK
;
3164 if (lapic_in_kernel(vcpu
)) {
3165 if (events
->smi
.latched_init
)
3166 set_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3168 clear_bit(KVM_APIC_INIT
, &vcpu
->arch
.apic
->pending_events
);
3173 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
3178 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu
*vcpu
,
3179 struct kvm_debugregs
*dbgregs
)
3183 memcpy(dbgregs
->db
, vcpu
->arch
.db
, sizeof(vcpu
->arch
.db
));
3184 kvm_get_dr(vcpu
, 6, &val
);
3186 dbgregs
->dr7
= vcpu
->arch
.dr7
;
3188 memset(&dbgregs
->reserved
, 0, sizeof(dbgregs
->reserved
));
3191 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu
*vcpu
,
3192 struct kvm_debugregs
*dbgregs
)
3197 if (dbgregs
->dr6
& ~0xffffffffull
)
3199 if (dbgregs
->dr7
& ~0xffffffffull
)
3202 memcpy(vcpu
->arch
.db
, dbgregs
->db
, sizeof(vcpu
->arch
.db
));
3203 kvm_update_dr0123(vcpu
);
3204 vcpu
->arch
.dr6
= dbgregs
->dr6
;
3205 kvm_update_dr6(vcpu
);
3206 vcpu
->arch
.dr7
= dbgregs
->dr7
;
3207 kvm_update_dr7(vcpu
);
3212 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3214 static void fill_xsave(u8
*dest
, struct kvm_vcpu
*vcpu
)
3216 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3217 u64 xstate_bv
= xsave
->header
.xfeatures
;
3221 * Copy legacy XSAVE area, to avoid complications with CPUID
3222 * leaves 0 and 1 in the loop below.
3224 memcpy(dest
, xsave
, XSAVE_HDR_OFFSET
);
3227 xstate_bv
&= vcpu
->arch
.guest_supported_xcr0
| XFEATURE_MASK_FPSSE
;
3228 *(u64
*)(dest
+ XSAVE_HDR_OFFSET
) = xstate_bv
;
3231 * Copy each region from the possibly compacted offset to the
3232 * non-compacted offset.
3234 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3236 u64 feature
= valid
& -valid
;
3237 int index
= fls64(feature
) - 1;
3238 void *src
= get_xsave_addr(xsave
, feature
);
3241 u32 size
, offset
, ecx
, edx
;
3242 cpuid_count(XSTATE_CPUID
, index
,
3243 &size
, &offset
, &ecx
, &edx
);
3244 memcpy(dest
+ offset
, src
, size
);
3251 static void load_xsave(struct kvm_vcpu
*vcpu
, u8
*src
)
3253 struct xregs_state
*xsave
= &vcpu
->arch
.guest_fpu
.state
.xsave
;
3254 u64 xstate_bv
= *(u64
*)(src
+ XSAVE_HDR_OFFSET
);
3258 * Copy legacy XSAVE area, to avoid complications with CPUID
3259 * leaves 0 and 1 in the loop below.
3261 memcpy(xsave
, src
, XSAVE_HDR_OFFSET
);
3263 /* Set XSTATE_BV and possibly XCOMP_BV. */
3264 xsave
->header
.xfeatures
= xstate_bv
;
3265 if (boot_cpu_has(X86_FEATURE_XSAVES
))
3266 xsave
->header
.xcomp_bv
= host_xcr0
| XSTATE_COMPACTION_ENABLED
;
3269 * Copy each region from the non-compacted offset to the
3270 * possibly compacted offset.
3272 valid
= xstate_bv
& ~XFEATURE_MASK_FPSSE
;
3274 u64 feature
= valid
& -valid
;
3275 int index
= fls64(feature
) - 1;
3276 void *dest
= get_xsave_addr(xsave
, feature
);
3279 u32 size
, offset
, ecx
, edx
;
3280 cpuid_count(XSTATE_CPUID
, index
,
3281 &size
, &offset
, &ecx
, &edx
);
3282 memcpy(dest
, src
+ offset
, size
);
3289 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu
*vcpu
,
3290 struct kvm_xsave
*guest_xsave
)
3292 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3293 memset(guest_xsave
, 0, sizeof(struct kvm_xsave
));
3294 fill_xsave((u8
*) guest_xsave
->region
, vcpu
);
3296 memcpy(guest_xsave
->region
,
3297 &vcpu
->arch
.guest_fpu
.state
.fxsave
,
3298 sizeof(struct fxregs_state
));
3299 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)] =
3300 XFEATURE_MASK_FPSSE
;
3304 #define XSAVE_MXCSR_OFFSET 24
3306 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu
*vcpu
,
3307 struct kvm_xsave
*guest_xsave
)
3310 *(u64
*)&guest_xsave
->region
[XSAVE_HDR_OFFSET
/ sizeof(u32
)];
3311 u32 mxcsr
= *(u32
*)&guest_xsave
->region
[XSAVE_MXCSR_OFFSET
/ sizeof(u32
)];
3313 if (boot_cpu_has(X86_FEATURE_XSAVE
)) {
3315 * Here we allow setting states that are not present in
3316 * CPUID leaf 0xD, index 0, EDX:EAX. This is for compatibility
3317 * with old userspace.
3319 if (xstate_bv
& ~kvm_supported_xcr0() ||
3320 mxcsr
& ~mxcsr_feature_mask
)
3322 load_xsave(vcpu
, (u8
*)guest_xsave
->region
);
3324 if (xstate_bv
& ~XFEATURE_MASK_FPSSE
||
3325 mxcsr
& ~mxcsr_feature_mask
)
3327 memcpy(&vcpu
->arch
.guest_fpu
.state
.fxsave
,
3328 guest_xsave
->region
, sizeof(struct fxregs_state
));
3333 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu
*vcpu
,
3334 struct kvm_xcrs
*guest_xcrs
)
3336 if (!boot_cpu_has(X86_FEATURE_XSAVE
)) {
3337 guest_xcrs
->nr_xcrs
= 0;
3341 guest_xcrs
->nr_xcrs
= 1;
3342 guest_xcrs
->flags
= 0;
3343 guest_xcrs
->xcrs
[0].xcr
= XCR_XFEATURE_ENABLED_MASK
;
3344 guest_xcrs
->xcrs
[0].value
= vcpu
->arch
.xcr0
;
3347 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu
*vcpu
,
3348 struct kvm_xcrs
*guest_xcrs
)
3352 if (!boot_cpu_has(X86_FEATURE_XSAVE
))
3355 if (guest_xcrs
->nr_xcrs
> KVM_MAX_XCRS
|| guest_xcrs
->flags
)
3358 for (i
= 0; i
< guest_xcrs
->nr_xcrs
; i
++)
3359 /* Only support XCR0 currently */
3360 if (guest_xcrs
->xcrs
[i
].xcr
== XCR_XFEATURE_ENABLED_MASK
) {
3361 r
= __kvm_set_xcr(vcpu
, XCR_XFEATURE_ENABLED_MASK
,
3362 guest_xcrs
->xcrs
[i
].value
);
3371 * kvm_set_guest_paused() indicates to the guest kernel that it has been
3372 * stopped by the hypervisor. This function will be called from the host only.
3373 * EINVAL is returned when the host attempts to set the flag for a guest that
3374 * does not support pv clocks.
3376 static int kvm_set_guest_paused(struct kvm_vcpu
*vcpu
)
3378 if (!vcpu
->arch
.pv_time_enabled
)
3380 vcpu
->arch
.pvclock_set_guest_stopped_request
= true;
3381 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
3385 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu
*vcpu
,
3386 struct kvm_enable_cap
*cap
)
3392 case KVM_CAP_HYPERV_SYNIC2
:
3395 case KVM_CAP_HYPERV_SYNIC
:
3396 if (!irqchip_in_kernel(vcpu
->kvm
))
3398 return kvm_hv_activate_synic(vcpu
, cap
->cap
==
3399 KVM_CAP_HYPERV_SYNIC2
);
3405 long kvm_arch_vcpu_ioctl(struct file
*filp
,
3406 unsigned int ioctl
, unsigned long arg
)
3408 struct kvm_vcpu
*vcpu
= filp
->private_data
;
3409 void __user
*argp
= (void __user
*)arg
;
3412 struct kvm_lapic_state
*lapic
;
3413 struct kvm_xsave
*xsave
;
3414 struct kvm_xcrs
*xcrs
;
3420 case KVM_GET_LAPIC
: {
3422 if (!lapic_in_kernel(vcpu
))
3424 u
.lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
3429 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, u
.lapic
);
3433 if (copy_to_user(argp
, u
.lapic
, sizeof(struct kvm_lapic_state
)))
3438 case KVM_SET_LAPIC
: {
3440 if (!lapic_in_kernel(vcpu
))
3442 u
.lapic
= memdup_user(argp
, sizeof(*u
.lapic
));
3443 if (IS_ERR(u
.lapic
))
3444 return PTR_ERR(u
.lapic
);
3446 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, u
.lapic
);
3449 case KVM_INTERRUPT
: {
3450 struct kvm_interrupt irq
;
3453 if (copy_from_user(&irq
, argp
, sizeof irq
))
3455 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
3459 r
= kvm_vcpu_ioctl_nmi(vcpu
);
3463 r
= kvm_vcpu_ioctl_smi(vcpu
);
3466 case KVM_SET_CPUID
: {
3467 struct kvm_cpuid __user
*cpuid_arg
= argp
;
3468 struct kvm_cpuid cpuid
;
3471 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3473 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
3476 case KVM_SET_CPUID2
: {
3477 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3478 struct kvm_cpuid2 cpuid
;
3481 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3483 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
3484 cpuid_arg
->entries
);
3487 case KVM_GET_CPUID2
: {
3488 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
3489 struct kvm_cpuid2 cpuid
;
3492 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
3494 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
3495 cpuid_arg
->entries
);
3499 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
3505 r
= msr_io(vcpu
, argp
, do_get_msr
, 1);
3508 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
3510 case KVM_TPR_ACCESS_REPORTING
: {
3511 struct kvm_tpr_access_ctl tac
;
3514 if (copy_from_user(&tac
, argp
, sizeof tac
))
3516 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
3520 if (copy_to_user(argp
, &tac
, sizeof tac
))
3525 case KVM_SET_VAPIC_ADDR
: {
3526 struct kvm_vapic_addr va
;
3530 if (!lapic_in_kernel(vcpu
))
3533 if (copy_from_user(&va
, argp
, sizeof va
))
3535 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
3536 r
= kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
3537 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
3540 case KVM_X86_SETUP_MCE
: {
3544 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
3546 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
3549 case KVM_X86_SET_MCE
: {
3550 struct kvm_x86_mce mce
;
3553 if (copy_from_user(&mce
, argp
, sizeof mce
))
3555 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
3558 case KVM_GET_VCPU_EVENTS
: {
3559 struct kvm_vcpu_events events
;
3561 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu
, &events
);
3564 if (copy_to_user(argp
, &events
, sizeof(struct kvm_vcpu_events
)))
3569 case KVM_SET_VCPU_EVENTS
: {
3570 struct kvm_vcpu_events events
;
3573 if (copy_from_user(&events
, argp
, sizeof(struct kvm_vcpu_events
)))
3576 r
= kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu
, &events
);
3579 case KVM_GET_DEBUGREGS
: {
3580 struct kvm_debugregs dbgregs
;
3582 kvm_vcpu_ioctl_x86_get_debugregs(vcpu
, &dbgregs
);
3585 if (copy_to_user(argp
, &dbgregs
,
3586 sizeof(struct kvm_debugregs
)))
3591 case KVM_SET_DEBUGREGS
: {
3592 struct kvm_debugregs dbgregs
;
3595 if (copy_from_user(&dbgregs
, argp
,
3596 sizeof(struct kvm_debugregs
)))
3599 r
= kvm_vcpu_ioctl_x86_set_debugregs(vcpu
, &dbgregs
);
3602 case KVM_GET_XSAVE
: {
3603 u
.xsave
= kzalloc(sizeof(struct kvm_xsave
), GFP_KERNEL
);
3608 kvm_vcpu_ioctl_x86_get_xsave(vcpu
, u
.xsave
);
3611 if (copy_to_user(argp
, u
.xsave
, sizeof(struct kvm_xsave
)))
3616 case KVM_SET_XSAVE
: {
3617 u
.xsave
= memdup_user(argp
, sizeof(*u
.xsave
));
3618 if (IS_ERR(u
.xsave
))
3619 return PTR_ERR(u
.xsave
);
3621 r
= kvm_vcpu_ioctl_x86_set_xsave(vcpu
, u
.xsave
);
3624 case KVM_GET_XCRS
: {
3625 u
.xcrs
= kzalloc(sizeof(struct kvm_xcrs
), GFP_KERNEL
);
3630 kvm_vcpu_ioctl_x86_get_xcrs(vcpu
, u
.xcrs
);
3633 if (copy_to_user(argp
, u
.xcrs
,
3634 sizeof(struct kvm_xcrs
)))
3639 case KVM_SET_XCRS
: {
3640 u
.xcrs
= memdup_user(argp
, sizeof(*u
.xcrs
));
3642 return PTR_ERR(u
.xcrs
);
3644 r
= kvm_vcpu_ioctl_x86_set_xcrs(vcpu
, u
.xcrs
);
3647 case KVM_SET_TSC_KHZ
: {
3651 user_tsc_khz
= (u32
)arg
;
3653 if (user_tsc_khz
>= kvm_max_guest_tsc_khz
)
3656 if (user_tsc_khz
== 0)
3657 user_tsc_khz
= tsc_khz
;
3659 if (!kvm_set_tsc_khz(vcpu
, user_tsc_khz
))
3664 case KVM_GET_TSC_KHZ
: {
3665 r
= vcpu
->arch
.virtual_tsc_khz
;
3668 case KVM_KVMCLOCK_CTRL
: {
3669 r
= kvm_set_guest_paused(vcpu
);
3672 case KVM_ENABLE_CAP
: {
3673 struct kvm_enable_cap cap
;
3676 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
3678 r
= kvm_vcpu_ioctl_enable_cap(vcpu
, &cap
);
3689 int kvm_arch_vcpu_fault(struct kvm_vcpu
*vcpu
, struct vm_fault
*vmf
)
3691 return VM_FAULT_SIGBUS
;
3694 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
3698 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
3700 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
3704 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
3707 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
3711 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
3712 u32 kvm_nr_mmu_pages
)
3714 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
3717 mutex_lock(&kvm
->slots_lock
);
3719 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
3720 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
3722 mutex_unlock(&kvm
->slots_lock
);
3726 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
3728 return kvm
->arch
.n_max_mmu_pages
;
3731 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3733 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3737 switch (chip
->chip_id
) {
3738 case KVM_IRQCHIP_PIC_MASTER
:
3739 memcpy(&chip
->chip
.pic
, &pic
->pics
[0],
3740 sizeof(struct kvm_pic_state
));
3742 case KVM_IRQCHIP_PIC_SLAVE
:
3743 memcpy(&chip
->chip
.pic
, &pic
->pics
[1],
3744 sizeof(struct kvm_pic_state
));
3746 case KVM_IRQCHIP_IOAPIC
:
3747 kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
3756 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
3758 struct kvm_pic
*pic
= kvm
->arch
.vpic
;
3762 switch (chip
->chip_id
) {
3763 case KVM_IRQCHIP_PIC_MASTER
:
3764 spin_lock(&pic
->lock
);
3765 memcpy(&pic
->pics
[0], &chip
->chip
.pic
,
3766 sizeof(struct kvm_pic_state
));
3767 spin_unlock(&pic
->lock
);
3769 case KVM_IRQCHIP_PIC_SLAVE
:
3770 spin_lock(&pic
->lock
);
3771 memcpy(&pic
->pics
[1], &chip
->chip
.pic
,
3772 sizeof(struct kvm_pic_state
));
3773 spin_unlock(&pic
->lock
);
3775 case KVM_IRQCHIP_IOAPIC
:
3776 kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
3782 kvm_pic_update_irq(pic
);
3786 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3788 struct kvm_kpit_state
*kps
= &kvm
->arch
.vpit
->pit_state
;
3790 BUILD_BUG_ON(sizeof(*ps
) != sizeof(kps
->channels
));
3792 mutex_lock(&kps
->lock
);
3793 memcpy(ps
, &kps
->channels
, sizeof(*ps
));
3794 mutex_unlock(&kps
->lock
);
3798 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
3801 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3803 mutex_lock(&pit
->pit_state
.lock
);
3804 memcpy(&pit
->pit_state
.channels
, ps
, sizeof(*ps
));
3805 for (i
= 0; i
< 3; i
++)
3806 kvm_pit_load_count(pit
, i
, ps
->channels
[i
].count
, 0);
3807 mutex_unlock(&pit
->pit_state
.lock
);
3811 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3813 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
3814 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
3815 sizeof(ps
->channels
));
3816 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
3817 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
3818 memset(&ps
->reserved
, 0, sizeof(ps
->reserved
));
3822 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
3826 u32 prev_legacy
, cur_legacy
;
3827 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3829 mutex_lock(&pit
->pit_state
.lock
);
3830 prev_legacy
= pit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3831 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
3832 if (!prev_legacy
&& cur_legacy
)
3834 memcpy(&pit
->pit_state
.channels
, &ps
->channels
,
3835 sizeof(pit
->pit_state
.channels
));
3836 pit
->pit_state
.flags
= ps
->flags
;
3837 for (i
= 0; i
< 3; i
++)
3838 kvm_pit_load_count(pit
, i
, pit
->pit_state
.channels
[i
].count
,
3840 mutex_unlock(&pit
->pit_state
.lock
);
3844 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
3845 struct kvm_reinject_control
*control
)
3847 struct kvm_pit
*pit
= kvm
->arch
.vpit
;
3852 /* pit->pit_state.lock was overloaded to prevent userspace from getting
3853 * an inconsistent state after running multiple KVM_REINJECT_CONTROL
3854 * ioctls in parallel. Use a separate lock if that ioctl isn't rare.
3856 mutex_lock(&pit
->pit_state
.lock
);
3857 kvm_pit_set_reinject(pit
, control
->pit_reinject
);
3858 mutex_unlock(&pit
->pit_state
.lock
);
3864 * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3865 * @kvm: kvm instance
3866 * @log: slot id and address to which we copy the log
3868 * Steps 1-4 below provide general overview of dirty page logging. See
3869 * kvm_get_dirty_log_protect() function description for additional details.
3871 * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3872 * always flush the TLB (step 4) even if previous step failed and the dirty
3873 * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3874 * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3875 * writes will be marked dirty for next log read.
3877 * 1. Take a snapshot of the bit and clear it if needed.
3878 * 2. Write protect the corresponding page.
3879 * 3. Copy the snapshot to the userspace.
3880 * 4. Flush TLB's if needed.
3882 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
, struct kvm_dirty_log
*log
)
3884 bool is_dirty
= false;
3887 mutex_lock(&kvm
->slots_lock
);
3890 * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3892 if (kvm_x86_ops
->flush_log_dirty
)
3893 kvm_x86_ops
->flush_log_dirty(kvm
);
3895 r
= kvm_get_dirty_log_protect(kvm
, log
, &is_dirty
);
3898 * All the TLBs can be flushed out of mmu lock, see the comments in
3899 * kvm_mmu_slot_remove_write_access().
3901 lockdep_assert_held(&kvm
->slots_lock
);
3903 kvm_flush_remote_tlbs(kvm
);
3905 mutex_unlock(&kvm
->slots_lock
);
3909 int kvm_vm_ioctl_irq_line(struct kvm
*kvm
, struct kvm_irq_level
*irq_event
,
3912 if (!irqchip_in_kernel(kvm
))
3915 irq_event
->status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
3916 irq_event
->irq
, irq_event
->level
,
3921 static int kvm_vm_ioctl_enable_cap(struct kvm
*kvm
,
3922 struct kvm_enable_cap
*cap
)
3930 case KVM_CAP_DISABLE_QUIRKS
:
3931 kvm
->arch
.disabled_quirks
= cap
->args
[0];
3934 case KVM_CAP_SPLIT_IRQCHIP
: {
3935 mutex_lock(&kvm
->lock
);
3937 if (cap
->args
[0] > MAX_NR_RESERVED_IOAPIC_PINS
)
3938 goto split_irqchip_unlock
;
3940 if (irqchip_in_kernel(kvm
))
3941 goto split_irqchip_unlock
;
3942 if (kvm
->created_vcpus
)
3943 goto split_irqchip_unlock
;
3944 r
= kvm_setup_empty_irq_routing(kvm
);
3946 goto split_irqchip_unlock
;
3947 /* Pairs with irqchip_in_kernel. */
3949 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_SPLIT
;
3950 kvm
->arch
.nr_reserved_ioapic_pins
= cap
->args
[0];
3952 split_irqchip_unlock
:
3953 mutex_unlock(&kvm
->lock
);
3956 case KVM_CAP_X2APIC_API
:
3958 if (cap
->args
[0] & ~KVM_X2APIC_API_VALID_FLAGS
)
3961 if (cap
->args
[0] & KVM_X2APIC_API_USE_32BIT_IDS
)
3962 kvm
->arch
.x2apic_format
= true;
3963 if (cap
->args
[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK
)
3964 kvm
->arch
.x2apic_broadcast_quirk_disabled
= true;
3975 long kvm_arch_vm_ioctl(struct file
*filp
,
3976 unsigned int ioctl
, unsigned long arg
)
3978 struct kvm
*kvm
= filp
->private_data
;
3979 void __user
*argp
= (void __user
*)arg
;
3982 * This union makes it completely explicit to gcc-3.x
3983 * that these two variables' stack usage should be
3984 * combined, not added together.
3987 struct kvm_pit_state ps
;
3988 struct kvm_pit_state2 ps2
;
3989 struct kvm_pit_config pit_config
;
3993 case KVM_SET_TSS_ADDR
:
3994 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
3996 case KVM_SET_IDENTITY_MAP_ADDR
: {
4000 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
4002 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
4005 case KVM_SET_NR_MMU_PAGES
:
4006 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
4008 case KVM_GET_NR_MMU_PAGES
:
4009 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
4011 case KVM_CREATE_IRQCHIP
: {
4012 mutex_lock(&kvm
->lock
);
4015 if (irqchip_in_kernel(kvm
))
4016 goto create_irqchip_unlock
;
4019 if (kvm
->created_vcpus
)
4020 goto create_irqchip_unlock
;
4022 r
= kvm_pic_init(kvm
);
4024 goto create_irqchip_unlock
;
4026 r
= kvm_ioapic_init(kvm
);
4028 kvm_pic_destroy(kvm
);
4029 goto create_irqchip_unlock
;
4032 r
= kvm_setup_default_irq_routing(kvm
);
4034 kvm_ioapic_destroy(kvm
);
4035 kvm_pic_destroy(kvm
);
4036 goto create_irqchip_unlock
;
4038 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4040 kvm
->arch
.irqchip_mode
= KVM_IRQCHIP_KERNEL
;
4041 create_irqchip_unlock
:
4042 mutex_unlock(&kvm
->lock
);
4045 case KVM_CREATE_PIT
:
4046 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
4048 case KVM_CREATE_PIT2
:
4050 if (copy_from_user(&u
.pit_config
, argp
,
4051 sizeof(struct kvm_pit_config
)))
4054 mutex_lock(&kvm
->lock
);
4057 goto create_pit_unlock
;
4059 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
4063 mutex_unlock(&kvm
->lock
);
4065 case KVM_GET_IRQCHIP
: {
4066 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4067 struct kvm_irqchip
*chip
;
4069 chip
= memdup_user(argp
, sizeof(*chip
));
4076 if (!irqchip_kernel(kvm
))
4077 goto get_irqchip_out
;
4078 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
4080 goto get_irqchip_out
;
4082 if (copy_to_user(argp
, chip
, sizeof *chip
))
4083 goto get_irqchip_out
;
4089 case KVM_SET_IRQCHIP
: {
4090 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4091 struct kvm_irqchip
*chip
;
4093 chip
= memdup_user(argp
, sizeof(*chip
));
4100 if (!irqchip_kernel(kvm
))
4101 goto set_irqchip_out
;
4102 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
4104 goto set_irqchip_out
;
4112 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
4115 if (!kvm
->arch
.vpit
)
4117 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
4121 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
4128 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
4131 if (!kvm
->arch
.vpit
)
4133 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
4136 case KVM_GET_PIT2
: {
4138 if (!kvm
->arch
.vpit
)
4140 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
4144 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
4149 case KVM_SET_PIT2
: {
4151 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
4154 if (!kvm
->arch
.vpit
)
4156 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
4159 case KVM_REINJECT_CONTROL
: {
4160 struct kvm_reinject_control control
;
4162 if (copy_from_user(&control
, argp
, sizeof(control
)))
4164 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
4167 case KVM_SET_BOOT_CPU_ID
:
4169 mutex_lock(&kvm
->lock
);
4170 if (kvm
->created_vcpus
)
4173 kvm
->arch
.bsp_vcpu_id
= arg
;
4174 mutex_unlock(&kvm
->lock
);
4176 case KVM_XEN_HVM_CONFIG
: {
4178 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
4179 sizeof(struct kvm_xen_hvm_config
)))
4182 if (kvm
->arch
.xen_hvm_config
.flags
)
4187 case KVM_SET_CLOCK
: {
4188 struct kvm_clock_data user_ns
;
4192 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
4201 * TODO: userspace has to take care of races with VCPU_RUN, so
4202 * kvm_gen_update_masterclock() can be cut down to locked
4203 * pvclock_update_vm_gtod_copy().
4205 kvm_gen_update_masterclock(kvm
);
4206 now_ns
= get_kvmclock_ns(kvm
);
4207 kvm
->arch
.kvmclock_offset
+= user_ns
.clock
- now_ns
;
4208 kvm_make_all_cpus_request(kvm
, KVM_REQ_CLOCK_UPDATE
);
4211 case KVM_GET_CLOCK
: {
4212 struct kvm_clock_data user_ns
;
4215 now_ns
= get_kvmclock_ns(kvm
);
4216 user_ns
.clock
= now_ns
;
4217 user_ns
.flags
= kvm
->arch
.use_master_clock
? KVM_CLOCK_TSC_STABLE
: 0;
4218 memset(&user_ns
.pad
, 0, sizeof(user_ns
.pad
));
4221 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
4226 case KVM_ENABLE_CAP
: {
4227 struct kvm_enable_cap cap
;
4230 if (copy_from_user(&cap
, argp
, sizeof(cap
)))
4232 r
= kvm_vm_ioctl_enable_cap(kvm
, &cap
);
4242 static void kvm_init_msr_list(void)
4247 for (i
= j
= 0; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
4248 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
4252 * Even MSRs that are valid in the host may not be exposed
4253 * to the guests in some cases.
4255 switch (msrs_to_save
[i
]) {
4256 case MSR_IA32_BNDCFGS
:
4257 if (!kvm_x86_ops
->mpx_supported())
4261 if (!kvm_x86_ops
->rdtscp_supported())
4269 msrs_to_save
[j
] = msrs_to_save
[i
];
4272 num_msrs_to_save
= j
;
4274 for (i
= j
= 0; i
< ARRAY_SIZE(emulated_msrs
); i
++) {
4275 switch (emulated_msrs
[i
]) {
4276 case MSR_IA32_SMBASE
:
4277 if (!kvm_x86_ops
->cpu_has_high_real_mode_segbase())
4285 emulated_msrs
[j
] = emulated_msrs
[i
];
4288 num_emulated_msrs
= j
;
4291 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
4299 if (!(lapic_in_kernel(vcpu
) &&
4300 !kvm_iodevice_write(vcpu
, &vcpu
->arch
.apic
->dev
, addr
, n
, v
))
4301 && kvm_io_bus_write(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4312 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
4319 if (!(lapic_in_kernel(vcpu
) &&
4320 !kvm_iodevice_read(vcpu
, &vcpu
->arch
.apic
->dev
,
4322 && kvm_io_bus_read(vcpu
, KVM_MMIO_BUS
, addr
, n
, v
))
4324 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, n
, addr
, *(u64
*)v
);
4334 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4335 struct kvm_segment
*var
, int seg
)
4337 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4340 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4341 struct kvm_segment
*var
, int seg
)
4343 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4346 gpa_t
translate_nested_gpa(struct kvm_vcpu
*vcpu
, gpa_t gpa
, u32 access
,
4347 struct x86_exception
*exception
)
4351 BUG_ON(!mmu_is_nested(vcpu
));
4353 /* NPT walks are always user-walks */
4354 access
|= PFERR_USER_MASK
;
4355 t_gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, gpa
, access
, exception
);
4360 gpa_t
kvm_mmu_gva_to_gpa_read(struct kvm_vcpu
*vcpu
, gva_t gva
,
4361 struct x86_exception
*exception
)
4363 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4364 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4367 gpa_t
kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu
*vcpu
, gva_t gva
,
4368 struct x86_exception
*exception
)
4370 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4371 access
|= PFERR_FETCH_MASK
;
4372 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4375 gpa_t
kvm_mmu_gva_to_gpa_write(struct kvm_vcpu
*vcpu
, gva_t gva
,
4376 struct x86_exception
*exception
)
4378 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4379 access
|= PFERR_WRITE_MASK
;
4380 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4383 /* uses this to access any guest's mapped memory without checking CPL */
4384 gpa_t
kvm_mmu_gva_to_gpa_system(struct kvm_vcpu
*vcpu
, gva_t gva
,
4385 struct x86_exception
*exception
)
4387 return vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, 0, exception
);
4390 static int kvm_read_guest_virt_helper(gva_t addr
, void *val
, unsigned int bytes
,
4391 struct kvm_vcpu
*vcpu
, u32 access
,
4392 struct x86_exception
*exception
)
4395 int r
= X86EMUL_CONTINUE
;
4398 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
,
4400 unsigned offset
= addr
& (PAGE_SIZE
-1);
4401 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4404 if (gpa
== UNMAPPED_GVA
)
4405 return X86EMUL_PROPAGATE_FAULT
;
4406 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, data
,
4409 r
= X86EMUL_IO_NEEDED
;
4421 /* used for instruction fetching */
4422 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4423 gva_t addr
, void *val
, unsigned int bytes
,
4424 struct x86_exception
*exception
)
4426 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4427 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4431 /* Inline kvm_read_guest_virt_helper for speed. */
4432 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
, access
|PFERR_FETCH_MASK
,
4434 if (unlikely(gpa
== UNMAPPED_GVA
))
4435 return X86EMUL_PROPAGATE_FAULT
;
4437 offset
= addr
& (PAGE_SIZE
-1);
4438 if (WARN_ON(offset
+ bytes
> PAGE_SIZE
))
4439 bytes
= (unsigned)PAGE_SIZE
- offset
;
4440 ret
= kvm_vcpu_read_guest_page(vcpu
, gpa
>> PAGE_SHIFT
, val
,
4442 if (unlikely(ret
< 0))
4443 return X86EMUL_IO_NEEDED
;
4445 return X86EMUL_CONTINUE
;
4448 int kvm_read_guest_virt(struct x86_emulate_ctxt
*ctxt
,
4449 gva_t addr
, void *val
, unsigned int bytes
,
4450 struct x86_exception
*exception
)
4452 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4453 u32 access
= (kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0;
4455 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, access
,
4458 EXPORT_SYMBOL_GPL(kvm_read_guest_virt
);
4460 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4461 gva_t addr
, void *val
, unsigned int bytes
,
4462 struct x86_exception
*exception
)
4464 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4465 return kvm_read_guest_virt_helper(addr
, val
, bytes
, vcpu
, 0, exception
);
4468 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt
*ctxt
,
4469 unsigned long addr
, void *val
, unsigned int bytes
)
4471 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4472 int r
= kvm_vcpu_read_guest(vcpu
, addr
, val
, bytes
);
4474 return r
< 0 ? X86EMUL_IO_NEEDED
: X86EMUL_CONTINUE
;
4477 int kvm_write_guest_virt_system(struct x86_emulate_ctxt
*ctxt
,
4478 gva_t addr
, void *val
,
4480 struct x86_exception
*exception
)
4482 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4484 int r
= X86EMUL_CONTINUE
;
4487 gpa_t gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, addr
,
4490 unsigned offset
= addr
& (PAGE_SIZE
-1);
4491 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
4494 if (gpa
== UNMAPPED_GVA
)
4495 return X86EMUL_PROPAGATE_FAULT
;
4496 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, data
, towrite
);
4498 r
= X86EMUL_IO_NEEDED
;
4509 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system
);
4511 static int vcpu_is_mmio_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4512 gpa_t gpa
, bool write
)
4514 /* For APIC access vmexit */
4515 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4518 if (vcpu_match_mmio_gpa(vcpu
, gpa
)) {
4519 trace_vcpu_match_mmio(gva
, gpa
, write
, true);
4526 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu
*vcpu
, unsigned long gva
,
4527 gpa_t
*gpa
, struct x86_exception
*exception
,
4530 u32 access
= ((kvm_x86_ops
->get_cpl(vcpu
) == 3) ? PFERR_USER_MASK
: 0)
4531 | (write
? PFERR_WRITE_MASK
: 0);
4534 * currently PKRU is only applied to ept enabled guest so
4535 * there is no pkey in EPT page table for L1 guest or EPT
4536 * shadow page table for L2 guest.
4538 if (vcpu_match_mmio_gva(vcpu
, gva
)
4539 && !permission_fault(vcpu
, vcpu
->arch
.walk_mmu
,
4540 vcpu
->arch
.access
, 0, access
)) {
4541 *gpa
= vcpu
->arch
.mmio_gfn
<< PAGE_SHIFT
|
4542 (gva
& (PAGE_SIZE
- 1));
4543 trace_vcpu_match_mmio(gva
, *gpa
, write
, false);
4547 *gpa
= vcpu
->arch
.walk_mmu
->gva_to_gpa(vcpu
, gva
, access
, exception
);
4549 if (*gpa
== UNMAPPED_GVA
)
4552 return vcpu_is_mmio_gpa(vcpu
, gva
, *gpa
, write
);
4555 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4556 const void *val
, int bytes
)
4560 ret
= kvm_vcpu_write_guest(vcpu
, gpa
, val
, bytes
);
4563 kvm_page_track_write(vcpu
, gpa
, val
, bytes
);
4567 struct read_write_emulator_ops
{
4568 int (*read_write_prepare
)(struct kvm_vcpu
*vcpu
, void *val
,
4570 int (*read_write_emulate
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4571 void *val
, int bytes
);
4572 int (*read_write_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4573 int bytes
, void *val
);
4574 int (*read_write_exit_mmio
)(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4575 void *val
, int bytes
);
4579 static int read_prepare(struct kvm_vcpu
*vcpu
, void *val
, int bytes
)
4581 if (vcpu
->mmio_read_completed
) {
4582 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
4583 vcpu
->mmio_fragments
[0].gpa
, *(u64
*)val
);
4584 vcpu
->mmio_read_completed
= 0;
4591 static int read_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4592 void *val
, int bytes
)
4594 return !kvm_vcpu_read_guest(vcpu
, gpa
, val
, bytes
);
4597 static int write_emulate(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4598 void *val
, int bytes
)
4600 return emulator_write_phys(vcpu
, gpa
, val
, bytes
);
4603 static int write_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
, int bytes
, void *val
)
4605 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
4606 return vcpu_mmio_write(vcpu
, gpa
, bytes
, val
);
4609 static int read_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4610 void *val
, int bytes
)
4612 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
4613 return X86EMUL_IO_NEEDED
;
4616 static int write_exit_mmio(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
4617 void *val
, int bytes
)
4619 struct kvm_mmio_fragment
*frag
= &vcpu
->mmio_fragments
[0];
4621 memcpy(vcpu
->run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
4622 return X86EMUL_CONTINUE
;
4625 static const struct read_write_emulator_ops read_emultor
= {
4626 .read_write_prepare
= read_prepare
,
4627 .read_write_emulate
= read_emulate
,
4628 .read_write_mmio
= vcpu_mmio_read
,
4629 .read_write_exit_mmio
= read_exit_mmio
,
4632 static const struct read_write_emulator_ops write_emultor
= {
4633 .read_write_emulate
= write_emulate
,
4634 .read_write_mmio
= write_mmio
,
4635 .read_write_exit_mmio
= write_exit_mmio
,
4639 static int emulator_read_write_onepage(unsigned long addr
, void *val
,
4641 struct x86_exception
*exception
,
4642 struct kvm_vcpu
*vcpu
,
4643 const struct read_write_emulator_ops
*ops
)
4647 bool write
= ops
->write
;
4648 struct kvm_mmio_fragment
*frag
;
4649 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
4652 * If the exit was due to a NPF we may already have a GPA.
4653 * If the GPA is present, use it to avoid the GVA to GPA table walk.
4654 * Note, this cannot be used on string operations since string
4655 * operation using rep will only have the initial GPA from the NPF
4658 if (vcpu
->arch
.gpa_available
&&
4659 emulator_can_use_gpa(ctxt
) &&
4660 (addr
& ~PAGE_MASK
) == (vcpu
->arch
.gpa_val
& ~PAGE_MASK
)) {
4661 gpa
= vcpu
->arch
.gpa_val
;
4662 ret
= vcpu_is_mmio_gpa(vcpu
, addr
, gpa
, write
);
4664 ret
= vcpu_mmio_gva_to_gpa(vcpu
, addr
, &gpa
, exception
, write
);
4666 return X86EMUL_PROPAGATE_FAULT
;
4669 if (!ret
&& ops
->read_write_emulate(vcpu
, gpa
, val
, bytes
))
4670 return X86EMUL_CONTINUE
;
4673 * Is this MMIO handled locally?
4675 handled
= ops
->read_write_mmio(vcpu
, gpa
, bytes
, val
);
4676 if (handled
== bytes
)
4677 return X86EMUL_CONTINUE
;
4683 WARN_ON(vcpu
->mmio_nr_fragments
>= KVM_MAX_MMIO_FRAGMENTS
);
4684 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_nr_fragments
++];
4688 return X86EMUL_CONTINUE
;
4691 static int emulator_read_write(struct x86_emulate_ctxt
*ctxt
,
4693 void *val
, unsigned int bytes
,
4694 struct x86_exception
*exception
,
4695 const struct read_write_emulator_ops
*ops
)
4697 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4701 if (ops
->read_write_prepare
&&
4702 ops
->read_write_prepare(vcpu
, val
, bytes
))
4703 return X86EMUL_CONTINUE
;
4705 vcpu
->mmio_nr_fragments
= 0;
4707 /* Crossing a page boundary? */
4708 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
4711 now
= -addr
& ~PAGE_MASK
;
4712 rc
= emulator_read_write_onepage(addr
, val
, now
, exception
,
4715 if (rc
!= X86EMUL_CONTINUE
)
4718 if (ctxt
->mode
!= X86EMUL_MODE_PROT64
)
4724 rc
= emulator_read_write_onepage(addr
, val
, bytes
, exception
,
4726 if (rc
!= X86EMUL_CONTINUE
)
4729 if (!vcpu
->mmio_nr_fragments
)
4732 gpa
= vcpu
->mmio_fragments
[0].gpa
;
4734 vcpu
->mmio_needed
= 1;
4735 vcpu
->mmio_cur_fragment
= 0;
4737 vcpu
->run
->mmio
.len
= min(8u, vcpu
->mmio_fragments
[0].len
);
4738 vcpu
->run
->mmio
.is_write
= vcpu
->mmio_is_write
= ops
->write
;
4739 vcpu
->run
->exit_reason
= KVM_EXIT_MMIO
;
4740 vcpu
->run
->mmio
.phys_addr
= gpa
;
4742 return ops
->read_write_exit_mmio(vcpu
, gpa
, val
, bytes
);
4745 static int emulator_read_emulated(struct x86_emulate_ctxt
*ctxt
,
4749 struct x86_exception
*exception
)
4751 return emulator_read_write(ctxt
, addr
, val
, bytes
,
4752 exception
, &read_emultor
);
4755 static int emulator_write_emulated(struct x86_emulate_ctxt
*ctxt
,
4759 struct x86_exception
*exception
)
4761 return emulator_read_write(ctxt
, addr
, (void *)val
, bytes
,
4762 exception
, &write_emultor
);
4765 #define CMPXCHG_TYPE(t, ptr, old, new) \
4766 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4768 #ifdef CONFIG_X86_64
4769 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4771 # define CMPXCHG64(ptr, old, new) \
4772 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4775 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt
*ctxt
,
4780 struct x86_exception
*exception
)
4782 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4788 /* guests cmpxchg8b have to be emulated atomically */
4789 if (bytes
> 8 || (bytes
& (bytes
- 1)))
4792 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, addr
, NULL
);
4794 if (gpa
== UNMAPPED_GVA
||
4795 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
4798 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
4801 page
= kvm_vcpu_gfn_to_page(vcpu
, gpa
>> PAGE_SHIFT
);
4802 if (is_error_page(page
))
4805 kaddr
= kmap_atomic(page
);
4806 kaddr
+= offset_in_page(gpa
);
4809 exchanged
= CMPXCHG_TYPE(u8
, kaddr
, old
, new);
4812 exchanged
= CMPXCHG_TYPE(u16
, kaddr
, old
, new);
4815 exchanged
= CMPXCHG_TYPE(u32
, kaddr
, old
, new);
4818 exchanged
= CMPXCHG64(kaddr
, old
, new);
4823 kunmap_atomic(kaddr
);
4824 kvm_release_page_dirty(page
);
4827 return X86EMUL_CMPXCHG_FAILED
;
4829 kvm_vcpu_mark_page_dirty(vcpu
, gpa
>> PAGE_SHIFT
);
4830 kvm_page_track_write(vcpu
, gpa
, new, bytes
);
4832 return X86EMUL_CONTINUE
;
4835 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
4837 return emulator_write_emulated(ctxt
, addr
, new, bytes
, exception
);
4840 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
4844 for (i
= 0; i
< vcpu
->arch
.pio
.count
; i
++) {
4845 if (vcpu
->arch
.pio
.in
)
4846 r
= kvm_io_bus_read(vcpu
, KVM_PIO_BUS
, vcpu
->arch
.pio
.port
,
4847 vcpu
->arch
.pio
.size
, pd
);
4849 r
= kvm_io_bus_write(vcpu
, KVM_PIO_BUS
,
4850 vcpu
->arch
.pio
.port
, vcpu
->arch
.pio
.size
,
4854 pd
+= vcpu
->arch
.pio
.size
;
4859 static int emulator_pio_in_out(struct kvm_vcpu
*vcpu
, int size
,
4860 unsigned short port
, void *val
,
4861 unsigned int count
, bool in
)
4863 vcpu
->arch
.pio
.port
= port
;
4864 vcpu
->arch
.pio
.in
= in
;
4865 vcpu
->arch
.pio
.count
= count
;
4866 vcpu
->arch
.pio
.size
= size
;
4868 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
4869 vcpu
->arch
.pio
.count
= 0;
4873 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
4874 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
4875 vcpu
->run
->io
.size
= size
;
4876 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
4877 vcpu
->run
->io
.count
= count
;
4878 vcpu
->run
->io
.port
= port
;
4883 static int emulator_pio_in_emulated(struct x86_emulate_ctxt
*ctxt
,
4884 int size
, unsigned short port
, void *val
,
4887 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4890 if (vcpu
->arch
.pio
.count
)
4893 memset(vcpu
->arch
.pio_data
, 0, size
* count
);
4895 ret
= emulator_pio_in_out(vcpu
, size
, port
, val
, count
, true);
4898 memcpy(val
, vcpu
->arch
.pio_data
, size
* count
);
4899 trace_kvm_pio(KVM_PIO_IN
, port
, size
, count
, vcpu
->arch
.pio_data
);
4900 vcpu
->arch
.pio
.count
= 0;
4907 static int emulator_pio_out_emulated(struct x86_emulate_ctxt
*ctxt
,
4908 int size
, unsigned short port
,
4909 const void *val
, unsigned int count
)
4911 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4913 memcpy(vcpu
->arch
.pio_data
, val
, size
* count
);
4914 trace_kvm_pio(KVM_PIO_OUT
, port
, size
, count
, vcpu
->arch
.pio_data
);
4915 return emulator_pio_in_out(vcpu
, size
, port
, (void *)val
, count
, false);
4918 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
4920 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
4923 static void emulator_invlpg(struct x86_emulate_ctxt
*ctxt
, ulong address
)
4925 kvm_mmu_invlpg(emul_to_vcpu(ctxt
), address
);
4928 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu
*vcpu
)
4930 if (!need_emulate_wbinvd(vcpu
))
4931 return X86EMUL_CONTINUE
;
4933 if (kvm_x86_ops
->has_wbinvd_exit()) {
4934 int cpu
= get_cpu();
4936 cpumask_set_cpu(cpu
, vcpu
->arch
.wbinvd_dirty_mask
);
4937 smp_call_function_many(vcpu
->arch
.wbinvd_dirty_mask
,
4938 wbinvd_ipi
, NULL
, 1);
4940 cpumask_clear(vcpu
->arch
.wbinvd_dirty_mask
);
4943 return X86EMUL_CONTINUE
;
4946 int kvm_emulate_wbinvd(struct kvm_vcpu
*vcpu
)
4948 kvm_emulate_wbinvd_noskip(vcpu
);
4949 return kvm_skip_emulated_instruction(vcpu
);
4951 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd
);
4955 static void emulator_wbinvd(struct x86_emulate_ctxt
*ctxt
)
4957 kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt
));
4960 static int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4961 unsigned long *dest
)
4963 return kvm_get_dr(emul_to_vcpu(ctxt
), dr
, dest
);
4966 static int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
,
4967 unsigned long value
)
4970 return __kvm_set_dr(emul_to_vcpu(ctxt
), dr
, value
);
4973 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
4975 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
4978 static unsigned long emulator_get_cr(struct x86_emulate_ctxt
*ctxt
, int cr
)
4980 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
4981 unsigned long value
;
4985 value
= kvm_read_cr0(vcpu
);
4988 value
= vcpu
->arch
.cr2
;
4991 value
= kvm_read_cr3(vcpu
);
4994 value
= kvm_read_cr4(vcpu
);
4997 value
= kvm_get_cr8(vcpu
);
5000 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5007 static int emulator_set_cr(struct x86_emulate_ctxt
*ctxt
, int cr
, ulong val
)
5009 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5014 res
= kvm_set_cr0(vcpu
, mk_cr_64(kvm_read_cr0(vcpu
), val
));
5017 vcpu
->arch
.cr2
= val
;
5020 res
= kvm_set_cr3(vcpu
, val
);
5023 res
= kvm_set_cr4(vcpu
, mk_cr_64(kvm_read_cr4(vcpu
), val
));
5026 res
= kvm_set_cr8(vcpu
, val
);
5029 kvm_err("%s: unexpected cr %u\n", __func__
, cr
);
5036 static int emulator_get_cpl(struct x86_emulate_ctxt
*ctxt
)
5038 return kvm_x86_ops
->get_cpl(emul_to_vcpu(ctxt
));
5041 static void emulator_get_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5043 kvm_x86_ops
->get_gdt(emul_to_vcpu(ctxt
), dt
);
5046 static void emulator_get_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5048 kvm_x86_ops
->get_idt(emul_to_vcpu(ctxt
), dt
);
5051 static void emulator_set_gdt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5053 kvm_x86_ops
->set_gdt(emul_to_vcpu(ctxt
), dt
);
5056 static void emulator_set_idt(struct x86_emulate_ctxt
*ctxt
, struct desc_ptr
*dt
)
5058 kvm_x86_ops
->set_idt(emul_to_vcpu(ctxt
), dt
);
5061 static unsigned long emulator_get_cached_segment_base(
5062 struct x86_emulate_ctxt
*ctxt
, int seg
)
5064 return get_segment_base(emul_to_vcpu(ctxt
), seg
);
5067 static bool emulator_get_segment(struct x86_emulate_ctxt
*ctxt
, u16
*selector
,
5068 struct desc_struct
*desc
, u32
*base3
,
5071 struct kvm_segment var
;
5073 kvm_get_segment(emul_to_vcpu(ctxt
), &var
, seg
);
5074 *selector
= var
.selector
;
5077 memset(desc
, 0, sizeof(*desc
));
5085 set_desc_limit(desc
, var
.limit
);
5086 set_desc_base(desc
, (unsigned long)var
.base
);
5087 #ifdef CONFIG_X86_64
5089 *base3
= var
.base
>> 32;
5091 desc
->type
= var
.type
;
5093 desc
->dpl
= var
.dpl
;
5094 desc
->p
= var
.present
;
5095 desc
->avl
= var
.avl
;
5103 static void emulator_set_segment(struct x86_emulate_ctxt
*ctxt
, u16 selector
,
5104 struct desc_struct
*desc
, u32 base3
,
5107 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5108 struct kvm_segment var
;
5110 var
.selector
= selector
;
5111 var
.base
= get_desc_base(desc
);
5112 #ifdef CONFIG_X86_64
5113 var
.base
|= ((u64
)base3
) << 32;
5115 var
.limit
= get_desc_limit(desc
);
5117 var
.limit
= (var
.limit
<< 12) | 0xfff;
5118 var
.type
= desc
->type
;
5119 var
.dpl
= desc
->dpl
;
5124 var
.avl
= desc
->avl
;
5125 var
.present
= desc
->p
;
5126 var
.unusable
= !var
.present
;
5129 kvm_set_segment(vcpu
, &var
, seg
);
5133 static int emulator_get_msr(struct x86_emulate_ctxt
*ctxt
,
5134 u32 msr_index
, u64
*pdata
)
5136 struct msr_data msr
;
5139 msr
.index
= msr_index
;
5140 msr
.host_initiated
= false;
5141 r
= kvm_get_msr(emul_to_vcpu(ctxt
), &msr
);
5149 static int emulator_set_msr(struct x86_emulate_ctxt
*ctxt
,
5150 u32 msr_index
, u64 data
)
5152 struct msr_data msr
;
5155 msr
.index
= msr_index
;
5156 msr
.host_initiated
= false;
5157 return kvm_set_msr(emul_to_vcpu(ctxt
), &msr
);
5160 static u64
emulator_get_smbase(struct x86_emulate_ctxt
*ctxt
)
5162 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5164 return vcpu
->arch
.smbase
;
5167 static void emulator_set_smbase(struct x86_emulate_ctxt
*ctxt
, u64 smbase
)
5169 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5171 vcpu
->arch
.smbase
= smbase
;
5174 static int emulator_check_pmc(struct x86_emulate_ctxt
*ctxt
,
5177 return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt
), pmc
);
5180 static int emulator_read_pmc(struct x86_emulate_ctxt
*ctxt
,
5181 u32 pmc
, u64
*pdata
)
5183 return kvm_pmu_rdpmc(emul_to_vcpu(ctxt
), pmc
, pdata
);
5186 static void emulator_halt(struct x86_emulate_ctxt
*ctxt
)
5188 emul_to_vcpu(ctxt
)->arch
.halt_request
= 1;
5191 static void emulator_get_fpu(struct x86_emulate_ctxt
*ctxt
)
5194 kvm_load_guest_fpu(emul_to_vcpu(ctxt
));
5197 static void emulator_put_fpu(struct x86_emulate_ctxt
*ctxt
)
5202 static int emulator_intercept(struct x86_emulate_ctxt
*ctxt
,
5203 struct x86_instruction_info
*info
,
5204 enum x86_intercept_stage stage
)
5206 return kvm_x86_ops
->check_intercept(emul_to_vcpu(ctxt
), info
, stage
);
5209 static bool emulator_get_cpuid(struct x86_emulate_ctxt
*ctxt
,
5210 u32
*eax
, u32
*ebx
, u32
*ecx
, u32
*edx
, bool check_limit
)
5212 return kvm_cpuid(emul_to_vcpu(ctxt
), eax
, ebx
, ecx
, edx
, check_limit
);
5215 static ulong
emulator_read_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
)
5217 return kvm_register_read(emul_to_vcpu(ctxt
), reg
);
5220 static void emulator_write_gpr(struct x86_emulate_ctxt
*ctxt
, unsigned reg
, ulong val
)
5222 kvm_register_write(emul_to_vcpu(ctxt
), reg
, val
);
5225 static void emulator_set_nmi_mask(struct x86_emulate_ctxt
*ctxt
, bool masked
)
5227 kvm_x86_ops
->set_nmi_mask(emul_to_vcpu(ctxt
), masked
);
5230 static unsigned emulator_get_hflags(struct x86_emulate_ctxt
*ctxt
)
5232 return emul_to_vcpu(ctxt
)->arch
.hflags
;
5235 static void emulator_set_hflags(struct x86_emulate_ctxt
*ctxt
, unsigned emul_flags
)
5237 kvm_set_hflags(emul_to_vcpu(ctxt
), emul_flags
);
5240 static const struct x86_emulate_ops emulate_ops
= {
5241 .read_gpr
= emulator_read_gpr
,
5242 .write_gpr
= emulator_write_gpr
,
5243 .read_std
= kvm_read_guest_virt_system
,
5244 .write_std
= kvm_write_guest_virt_system
,
5245 .read_phys
= kvm_read_guest_phys_system
,
5246 .fetch
= kvm_fetch_guest_virt
,
5247 .read_emulated
= emulator_read_emulated
,
5248 .write_emulated
= emulator_write_emulated
,
5249 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
5250 .invlpg
= emulator_invlpg
,
5251 .pio_in_emulated
= emulator_pio_in_emulated
,
5252 .pio_out_emulated
= emulator_pio_out_emulated
,
5253 .get_segment
= emulator_get_segment
,
5254 .set_segment
= emulator_set_segment
,
5255 .get_cached_segment_base
= emulator_get_cached_segment_base
,
5256 .get_gdt
= emulator_get_gdt
,
5257 .get_idt
= emulator_get_idt
,
5258 .set_gdt
= emulator_set_gdt
,
5259 .set_idt
= emulator_set_idt
,
5260 .get_cr
= emulator_get_cr
,
5261 .set_cr
= emulator_set_cr
,
5262 .cpl
= emulator_get_cpl
,
5263 .get_dr
= emulator_get_dr
,
5264 .set_dr
= emulator_set_dr
,
5265 .get_smbase
= emulator_get_smbase
,
5266 .set_smbase
= emulator_set_smbase
,
5267 .set_msr
= emulator_set_msr
,
5268 .get_msr
= emulator_get_msr
,
5269 .check_pmc
= emulator_check_pmc
,
5270 .read_pmc
= emulator_read_pmc
,
5271 .halt
= emulator_halt
,
5272 .wbinvd
= emulator_wbinvd
,
5273 .fix_hypercall
= emulator_fix_hypercall
,
5274 .get_fpu
= emulator_get_fpu
,
5275 .put_fpu
= emulator_put_fpu
,
5276 .intercept
= emulator_intercept
,
5277 .get_cpuid
= emulator_get_cpuid
,
5278 .set_nmi_mask
= emulator_set_nmi_mask
,
5279 .get_hflags
= emulator_get_hflags
,
5280 .set_hflags
= emulator_set_hflags
,
5283 static void toggle_interruptibility(struct kvm_vcpu
*vcpu
, u32 mask
)
5285 u32 int_shadow
= kvm_x86_ops
->get_interrupt_shadow(vcpu
);
5287 * an sti; sti; sequence only disable interrupts for the first
5288 * instruction. So, if the last instruction, be it emulated or
5289 * not, left the system with the INT_STI flag enabled, it
5290 * means that the last instruction is an sti. We should not
5291 * leave the flag on in this case. The same goes for mov ss
5293 if (int_shadow
& mask
)
5295 if (unlikely(int_shadow
|| mask
)) {
5296 kvm_x86_ops
->set_interrupt_shadow(vcpu
, mask
);
5298 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5302 static bool inject_emulated_exception(struct kvm_vcpu
*vcpu
)
5304 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5305 if (ctxt
->exception
.vector
== PF_VECTOR
)
5306 return kvm_propagate_fault(vcpu
, &ctxt
->exception
);
5308 if (ctxt
->exception
.error_code_valid
)
5309 kvm_queue_exception_e(vcpu
, ctxt
->exception
.vector
,
5310 ctxt
->exception
.error_code
);
5312 kvm_queue_exception(vcpu
, ctxt
->exception
.vector
);
5316 static void init_emulate_ctxt(struct kvm_vcpu
*vcpu
)
5318 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5321 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
5323 ctxt
->eflags
= kvm_get_rflags(vcpu
);
5324 ctxt
->tf
= (ctxt
->eflags
& X86_EFLAGS_TF
) != 0;
5326 ctxt
->eip
= kvm_rip_read(vcpu
);
5327 ctxt
->mode
= (!is_protmode(vcpu
)) ? X86EMUL_MODE_REAL
:
5328 (ctxt
->eflags
& X86_EFLAGS_VM
) ? X86EMUL_MODE_VM86
:
5329 (cs_l
&& is_long_mode(vcpu
)) ? X86EMUL_MODE_PROT64
:
5330 cs_db
? X86EMUL_MODE_PROT32
:
5331 X86EMUL_MODE_PROT16
;
5332 BUILD_BUG_ON(HF_GUEST_MASK
!= X86EMUL_GUEST_MASK
);
5333 BUILD_BUG_ON(HF_SMM_MASK
!= X86EMUL_SMM_MASK
);
5334 BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK
!= X86EMUL_SMM_INSIDE_NMI_MASK
);
5336 init_decode_cache(ctxt
);
5337 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5340 int kvm_inject_realmode_interrupt(struct kvm_vcpu
*vcpu
, int irq
, int inc_eip
)
5342 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5345 init_emulate_ctxt(vcpu
);
5349 ctxt
->_eip
= ctxt
->eip
+ inc_eip
;
5350 ret
= emulate_int_real(ctxt
, irq
);
5352 if (ret
!= X86EMUL_CONTINUE
)
5353 return EMULATE_FAIL
;
5355 ctxt
->eip
= ctxt
->_eip
;
5356 kvm_rip_write(vcpu
, ctxt
->eip
);
5357 kvm_set_rflags(vcpu
, ctxt
->eflags
);
5359 if (irq
== NMI_VECTOR
)
5360 vcpu
->arch
.nmi_pending
= 0;
5362 vcpu
->arch
.interrupt
.pending
= false;
5364 return EMULATE_DONE
;
5366 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt
);
5368 static int handle_emulation_failure(struct kvm_vcpu
*vcpu
)
5370 int r
= EMULATE_DONE
;
5372 ++vcpu
->stat
.insn_emulation_fail
;
5373 trace_kvm_emulate_insn_failed(vcpu
);
5374 if (!is_guest_mode(vcpu
) && kvm_x86_ops
->get_cpl(vcpu
) == 0) {
5375 vcpu
->run
->exit_reason
= KVM_EXIT_INTERNAL_ERROR
;
5376 vcpu
->run
->internal
.suberror
= KVM_INTERNAL_ERROR_EMULATION
;
5377 vcpu
->run
->internal
.ndata
= 0;
5380 kvm_queue_exception(vcpu
, UD_VECTOR
);
5385 static bool reexecute_instruction(struct kvm_vcpu
*vcpu
, gva_t cr2
,
5386 bool write_fault_to_shadow_pgtable
,
5392 if (emulation_type
& EMULTYPE_NO_REEXECUTE
)
5395 if (!vcpu
->arch
.mmu
.direct_map
) {
5397 * Write permission should be allowed since only
5398 * write access need to be emulated.
5400 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5403 * If the mapping is invalid in guest, let cpu retry
5404 * it to generate fault.
5406 if (gpa
== UNMAPPED_GVA
)
5411 * Do not retry the unhandleable instruction if it faults on the
5412 * readonly host memory, otherwise it will goto a infinite loop:
5413 * retry instruction -> write #PF -> emulation fail -> retry
5414 * instruction -> ...
5416 pfn
= gfn_to_pfn(vcpu
->kvm
, gpa_to_gfn(gpa
));
5419 * If the instruction failed on the error pfn, it can not be fixed,
5420 * report the error to userspace.
5422 if (is_error_noslot_pfn(pfn
))
5425 kvm_release_pfn_clean(pfn
);
5427 /* The instructions are well-emulated on direct mmu. */
5428 if (vcpu
->arch
.mmu
.direct_map
) {
5429 unsigned int indirect_shadow_pages
;
5431 spin_lock(&vcpu
->kvm
->mmu_lock
);
5432 indirect_shadow_pages
= vcpu
->kvm
->arch
.indirect_shadow_pages
;
5433 spin_unlock(&vcpu
->kvm
->mmu_lock
);
5435 if (indirect_shadow_pages
)
5436 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5442 * if emulation was due to access to shadowed page table
5443 * and it failed try to unshadow page and re-enter the
5444 * guest to let CPU execute the instruction.
5446 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5449 * If the access faults on its page table, it can not
5450 * be fixed by unprotecting shadow page and it should
5451 * be reported to userspace.
5453 return !write_fault_to_shadow_pgtable
;
5456 static bool retry_instruction(struct x86_emulate_ctxt
*ctxt
,
5457 unsigned long cr2
, int emulation_type
)
5459 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
5460 unsigned long last_retry_eip
, last_retry_addr
, gpa
= cr2
;
5462 last_retry_eip
= vcpu
->arch
.last_retry_eip
;
5463 last_retry_addr
= vcpu
->arch
.last_retry_addr
;
5466 * If the emulation is caused by #PF and it is non-page_table
5467 * writing instruction, it means the VM-EXIT is caused by shadow
5468 * page protected, we can zap the shadow page and retry this
5469 * instruction directly.
5471 * Note: if the guest uses a non-page-table modifying instruction
5472 * on the PDE that points to the instruction, then we will unmap
5473 * the instruction and go to an infinite loop. So, we cache the
5474 * last retried eip and the last fault address, if we meet the eip
5475 * and the address again, we can break out of the potential infinite
5478 vcpu
->arch
.last_retry_eip
= vcpu
->arch
.last_retry_addr
= 0;
5480 if (!(emulation_type
& EMULTYPE_RETRY
))
5483 if (x86_page_table_writing_insn(ctxt
))
5486 if (ctxt
->eip
== last_retry_eip
&& last_retry_addr
== cr2
)
5489 vcpu
->arch
.last_retry_eip
= ctxt
->eip
;
5490 vcpu
->arch
.last_retry_addr
= cr2
;
5492 if (!vcpu
->arch
.mmu
.direct_map
)
5493 gpa
= kvm_mmu_gva_to_gpa_write(vcpu
, cr2
, NULL
);
5495 kvm_mmu_unprotect_page(vcpu
->kvm
, gpa_to_gfn(gpa
));
5500 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
);
5501 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
);
5503 static void kvm_smm_changed(struct kvm_vcpu
*vcpu
)
5505 if (!(vcpu
->arch
.hflags
& HF_SMM_MASK
)) {
5506 /* This is a good place to trace that we are exiting SMM. */
5507 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, false);
5509 /* Process a latched INIT or SMI, if any. */
5510 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5513 kvm_mmu_reset_context(vcpu
);
5516 static void kvm_set_hflags(struct kvm_vcpu
*vcpu
, unsigned emul_flags
)
5518 unsigned changed
= vcpu
->arch
.hflags
^ emul_flags
;
5520 vcpu
->arch
.hflags
= emul_flags
;
5522 if (changed
& HF_SMM_MASK
)
5523 kvm_smm_changed(vcpu
);
5526 static int kvm_vcpu_check_hw_bp(unsigned long addr
, u32 type
, u32 dr7
,
5535 for (i
= 0; i
< 4; i
++, enable
>>= 2, rwlen
>>= 4)
5536 if ((enable
& 3) && (rwlen
& 15) == type
&& db
[i
] == addr
)
5541 static void kvm_vcpu_do_singlestep(struct kvm_vcpu
*vcpu
, int *r
)
5543 struct kvm_run
*kvm_run
= vcpu
->run
;
5545 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
5546 kvm_run
->debug
.arch
.dr6
= DR6_BS
| DR6_FIXED_1
| DR6_RTM
;
5547 kvm_run
->debug
.arch
.pc
= vcpu
->arch
.singlestep_rip
;
5548 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5549 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5550 *r
= EMULATE_USER_EXIT
;
5553 * "Certain debug exceptions may clear bit 0-3. The
5554 * remaining contents of the DR6 register are never
5555 * cleared by the processor".
5557 vcpu
->arch
.dr6
&= ~15;
5558 vcpu
->arch
.dr6
|= DR6_BS
| DR6_RTM
;
5559 kvm_queue_exception(vcpu
, DB_VECTOR
);
5563 int kvm_skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
5565 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5566 int r
= EMULATE_DONE
;
5568 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
5571 * rflags is the old, "raw" value of the flags. The new value has
5572 * not been saved yet.
5574 * This is correct even for TF set by the guest, because "the
5575 * processor will not generate this exception after the instruction
5576 * that sets the TF flag".
5578 if (unlikely(rflags
& X86_EFLAGS_TF
))
5579 kvm_vcpu_do_singlestep(vcpu
, &r
);
5580 return r
== EMULATE_DONE
;
5582 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction
);
5584 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu
*vcpu
, int *r
)
5586 if (unlikely(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) &&
5587 (vcpu
->arch
.guest_debug_dr7
& DR7_BP_EN_MASK
)) {
5588 struct kvm_run
*kvm_run
= vcpu
->run
;
5589 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5590 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5591 vcpu
->arch
.guest_debug_dr7
,
5595 kvm_run
->debug
.arch
.dr6
= dr6
| DR6_FIXED_1
| DR6_RTM
;
5596 kvm_run
->debug
.arch
.pc
= eip
;
5597 kvm_run
->debug
.arch
.exception
= DB_VECTOR
;
5598 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
5599 *r
= EMULATE_USER_EXIT
;
5604 if (unlikely(vcpu
->arch
.dr7
& DR7_BP_EN_MASK
) &&
5605 !(kvm_get_rflags(vcpu
) & X86_EFLAGS_RF
)) {
5606 unsigned long eip
= kvm_get_linear_rip(vcpu
);
5607 u32 dr6
= kvm_vcpu_check_hw_bp(eip
, 0,
5612 vcpu
->arch
.dr6
&= ~15;
5613 vcpu
->arch
.dr6
|= dr6
| DR6_RTM
;
5614 kvm_queue_exception(vcpu
, DB_VECTOR
);
5623 int x86_emulate_instruction(struct kvm_vcpu
*vcpu
,
5630 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
5631 bool writeback
= true;
5632 bool write_fault_to_spt
= vcpu
->arch
.write_fault_to_shadow_pgtable
;
5635 * Clear write_fault_to_shadow_pgtable here to ensure it is
5638 vcpu
->arch
.write_fault_to_shadow_pgtable
= false;
5639 kvm_clear_exception_queue(vcpu
);
5641 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
5642 init_emulate_ctxt(vcpu
);
5645 * We will reenter on the same instruction since
5646 * we do not set complete_userspace_io. This does not
5647 * handle watchpoints yet, those would be handled in
5650 if (kvm_vcpu_check_breakpoint(vcpu
, &r
))
5653 ctxt
->interruptibility
= 0;
5654 ctxt
->have_exception
= false;
5655 ctxt
->exception
.vector
= -1;
5656 ctxt
->perm_ok
= false;
5658 ctxt
->ud
= emulation_type
& EMULTYPE_TRAP_UD
;
5660 r
= x86_decode_insn(ctxt
, insn
, insn_len
);
5662 trace_kvm_emulate_insn_start(vcpu
);
5663 ++vcpu
->stat
.insn_emulation
;
5664 if (r
!= EMULATION_OK
) {
5665 if (emulation_type
& EMULTYPE_TRAP_UD
)
5666 return EMULATE_FAIL
;
5667 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5669 return EMULATE_DONE
;
5670 if (emulation_type
& EMULTYPE_SKIP
)
5671 return EMULATE_FAIL
;
5672 return handle_emulation_failure(vcpu
);
5676 if (emulation_type
& EMULTYPE_SKIP
) {
5677 kvm_rip_write(vcpu
, ctxt
->_eip
);
5678 if (ctxt
->eflags
& X86_EFLAGS_RF
)
5679 kvm_set_rflags(vcpu
, ctxt
->eflags
& ~X86_EFLAGS_RF
);
5680 return EMULATE_DONE
;
5683 if (retry_instruction(ctxt
, cr2
, emulation_type
))
5684 return EMULATE_DONE
;
5686 /* this is needed for vmware backdoor interface to work since it
5687 changes registers values during IO operation */
5688 if (vcpu
->arch
.emulate_regs_need_sync_from_vcpu
) {
5689 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= false;
5690 emulator_invalidate_register_cache(ctxt
);
5694 /* Save the faulting GPA (cr2) in the address field */
5695 ctxt
->exception
.address
= cr2
;
5697 r
= x86_emulate_insn(ctxt
);
5699 if (r
== EMULATION_INTERCEPTED
)
5700 return EMULATE_DONE
;
5702 if (r
== EMULATION_FAILED
) {
5703 if (reexecute_instruction(vcpu
, cr2
, write_fault_to_spt
,
5705 return EMULATE_DONE
;
5707 return handle_emulation_failure(vcpu
);
5710 if (ctxt
->have_exception
) {
5712 if (inject_emulated_exception(vcpu
))
5714 } else if (vcpu
->arch
.pio
.count
) {
5715 if (!vcpu
->arch
.pio
.in
) {
5716 /* FIXME: return into emulator if single-stepping. */
5717 vcpu
->arch
.pio
.count
= 0;
5720 vcpu
->arch
.complete_userspace_io
= complete_emulated_pio
;
5722 r
= EMULATE_USER_EXIT
;
5723 } else if (vcpu
->mmio_needed
) {
5724 if (!vcpu
->mmio_is_write
)
5726 r
= EMULATE_USER_EXIT
;
5727 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
5728 } else if (r
== EMULATION_RESTART
)
5734 unsigned long rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5735 toggle_interruptibility(vcpu
, ctxt
->interruptibility
);
5736 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
5737 kvm_rip_write(vcpu
, ctxt
->eip
);
5738 if (r
== EMULATE_DONE
&&
5739 (ctxt
->tf
|| (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)))
5740 kvm_vcpu_do_singlestep(vcpu
, &r
);
5741 if (!ctxt
->have_exception
||
5742 exception_type(ctxt
->exception
.vector
) == EXCPT_TRAP
)
5743 __kvm_set_rflags(vcpu
, ctxt
->eflags
);
5746 * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5747 * do nothing, and it will be requested again as soon as
5748 * the shadow expires. But we still need to check here,
5749 * because POPF has no interrupt shadow.
5751 if (unlikely((ctxt
->eflags
& ~rflags
) & X86_EFLAGS_IF
))
5752 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
5754 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= true;
5758 EXPORT_SYMBOL_GPL(x86_emulate_instruction
);
5760 int kvm_fast_pio_out(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5762 unsigned long val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
5763 int ret
= emulator_pio_out_emulated(&vcpu
->arch
.emulate_ctxt
,
5764 size
, port
, &val
, 1);
5765 /* do not return to emulator after return from userspace */
5766 vcpu
->arch
.pio
.count
= 0;
5769 EXPORT_SYMBOL_GPL(kvm_fast_pio_out
);
5771 static int complete_fast_pio_in(struct kvm_vcpu
*vcpu
)
5775 /* We should only ever be called with arch.pio.count equal to 1 */
5776 BUG_ON(vcpu
->arch
.pio
.count
!= 1);
5778 /* For size less than 4 we merge, else we zero extend */
5779 val
= (vcpu
->arch
.pio
.size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
)
5783 * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
5784 * the copy and tracing
5786 emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, vcpu
->arch
.pio
.size
,
5787 vcpu
->arch
.pio
.port
, &val
, 1);
5788 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5793 int kvm_fast_pio_in(struct kvm_vcpu
*vcpu
, int size
, unsigned short port
)
5798 /* For size less than 4 we merge, else we zero extend */
5799 val
= (size
< 4) ? kvm_register_read(vcpu
, VCPU_REGS_RAX
) : 0;
5801 ret
= emulator_pio_in_emulated(&vcpu
->arch
.emulate_ctxt
, size
, port
,
5804 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
5808 vcpu
->arch
.complete_userspace_io
= complete_fast_pio_in
;
5812 EXPORT_SYMBOL_GPL(kvm_fast_pio_in
);
5814 static int kvmclock_cpu_down_prep(unsigned int cpu
)
5816 __this_cpu_write(cpu_tsc_khz
, 0);
5820 static void tsc_khz_changed(void *data
)
5822 struct cpufreq_freqs
*freq
= data
;
5823 unsigned long khz
= 0;
5827 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
5828 khz
= cpufreq_quick_get(raw_smp_processor_id());
5831 __this_cpu_write(cpu_tsc_khz
, khz
);
5834 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
5837 struct cpufreq_freqs
*freq
= data
;
5839 struct kvm_vcpu
*vcpu
;
5840 int i
, send_ipi
= 0;
5843 * We allow guests to temporarily run on slowing clocks,
5844 * provided we notify them after, or to run on accelerating
5845 * clocks, provided we notify them before. Thus time never
5848 * However, we have a problem. We can't atomically update
5849 * the frequency of a given CPU from this function; it is
5850 * merely a notifier, which can be called from any CPU.
5851 * Changing the TSC frequency at arbitrary points in time
5852 * requires a recomputation of local variables related to
5853 * the TSC for each VCPU. We must flag these local variables
5854 * to be updated and be sure the update takes place with the
5855 * new frequency before any guests proceed.
5857 * Unfortunately, the combination of hotplug CPU and frequency
5858 * change creates an intractable locking scenario; the order
5859 * of when these callouts happen is undefined with respect to
5860 * CPU hotplug, and they can race with each other. As such,
5861 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5862 * undefined; you can actually have a CPU frequency change take
5863 * place in between the computation of X and the setting of the
5864 * variable. To protect against this problem, all updates of
5865 * the per_cpu tsc_khz variable are done in an interrupt
5866 * protected IPI, and all callers wishing to update the value
5867 * must wait for a synchronous IPI to complete (which is trivial
5868 * if the caller is on the CPU already). This establishes the
5869 * necessary total order on variable updates.
5871 * Note that because a guest time update may take place
5872 * anytime after the setting of the VCPU's request bit, the
5873 * correct TSC value must be set before the request. However,
5874 * to ensure the update actually makes it to any guest which
5875 * starts running in hardware virtualization between the set
5876 * and the acquisition of the spinlock, we must also ping the
5877 * CPU after setting the request bit.
5881 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
5883 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
5886 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5888 spin_lock(&kvm_lock
);
5889 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
5890 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
5891 if (vcpu
->cpu
!= freq
->cpu
)
5893 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
5894 if (vcpu
->cpu
!= smp_processor_id())
5898 spin_unlock(&kvm_lock
);
5900 if (freq
->old
< freq
->new && send_ipi
) {
5902 * We upscale the frequency. Must make the guest
5903 * doesn't see old kvmclock values while running with
5904 * the new frequency, otherwise we risk the guest sees
5905 * time go backwards.
5907 * In case we update the frequency for another cpu
5908 * (which might be in guest context) send an interrupt
5909 * to kick the cpu out of guest context. Next time
5910 * guest context is entered kvmclock will be updated,
5911 * so the guest will not see stale values.
5913 smp_call_function_single(freq
->cpu
, tsc_khz_changed
, freq
, 1);
5918 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
5919 .notifier_call
= kvmclock_cpufreq_notifier
5922 static int kvmclock_cpu_online(unsigned int cpu
)
5924 tsc_khz_changed(NULL
);
5928 static void kvm_timer_init(void)
5930 max_tsc_khz
= tsc_khz
;
5932 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
5933 #ifdef CONFIG_CPU_FREQ
5934 struct cpufreq_policy policy
;
5937 memset(&policy
, 0, sizeof(policy
));
5939 cpufreq_get_policy(&policy
, cpu
);
5940 if (policy
.cpuinfo
.max_freq
)
5941 max_tsc_khz
= policy
.cpuinfo
.max_freq
;
5944 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
5945 CPUFREQ_TRANSITION_NOTIFIER
);
5947 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz
);
5949 cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE
, "x86/kvm/clk:online",
5950 kvmclock_cpu_online
, kvmclock_cpu_down_prep
);
5953 static DEFINE_PER_CPU(struct kvm_vcpu
*, current_vcpu
);
5955 int kvm_is_in_guest(void)
5957 return __this_cpu_read(current_vcpu
) != NULL
;
5960 static int kvm_is_user_mode(void)
5964 if (__this_cpu_read(current_vcpu
))
5965 user_mode
= kvm_x86_ops
->get_cpl(__this_cpu_read(current_vcpu
));
5967 return user_mode
!= 0;
5970 static unsigned long kvm_get_guest_ip(void)
5972 unsigned long ip
= 0;
5974 if (__this_cpu_read(current_vcpu
))
5975 ip
= kvm_rip_read(__this_cpu_read(current_vcpu
));
5980 static struct perf_guest_info_callbacks kvm_guest_cbs
= {
5981 .is_in_guest
= kvm_is_in_guest
,
5982 .is_user_mode
= kvm_is_user_mode
,
5983 .get_guest_ip
= kvm_get_guest_ip
,
5986 void kvm_before_handle_nmi(struct kvm_vcpu
*vcpu
)
5988 __this_cpu_write(current_vcpu
, vcpu
);
5990 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi
);
5992 void kvm_after_handle_nmi(struct kvm_vcpu
*vcpu
)
5994 __this_cpu_write(current_vcpu
, NULL
);
5996 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi
);
5998 static void kvm_set_mmio_spte_mask(void)
6001 int maxphyaddr
= boot_cpu_data
.x86_phys_bits
;
6004 * Set the reserved bits and the present bit of an paging-structure
6005 * entry to generate page fault with PFER.RSV = 1.
6007 /* Mask the reserved physical address bits. */
6008 mask
= rsvd_bits(maxphyaddr
, 51);
6010 /* Set the present bit. */
6013 #ifdef CONFIG_X86_64
6015 * If reserved bit is not supported, clear the present bit to disable
6018 if (maxphyaddr
== 52)
6022 kvm_mmu_set_mmio_spte_mask(mask
, mask
);
6025 #ifdef CONFIG_X86_64
6026 static void pvclock_gtod_update_fn(struct work_struct
*work
)
6030 struct kvm_vcpu
*vcpu
;
6033 spin_lock(&kvm_lock
);
6034 list_for_each_entry(kvm
, &vm_list
, vm_list
)
6035 kvm_for_each_vcpu(i
, vcpu
, kvm
)
6036 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
6037 atomic_set(&kvm_guest_has_master_clock
, 0);
6038 spin_unlock(&kvm_lock
);
6041 static DECLARE_WORK(pvclock_gtod_work
, pvclock_gtod_update_fn
);
6044 * Notification about pvclock gtod data update.
6046 static int pvclock_gtod_notify(struct notifier_block
*nb
, unsigned long unused
,
6049 struct pvclock_gtod_data
*gtod
= &pvclock_gtod_data
;
6050 struct timekeeper
*tk
= priv
;
6052 update_pvclock_gtod(tk
);
6054 /* disable master clock if host does not trust, or does not
6055 * use, TSC clocksource
6057 if (gtod
->clock
.vclock_mode
!= VCLOCK_TSC
&&
6058 atomic_read(&kvm_guest_has_master_clock
) != 0)
6059 queue_work(system_long_wq
, &pvclock_gtod_work
);
6064 static struct notifier_block pvclock_gtod_notifier
= {
6065 .notifier_call
= pvclock_gtod_notify
,
6069 int kvm_arch_init(void *opaque
)
6072 struct kvm_x86_ops
*ops
= opaque
;
6075 printk(KERN_ERR
"kvm: already loaded the other module\n");
6080 if (!ops
->cpu_has_kvm_support()) {
6081 printk(KERN_ERR
"kvm: no hardware support\n");
6085 if (ops
->disabled_by_bios()) {
6086 printk(KERN_ERR
"kvm: disabled by bios\n");
6092 shared_msrs
= alloc_percpu(struct kvm_shared_msrs
);
6094 printk(KERN_ERR
"kvm: failed to allocate percpu kvm_shared_msrs\n");
6098 r
= kvm_mmu_module_init();
6100 goto out_free_percpu
;
6102 kvm_set_mmio_spte_mask();
6106 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
6107 PT_DIRTY_MASK
, PT64_NX_MASK
, 0,
6108 PT_PRESENT_MASK
, 0);
6111 perf_register_guest_info_callbacks(&kvm_guest_cbs
);
6113 if (boot_cpu_has(X86_FEATURE_XSAVE
))
6114 host_xcr0
= xgetbv(XCR_XFEATURE_ENABLED_MASK
);
6117 #ifdef CONFIG_X86_64
6118 pvclock_gtod_register_notifier(&pvclock_gtod_notifier
);
6124 free_percpu(shared_msrs
);
6129 void kvm_arch_exit(void)
6132 perf_unregister_guest_info_callbacks(&kvm_guest_cbs
);
6134 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
6135 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
6136 CPUFREQ_TRANSITION_NOTIFIER
);
6137 cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE
);
6138 #ifdef CONFIG_X86_64
6139 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier
);
6142 kvm_mmu_module_exit();
6143 free_percpu(shared_msrs
);
6146 int kvm_vcpu_halt(struct kvm_vcpu
*vcpu
)
6148 ++vcpu
->stat
.halt_exits
;
6149 if (lapic_in_kernel(vcpu
)) {
6150 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
6153 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
6157 EXPORT_SYMBOL_GPL(kvm_vcpu_halt
);
6159 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
6161 int ret
= kvm_skip_emulated_instruction(vcpu
);
6163 * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6164 * KVM_EXIT_DEBUG here.
6166 return kvm_vcpu_halt(vcpu
) && ret
;
6168 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
6170 #ifdef CONFIG_X86_64
6171 static int kvm_pv_clock_pairing(struct kvm_vcpu
*vcpu
, gpa_t paddr
,
6172 unsigned long clock_type
)
6174 struct kvm_clock_pairing clock_pairing
;
6179 if (clock_type
!= KVM_CLOCK_PAIRING_WALLCLOCK
)
6180 return -KVM_EOPNOTSUPP
;
6182 if (kvm_get_walltime_and_clockread(&ts
, &cycle
) == false)
6183 return -KVM_EOPNOTSUPP
;
6185 clock_pairing
.sec
= ts
.tv_sec
;
6186 clock_pairing
.nsec
= ts
.tv_nsec
;
6187 clock_pairing
.tsc
= kvm_read_l1_tsc(vcpu
, cycle
);
6188 clock_pairing
.flags
= 0;
6191 if (kvm_write_guest(vcpu
->kvm
, paddr
, &clock_pairing
,
6192 sizeof(struct kvm_clock_pairing
)))
6200 * kvm_pv_kick_cpu_op: Kick a vcpu.
6202 * @apicid - apicid of vcpu to be kicked.
6204 static void kvm_pv_kick_cpu_op(struct kvm
*kvm
, unsigned long flags
, int apicid
)
6206 struct kvm_lapic_irq lapic_irq
;
6208 lapic_irq
.shorthand
= 0;
6209 lapic_irq
.dest_mode
= 0;
6210 lapic_irq
.level
= 0;
6211 lapic_irq
.dest_id
= apicid
;
6212 lapic_irq
.msi_redir_hint
= false;
6214 lapic_irq
.delivery_mode
= APIC_DM_REMRD
;
6215 kvm_irq_delivery_to_apic(kvm
, NULL
, &lapic_irq
, NULL
);
6218 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu
*vcpu
)
6220 vcpu
->arch
.apicv_active
= false;
6221 kvm_x86_ops
->refresh_apicv_exec_ctrl(vcpu
);
6224 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
6226 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
6229 r
= kvm_skip_emulated_instruction(vcpu
);
6231 if (kvm_hv_hypercall_enabled(vcpu
->kvm
))
6232 return kvm_hv_hypercall(vcpu
);
6234 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
6235 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
6236 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
6237 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
6238 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
6240 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
6242 op_64_bit
= is_64_bit_mode(vcpu
);
6251 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
6257 case KVM_HC_VAPIC_POLL_IRQ
:
6260 case KVM_HC_KICK_CPU
:
6261 kvm_pv_kick_cpu_op(vcpu
->kvm
, a0
, a1
);
6264 #ifdef CONFIG_X86_64
6265 case KVM_HC_CLOCK_PAIRING
:
6266 ret
= kvm_pv_clock_pairing(vcpu
, a0
, a1
);
6276 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
6277 ++vcpu
->stat
.hypercalls
;
6280 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
6282 static int emulator_fix_hypercall(struct x86_emulate_ctxt
*ctxt
)
6284 struct kvm_vcpu
*vcpu
= emul_to_vcpu(ctxt
);
6285 char instruction
[3];
6286 unsigned long rip
= kvm_rip_read(vcpu
);
6288 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
6290 return emulator_write_emulated(ctxt
, rip
, instruction
, 3,
6294 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
6296 return vcpu
->run
->request_interrupt_window
&&
6297 likely(!pic_in_kernel(vcpu
->kvm
));
6300 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
6302 struct kvm_run
*kvm_run
= vcpu
->run
;
6304 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
6305 kvm_run
->flags
= is_smm(vcpu
) ? KVM_RUN_X86_SMM
: 0;
6306 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
6307 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
6308 kvm_run
->ready_for_interrupt_injection
=
6309 pic_in_kernel(vcpu
->kvm
) ||
6310 kvm_vcpu_ready_for_interrupt_injection(vcpu
);
6313 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
6317 if (!kvm_x86_ops
->update_cr8_intercept
)
6320 if (!lapic_in_kernel(vcpu
))
6323 if (vcpu
->arch
.apicv_active
)
6326 if (!vcpu
->arch
.apic
->vapic_addr
)
6327 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
6334 tpr
= kvm_lapic_get_cr8(vcpu
);
6336 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
6339 static int inject_pending_event(struct kvm_vcpu
*vcpu
, bool req_int_win
)
6343 /* try to reinject previous events if any */
6344 if (vcpu
->arch
.exception
.pending
) {
6345 trace_kvm_inj_exception(vcpu
->arch
.exception
.nr
,
6346 vcpu
->arch
.exception
.has_error_code
,
6347 vcpu
->arch
.exception
.error_code
);
6349 if (exception_type(vcpu
->arch
.exception
.nr
) == EXCPT_FAULT
)
6350 __kvm_set_rflags(vcpu
, kvm_get_rflags(vcpu
) |
6353 if (vcpu
->arch
.exception
.nr
== DB_VECTOR
&&
6354 (vcpu
->arch
.dr7
& DR7_GD
)) {
6355 vcpu
->arch
.dr7
&= ~DR7_GD
;
6356 kvm_update_dr7(vcpu
);
6359 kvm_x86_ops
->queue_exception(vcpu
);
6363 if (vcpu
->arch
.nmi_injected
) {
6364 kvm_x86_ops
->set_nmi(vcpu
);
6368 if (vcpu
->arch
.interrupt
.pending
) {
6369 kvm_x86_ops
->set_irq(vcpu
);
6373 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6374 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6379 /* try to inject new event if pending */
6380 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)) {
6381 vcpu
->arch
.smi_pending
= false;
6383 } else if (vcpu
->arch
.nmi_pending
&& kvm_x86_ops
->nmi_allowed(vcpu
)) {
6384 --vcpu
->arch
.nmi_pending
;
6385 vcpu
->arch
.nmi_injected
= true;
6386 kvm_x86_ops
->set_nmi(vcpu
);
6387 } else if (kvm_cpu_has_injectable_intr(vcpu
)) {
6389 * Because interrupts can be injected asynchronously, we are
6390 * calling check_nested_events again here to avoid a race condition.
6391 * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6392 * proposal and current concerns. Perhaps we should be setting
6393 * KVM_REQ_EVENT only on certain events and not unconditionally?
6395 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
) {
6396 r
= kvm_x86_ops
->check_nested_events(vcpu
, req_int_win
);
6400 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
6401 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
6403 kvm_x86_ops
->set_irq(vcpu
);
6410 static void process_nmi(struct kvm_vcpu
*vcpu
)
6415 * x86 is limited to one NMI running, and one NMI pending after it.
6416 * If an NMI is already in progress, limit further NMIs to just one.
6417 * Otherwise, allow two (and we'll inject the first one immediately).
6419 if (kvm_x86_ops
->get_nmi_mask(vcpu
) || vcpu
->arch
.nmi_injected
)
6422 vcpu
->arch
.nmi_pending
+= atomic_xchg(&vcpu
->arch
.nmi_queued
, 0);
6423 vcpu
->arch
.nmi_pending
= min(vcpu
->arch
.nmi_pending
, limit
);
6424 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6427 #define put_smstate(type, buf, offset, val) \
6428 *(type *)((buf) + (offset) - 0x7e00) = val
6430 static u32
enter_smm_get_segment_flags(struct kvm_segment
*seg
)
6433 flags
|= seg
->g
<< 23;
6434 flags
|= seg
->db
<< 22;
6435 flags
|= seg
->l
<< 21;
6436 flags
|= seg
->avl
<< 20;
6437 flags
|= seg
->present
<< 15;
6438 flags
|= seg
->dpl
<< 13;
6439 flags
|= seg
->s
<< 12;
6440 flags
|= seg
->type
<< 8;
6444 static void enter_smm_save_seg_32(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6446 struct kvm_segment seg
;
6449 kvm_get_segment(vcpu
, &seg
, n
);
6450 put_smstate(u32
, buf
, 0x7fa8 + n
* 4, seg
.selector
);
6453 offset
= 0x7f84 + n
* 12;
6455 offset
= 0x7f2c + (n
- 3) * 12;
6457 put_smstate(u32
, buf
, offset
+ 8, seg
.base
);
6458 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6459 put_smstate(u32
, buf
, offset
, enter_smm_get_segment_flags(&seg
));
6462 #ifdef CONFIG_X86_64
6463 static void enter_smm_save_seg_64(struct kvm_vcpu
*vcpu
, char *buf
, int n
)
6465 struct kvm_segment seg
;
6469 kvm_get_segment(vcpu
, &seg
, n
);
6470 offset
= 0x7e00 + n
* 16;
6472 flags
= enter_smm_get_segment_flags(&seg
) >> 8;
6473 put_smstate(u16
, buf
, offset
, seg
.selector
);
6474 put_smstate(u16
, buf
, offset
+ 2, flags
);
6475 put_smstate(u32
, buf
, offset
+ 4, seg
.limit
);
6476 put_smstate(u64
, buf
, offset
+ 8, seg
.base
);
6480 static void enter_smm_save_state_32(struct kvm_vcpu
*vcpu
, char *buf
)
6483 struct kvm_segment seg
;
6487 put_smstate(u32
, buf
, 0x7ffc, kvm_read_cr0(vcpu
));
6488 put_smstate(u32
, buf
, 0x7ff8, kvm_read_cr3(vcpu
));
6489 put_smstate(u32
, buf
, 0x7ff4, kvm_get_rflags(vcpu
));
6490 put_smstate(u32
, buf
, 0x7ff0, kvm_rip_read(vcpu
));
6492 for (i
= 0; i
< 8; i
++)
6493 put_smstate(u32
, buf
, 0x7fd0 + i
* 4, kvm_register_read(vcpu
, i
));
6495 kvm_get_dr(vcpu
, 6, &val
);
6496 put_smstate(u32
, buf
, 0x7fcc, (u32
)val
);
6497 kvm_get_dr(vcpu
, 7, &val
);
6498 put_smstate(u32
, buf
, 0x7fc8, (u32
)val
);
6500 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6501 put_smstate(u32
, buf
, 0x7fc4, seg
.selector
);
6502 put_smstate(u32
, buf
, 0x7f64, seg
.base
);
6503 put_smstate(u32
, buf
, 0x7f60, seg
.limit
);
6504 put_smstate(u32
, buf
, 0x7f5c, enter_smm_get_segment_flags(&seg
));
6506 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6507 put_smstate(u32
, buf
, 0x7fc0, seg
.selector
);
6508 put_smstate(u32
, buf
, 0x7f80, seg
.base
);
6509 put_smstate(u32
, buf
, 0x7f7c, seg
.limit
);
6510 put_smstate(u32
, buf
, 0x7f78, enter_smm_get_segment_flags(&seg
));
6512 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6513 put_smstate(u32
, buf
, 0x7f74, dt
.address
);
6514 put_smstate(u32
, buf
, 0x7f70, dt
.size
);
6516 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6517 put_smstate(u32
, buf
, 0x7f58, dt
.address
);
6518 put_smstate(u32
, buf
, 0x7f54, dt
.size
);
6520 for (i
= 0; i
< 6; i
++)
6521 enter_smm_save_seg_32(vcpu
, buf
, i
);
6523 put_smstate(u32
, buf
, 0x7f14, kvm_read_cr4(vcpu
));
6526 put_smstate(u32
, buf
, 0x7efc, 0x00020000);
6527 put_smstate(u32
, buf
, 0x7ef8, vcpu
->arch
.smbase
);
6530 static void enter_smm_save_state_64(struct kvm_vcpu
*vcpu
, char *buf
)
6532 #ifdef CONFIG_X86_64
6534 struct kvm_segment seg
;
6538 for (i
= 0; i
< 16; i
++)
6539 put_smstate(u64
, buf
, 0x7ff8 - i
* 8, kvm_register_read(vcpu
, i
));
6541 put_smstate(u64
, buf
, 0x7f78, kvm_rip_read(vcpu
));
6542 put_smstate(u32
, buf
, 0x7f70, kvm_get_rflags(vcpu
));
6544 kvm_get_dr(vcpu
, 6, &val
);
6545 put_smstate(u64
, buf
, 0x7f68, val
);
6546 kvm_get_dr(vcpu
, 7, &val
);
6547 put_smstate(u64
, buf
, 0x7f60, val
);
6549 put_smstate(u64
, buf
, 0x7f58, kvm_read_cr0(vcpu
));
6550 put_smstate(u64
, buf
, 0x7f50, kvm_read_cr3(vcpu
));
6551 put_smstate(u64
, buf
, 0x7f48, kvm_read_cr4(vcpu
));
6553 put_smstate(u32
, buf
, 0x7f00, vcpu
->arch
.smbase
);
6556 put_smstate(u32
, buf
, 0x7efc, 0x00020064);
6558 put_smstate(u64
, buf
, 0x7ed0, vcpu
->arch
.efer
);
6560 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_TR
);
6561 put_smstate(u16
, buf
, 0x7e90, seg
.selector
);
6562 put_smstate(u16
, buf
, 0x7e92, enter_smm_get_segment_flags(&seg
) >> 8);
6563 put_smstate(u32
, buf
, 0x7e94, seg
.limit
);
6564 put_smstate(u64
, buf
, 0x7e98, seg
.base
);
6566 kvm_x86_ops
->get_idt(vcpu
, &dt
);
6567 put_smstate(u32
, buf
, 0x7e84, dt
.size
);
6568 put_smstate(u64
, buf
, 0x7e88, dt
.address
);
6570 kvm_get_segment(vcpu
, &seg
, VCPU_SREG_LDTR
);
6571 put_smstate(u16
, buf
, 0x7e70, seg
.selector
);
6572 put_smstate(u16
, buf
, 0x7e72, enter_smm_get_segment_flags(&seg
) >> 8);
6573 put_smstate(u32
, buf
, 0x7e74, seg
.limit
);
6574 put_smstate(u64
, buf
, 0x7e78, seg
.base
);
6576 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
6577 put_smstate(u32
, buf
, 0x7e64, dt
.size
);
6578 put_smstate(u64
, buf
, 0x7e68, dt
.address
);
6580 for (i
= 0; i
< 6; i
++)
6581 enter_smm_save_seg_64(vcpu
, buf
, i
);
6587 static void enter_smm(struct kvm_vcpu
*vcpu
)
6589 struct kvm_segment cs
, ds
;
6594 trace_kvm_enter_smm(vcpu
->vcpu_id
, vcpu
->arch
.smbase
, true);
6595 vcpu
->arch
.hflags
|= HF_SMM_MASK
;
6596 memset(buf
, 0, 512);
6597 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6598 enter_smm_save_state_64(vcpu
, buf
);
6600 enter_smm_save_state_32(vcpu
, buf
);
6602 kvm_vcpu_write_guest(vcpu
, vcpu
->arch
.smbase
+ 0xfe00, buf
, sizeof(buf
));
6604 if (kvm_x86_ops
->get_nmi_mask(vcpu
))
6605 vcpu
->arch
.hflags
|= HF_SMM_INSIDE_NMI_MASK
;
6607 kvm_x86_ops
->set_nmi_mask(vcpu
, true);
6609 kvm_set_rflags(vcpu
, X86_EFLAGS_FIXED
);
6610 kvm_rip_write(vcpu
, 0x8000);
6612 cr0
= vcpu
->arch
.cr0
& ~(X86_CR0_PE
| X86_CR0_EM
| X86_CR0_TS
| X86_CR0_PG
);
6613 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
6614 vcpu
->arch
.cr0
= cr0
;
6616 kvm_x86_ops
->set_cr4(vcpu
, 0);
6618 /* Undocumented: IDT limit is set to zero on entry to SMM. */
6619 dt
.address
= dt
.size
= 0;
6620 kvm_x86_ops
->set_idt(vcpu
, &dt
);
6622 __kvm_set_dr(vcpu
, 7, DR7_FIXED_1
);
6624 cs
.selector
= (vcpu
->arch
.smbase
>> 4) & 0xffff;
6625 cs
.base
= vcpu
->arch
.smbase
;
6630 cs
.limit
= ds
.limit
= 0xffffffff;
6631 cs
.type
= ds
.type
= 0x3;
6632 cs
.dpl
= ds
.dpl
= 0;
6637 cs
.avl
= ds
.avl
= 0;
6638 cs
.present
= ds
.present
= 1;
6639 cs
.unusable
= ds
.unusable
= 0;
6640 cs
.padding
= ds
.padding
= 0;
6642 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
6643 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_DS
);
6644 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_ES
);
6645 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_FS
);
6646 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_GS
);
6647 kvm_set_segment(vcpu
, &ds
, VCPU_SREG_SS
);
6649 if (guest_cpuid_has(vcpu
, X86_FEATURE_LM
))
6650 kvm_x86_ops
->set_efer(vcpu
, 0);
6652 kvm_update_cpuid(vcpu
);
6653 kvm_mmu_reset_context(vcpu
);
6656 static void process_smi(struct kvm_vcpu
*vcpu
)
6658 vcpu
->arch
.smi_pending
= true;
6659 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6662 void kvm_make_scan_ioapic_request(struct kvm
*kvm
)
6664 kvm_make_all_cpus_request(kvm
, KVM_REQ_SCAN_IOAPIC
);
6667 static void vcpu_scan_ioapic(struct kvm_vcpu
*vcpu
)
6669 u64 eoi_exit_bitmap
[4];
6671 if (!kvm_apic_hw_enabled(vcpu
->arch
.apic
))
6674 bitmap_zero(vcpu
->arch
.ioapic_handled_vectors
, 256);
6676 if (irqchip_split(vcpu
->kvm
))
6677 kvm_scan_ioapic_routes(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6679 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6680 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6681 kvm_ioapic_scan_entry(vcpu
, vcpu
->arch
.ioapic_handled_vectors
);
6683 bitmap_or((ulong
*)eoi_exit_bitmap
, vcpu
->arch
.ioapic_handled_vectors
,
6684 vcpu_to_synic(vcpu
)->vec_bitmap
, 256);
6685 kvm_x86_ops
->load_eoi_exitmap(vcpu
, eoi_exit_bitmap
);
6688 static void kvm_vcpu_flush_tlb(struct kvm_vcpu
*vcpu
)
6690 ++vcpu
->stat
.tlb_flush
;
6691 kvm_x86_ops
->tlb_flush(vcpu
);
6694 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu
*vcpu
)
6696 struct page
*page
= NULL
;
6698 if (!lapic_in_kernel(vcpu
))
6701 if (!kvm_x86_ops
->set_apic_access_page_addr
)
6704 page
= gfn_to_page(vcpu
->kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
);
6705 if (is_error_page(page
))
6707 kvm_x86_ops
->set_apic_access_page_addr(vcpu
, page_to_phys(page
));
6710 * Do not pin apic access page in memory, the MMU notifier
6711 * will call us again if it is migrated or swapped out.
6715 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page
);
6717 void kvm_arch_mmu_notifier_invalidate_page(struct kvm
*kvm
,
6718 unsigned long address
)
6721 * The physical address of apic access page is stored in the VMCS.
6722 * Update it when it becomes invalid.
6724 if (address
== gfn_to_hva(kvm
, APIC_DEFAULT_PHYS_BASE
>> PAGE_SHIFT
))
6725 kvm_make_all_cpus_request(kvm
, KVM_REQ_APIC_PAGE_RELOAD
);
6729 * Returns 1 to let vcpu_run() continue the guest execution loop without
6730 * exiting to the userspace. Otherwise, the value will be returned to the
6733 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
6737 dm_request_for_irq_injection(vcpu
) &&
6738 kvm_cpu_accept_dm_intr(vcpu
);
6740 bool req_immediate_exit
= false;
6742 if (kvm_request_pending(vcpu
)) {
6743 if (kvm_check_request(KVM_REQ_MMU_RELOAD
, vcpu
))
6744 kvm_mmu_unload(vcpu
);
6745 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER
, vcpu
))
6746 __kvm_migrate_timers(vcpu
);
6747 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
))
6748 kvm_gen_update_masterclock(vcpu
->kvm
);
6749 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE
, vcpu
))
6750 kvm_gen_kvmclock_update(vcpu
);
6751 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE
, vcpu
)) {
6752 r
= kvm_guest_time_update(vcpu
);
6756 if (kvm_check_request(KVM_REQ_MMU_SYNC
, vcpu
))
6757 kvm_mmu_sync_roots(vcpu
);
6758 if (kvm_check_request(KVM_REQ_TLB_FLUSH
, vcpu
))
6759 kvm_vcpu_flush_tlb(vcpu
);
6760 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS
, vcpu
)) {
6761 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
6765 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT
, vcpu
)) {
6766 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
6767 vcpu
->mmio_needed
= 0;
6771 if (kvm_check_request(KVM_REQ_APF_HALT
, vcpu
)) {
6772 /* Page is swapped out. Do synthetic halt */
6773 vcpu
->arch
.apf
.halted
= true;
6777 if (kvm_check_request(KVM_REQ_STEAL_UPDATE
, vcpu
))
6778 record_steal_time(vcpu
);
6779 if (kvm_check_request(KVM_REQ_SMI
, vcpu
))
6781 if (kvm_check_request(KVM_REQ_NMI
, vcpu
))
6783 if (kvm_check_request(KVM_REQ_PMU
, vcpu
))
6784 kvm_pmu_handle_event(vcpu
);
6785 if (kvm_check_request(KVM_REQ_PMI
, vcpu
))
6786 kvm_pmu_deliver_pmi(vcpu
);
6787 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT
, vcpu
)) {
6788 BUG_ON(vcpu
->arch
.pending_ioapic_eoi
> 255);
6789 if (test_bit(vcpu
->arch
.pending_ioapic_eoi
,
6790 vcpu
->arch
.ioapic_handled_vectors
)) {
6791 vcpu
->run
->exit_reason
= KVM_EXIT_IOAPIC_EOI
;
6792 vcpu
->run
->eoi
.vector
=
6793 vcpu
->arch
.pending_ioapic_eoi
;
6798 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC
, vcpu
))
6799 vcpu_scan_ioapic(vcpu
);
6800 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD
, vcpu
))
6801 kvm_vcpu_reload_apic_access_page(vcpu
);
6802 if (kvm_check_request(KVM_REQ_HV_CRASH
, vcpu
)) {
6803 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6804 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_CRASH
;
6808 if (kvm_check_request(KVM_REQ_HV_RESET
, vcpu
)) {
6809 vcpu
->run
->exit_reason
= KVM_EXIT_SYSTEM_EVENT
;
6810 vcpu
->run
->system_event
.type
= KVM_SYSTEM_EVENT_RESET
;
6814 if (kvm_check_request(KVM_REQ_HV_EXIT
, vcpu
)) {
6815 vcpu
->run
->exit_reason
= KVM_EXIT_HYPERV
;
6816 vcpu
->run
->hyperv
= vcpu
->arch
.hyperv
.exit
;
6822 * KVM_REQ_HV_STIMER has to be processed after
6823 * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
6824 * depend on the guest clock being up-to-date
6826 if (kvm_check_request(KVM_REQ_HV_STIMER
, vcpu
))
6827 kvm_hv_process_stimers(vcpu
);
6830 if (kvm_check_request(KVM_REQ_EVENT
, vcpu
) || req_int_win
) {
6831 ++vcpu
->stat
.req_event
;
6832 kvm_apic_accept_events(vcpu
);
6833 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_INIT_RECEIVED
) {
6838 if (inject_pending_event(vcpu
, req_int_win
) != 0)
6839 req_immediate_exit
= true;
6841 /* Enable NMI/IRQ window open exits if needed.
6843 * SMIs have two cases: 1) they can be nested, and
6844 * then there is nothing to do here because RSM will
6845 * cause a vmexit anyway; 2) or the SMI can be pending
6846 * because inject_pending_event has completed the
6847 * injection of an IRQ or NMI from the previous vmexit,
6848 * and then we request an immediate exit to inject the SMI.
6850 if (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
))
6851 req_immediate_exit
= true;
6852 if (vcpu
->arch
.nmi_pending
)
6853 kvm_x86_ops
->enable_nmi_window(vcpu
);
6854 if (kvm_cpu_has_injectable_intr(vcpu
) || req_int_win
)
6855 kvm_x86_ops
->enable_irq_window(vcpu
);
6858 if (kvm_lapic_enabled(vcpu
)) {
6859 update_cr8_intercept(vcpu
);
6860 kvm_lapic_sync_to_vapic(vcpu
);
6864 r
= kvm_mmu_reload(vcpu
);
6866 goto cancel_injection
;
6871 kvm_x86_ops
->prepare_guest_switch(vcpu
);
6872 kvm_load_guest_fpu(vcpu
);
6875 * Disable IRQs before setting IN_GUEST_MODE. Posted interrupt
6876 * IPI are then delayed after guest entry, which ensures that they
6877 * result in virtual interrupt delivery.
6879 local_irq_disable();
6880 vcpu
->mode
= IN_GUEST_MODE
;
6882 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
6885 * 1) We should set ->mode before checking ->requests. Please see
6886 * the comment in kvm_vcpu_exiting_guest_mode().
6888 * 2) For APICv, we should set ->mode before checking PIR.ON. This
6889 * pairs with the memory barrier implicit in pi_test_and_set_on
6890 * (see vmx_deliver_posted_interrupt).
6892 * 3) This also orders the write to mode from any reads to the page
6893 * tables done while the VCPU is running. Please see the comment
6894 * in kvm_flush_remote_tlbs.
6896 smp_mb__after_srcu_read_unlock();
6899 * This handles the case where a posted interrupt was
6900 * notified with kvm_vcpu_kick.
6902 if (kvm_lapic_enabled(vcpu
)) {
6903 if (kvm_x86_ops
->sync_pir_to_irr
&& vcpu
->arch
.apicv_active
)
6904 kvm_x86_ops
->sync_pir_to_irr(vcpu
);
6907 if (vcpu
->mode
== EXITING_GUEST_MODE
|| kvm_request_pending(vcpu
)
6908 || need_resched() || signal_pending(current
)) {
6909 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6913 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6915 goto cancel_injection
;
6918 kvm_load_guest_xcr0(vcpu
);
6920 if (req_immediate_exit
) {
6921 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
6922 smp_send_reschedule(vcpu
->cpu
);
6925 trace_kvm_entry(vcpu
->vcpu_id
);
6926 wait_lapic_expire(vcpu
);
6927 guest_enter_irqoff();
6929 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
6931 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
6932 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
6933 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
6934 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
6935 set_debugreg(vcpu
->arch
.dr6
, 6);
6936 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6939 kvm_x86_ops
->run(vcpu
);
6942 * Do this here before restoring debug registers on the host. And
6943 * since we do this before handling the vmexit, a DR access vmexit
6944 * can (a) read the correct value of the debug registers, (b) set
6945 * KVM_DEBUGREG_WONT_EXIT again.
6947 if (unlikely(vcpu
->arch
.switch_db_regs
& KVM_DEBUGREG_WONT_EXIT
)) {
6948 WARN_ON(vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
);
6949 kvm_x86_ops
->sync_dirty_debug_regs(vcpu
);
6950 kvm_update_dr0123(vcpu
);
6951 kvm_update_dr6(vcpu
);
6952 kvm_update_dr7(vcpu
);
6953 vcpu
->arch
.switch_db_regs
&= ~KVM_DEBUGREG_RELOAD
;
6957 * If the guest has used debug registers, at least dr7
6958 * will be disabled while returning to the host.
6959 * If we don't have active breakpoints in the host, we don't
6960 * care about the messed up debug address registers. But if
6961 * we have some of them active, restore the old state.
6963 if (hw_breakpoint_active())
6964 hw_breakpoint_restore();
6966 vcpu
->arch
.last_guest_tsc
= kvm_read_l1_tsc(vcpu
, rdtsc());
6968 vcpu
->mode
= OUTSIDE_GUEST_MODE
;
6971 kvm_put_guest_xcr0(vcpu
);
6973 kvm_x86_ops
->handle_external_intr(vcpu
);
6977 guest_exit_irqoff();
6982 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
6985 * Profile KVM exit RIPs:
6987 if (unlikely(prof_on
== KVM_PROFILING
)) {
6988 unsigned long rip
= kvm_rip_read(vcpu
);
6989 profile_hit(KVM_PROFILING
, (void *)rip
);
6992 if (unlikely(vcpu
->arch
.tsc_always_catchup
))
6993 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
6995 if (vcpu
->arch
.apic_attention
)
6996 kvm_lapic_sync_from_vapic(vcpu
);
6998 vcpu
->arch
.gpa_available
= false;
6999 r
= kvm_x86_ops
->handle_exit(vcpu
);
7003 kvm_x86_ops
->cancel_injection(vcpu
);
7004 if (unlikely(vcpu
->arch
.apic_attention
))
7005 kvm_lapic_sync_from_vapic(vcpu
);
7010 static inline int vcpu_block(struct kvm
*kvm
, struct kvm_vcpu
*vcpu
)
7012 if (!kvm_arch_vcpu_runnable(vcpu
) &&
7013 (!kvm_x86_ops
->pre_block
|| kvm_x86_ops
->pre_block(vcpu
) == 0)) {
7014 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7015 kvm_vcpu_block(vcpu
);
7016 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7018 if (kvm_x86_ops
->post_block
)
7019 kvm_x86_ops
->post_block(vcpu
);
7021 if (!kvm_check_request(KVM_REQ_UNHALT
, vcpu
))
7025 kvm_apic_accept_events(vcpu
);
7026 switch(vcpu
->arch
.mp_state
) {
7027 case KVM_MP_STATE_HALTED
:
7028 vcpu
->arch
.pv
.pv_unhalted
= false;
7029 vcpu
->arch
.mp_state
=
7030 KVM_MP_STATE_RUNNABLE
;
7031 case KVM_MP_STATE_RUNNABLE
:
7032 vcpu
->arch
.apf
.halted
= false;
7034 case KVM_MP_STATE_INIT_RECEIVED
:
7043 static inline bool kvm_vcpu_running(struct kvm_vcpu
*vcpu
)
7045 if (is_guest_mode(vcpu
) && kvm_x86_ops
->check_nested_events
)
7046 kvm_x86_ops
->check_nested_events(vcpu
, false);
7048 return (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
&&
7049 !vcpu
->arch
.apf
.halted
);
7052 static int vcpu_run(struct kvm_vcpu
*vcpu
)
7055 struct kvm
*kvm
= vcpu
->kvm
;
7057 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7060 if (kvm_vcpu_running(vcpu
)) {
7061 r
= vcpu_enter_guest(vcpu
);
7063 r
= vcpu_block(kvm
, vcpu
);
7069 kvm_clear_request(KVM_REQ_PENDING_TIMER
, vcpu
);
7070 if (kvm_cpu_has_pending_timer(vcpu
))
7071 kvm_inject_pending_timer_irqs(vcpu
);
7073 if (dm_request_for_irq_injection(vcpu
) &&
7074 kvm_vcpu_ready_for_interrupt_injection(vcpu
)) {
7076 vcpu
->run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
7077 ++vcpu
->stat
.request_irq_exits
;
7081 kvm_check_async_pf_completion(vcpu
);
7083 if (signal_pending(current
)) {
7085 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
7086 ++vcpu
->stat
.signal_exits
;
7089 if (need_resched()) {
7090 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7092 vcpu
->srcu_idx
= srcu_read_lock(&kvm
->srcu
);
7096 srcu_read_unlock(&kvm
->srcu
, vcpu
->srcu_idx
);
7101 static inline int complete_emulated_io(struct kvm_vcpu
*vcpu
)
7104 vcpu
->srcu_idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7105 r
= emulate_instruction(vcpu
, EMULTYPE_NO_DECODE
);
7106 srcu_read_unlock(&vcpu
->kvm
->srcu
, vcpu
->srcu_idx
);
7107 if (r
!= EMULATE_DONE
)
7112 static int complete_emulated_pio(struct kvm_vcpu
*vcpu
)
7114 BUG_ON(!vcpu
->arch
.pio
.count
);
7116 return complete_emulated_io(vcpu
);
7120 * Implements the following, as a state machine:
7124 * for each mmio piece in the fragment
7132 * for each mmio piece in the fragment
7137 static int complete_emulated_mmio(struct kvm_vcpu
*vcpu
)
7139 struct kvm_run
*run
= vcpu
->run
;
7140 struct kvm_mmio_fragment
*frag
;
7143 BUG_ON(!vcpu
->mmio_needed
);
7145 /* Complete previous fragment */
7146 frag
= &vcpu
->mmio_fragments
[vcpu
->mmio_cur_fragment
];
7147 len
= min(8u, frag
->len
);
7148 if (!vcpu
->mmio_is_write
)
7149 memcpy(frag
->data
, run
->mmio
.data
, len
);
7151 if (frag
->len
<= 8) {
7152 /* Switch to the next fragment. */
7154 vcpu
->mmio_cur_fragment
++;
7156 /* Go forward to the next mmio piece. */
7162 if (vcpu
->mmio_cur_fragment
>= vcpu
->mmio_nr_fragments
) {
7163 vcpu
->mmio_needed
= 0;
7165 /* FIXME: return into emulator if single-stepping. */
7166 if (vcpu
->mmio_is_write
)
7168 vcpu
->mmio_read_completed
= 1;
7169 return complete_emulated_io(vcpu
);
7172 run
->exit_reason
= KVM_EXIT_MMIO
;
7173 run
->mmio
.phys_addr
= frag
->gpa
;
7174 if (vcpu
->mmio_is_write
)
7175 memcpy(run
->mmio
.data
, frag
->data
, min(8u, frag
->len
));
7176 run
->mmio
.len
= min(8u, frag
->len
);
7177 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
7178 vcpu
->arch
.complete_userspace_io
= complete_emulated_mmio
;
7183 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
7185 struct fpu
*fpu
= ¤t
->thread
.fpu
;
7189 fpu__activate_curr(fpu
);
7191 if (vcpu
->sigset_active
)
7192 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
7194 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
7195 kvm_vcpu_block(vcpu
);
7196 kvm_apic_accept_events(vcpu
);
7197 kvm_clear_request(KVM_REQ_UNHALT
, vcpu
);
7202 /* re-sync apic's tpr */
7203 if (!lapic_in_kernel(vcpu
)) {
7204 if (kvm_set_cr8(vcpu
, kvm_run
->cr8
) != 0) {
7210 if (unlikely(vcpu
->arch
.complete_userspace_io
)) {
7211 int (*cui
)(struct kvm_vcpu
*) = vcpu
->arch
.complete_userspace_io
;
7212 vcpu
->arch
.complete_userspace_io
= NULL
;
7217 WARN_ON(vcpu
->arch
.pio
.count
|| vcpu
->mmio_needed
);
7219 if (kvm_run
->immediate_exit
)
7225 post_kvm_run_save(vcpu
);
7226 if (vcpu
->sigset_active
)
7227 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
7232 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7234 if (vcpu
->arch
.emulate_regs_need_sync_to_vcpu
) {
7236 * We are here if userspace calls get_regs() in the middle of
7237 * instruction emulation. Registers state needs to be copied
7238 * back from emulation context to vcpu. Userspace shouldn't do
7239 * that usually, but some bad designed PV devices (vmware
7240 * backdoor interface) need this to work
7242 emulator_writeback_register_cache(&vcpu
->arch
.emulate_ctxt
);
7243 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7245 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
7246 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
7247 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
7248 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
7249 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
7250 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
7251 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
7252 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
7253 #ifdef CONFIG_X86_64
7254 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
7255 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
7256 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
7257 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
7258 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
7259 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
7260 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
7261 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
7264 regs
->rip
= kvm_rip_read(vcpu
);
7265 regs
->rflags
= kvm_get_rflags(vcpu
);
7270 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
7272 vcpu
->arch
.emulate_regs_need_sync_from_vcpu
= true;
7273 vcpu
->arch
.emulate_regs_need_sync_to_vcpu
= false;
7275 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
7276 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
7277 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
7278 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
7279 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
7280 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
7281 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
7282 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
7283 #ifdef CONFIG_X86_64
7284 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
7285 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
7286 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
7287 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
7288 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
7289 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
7290 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
7291 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
7294 kvm_rip_write(vcpu
, regs
->rip
);
7295 kvm_set_rflags(vcpu
, regs
->rflags
);
7297 vcpu
->arch
.exception
.pending
= false;
7299 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7304 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
7306 struct kvm_segment cs
;
7308 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7312 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
7314 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
7315 struct kvm_sregs
*sregs
)
7319 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7320 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7321 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7322 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7323 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7324 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7326 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7327 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7329 kvm_x86_ops
->get_idt(vcpu
, &dt
);
7330 sregs
->idt
.limit
= dt
.size
;
7331 sregs
->idt
.base
= dt
.address
;
7332 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
7333 sregs
->gdt
.limit
= dt
.size
;
7334 sregs
->gdt
.base
= dt
.address
;
7336 sregs
->cr0
= kvm_read_cr0(vcpu
);
7337 sregs
->cr2
= vcpu
->arch
.cr2
;
7338 sregs
->cr3
= kvm_read_cr3(vcpu
);
7339 sregs
->cr4
= kvm_read_cr4(vcpu
);
7340 sregs
->cr8
= kvm_get_cr8(vcpu
);
7341 sregs
->efer
= vcpu
->arch
.efer
;
7342 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
7344 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
7346 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
7347 set_bit(vcpu
->arch
.interrupt
.nr
,
7348 (unsigned long *)sregs
->interrupt_bitmap
);
7353 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
7354 struct kvm_mp_state
*mp_state
)
7356 kvm_apic_accept_events(vcpu
);
7357 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_HALTED
&&
7358 vcpu
->arch
.pv
.pv_unhalted
)
7359 mp_state
->mp_state
= KVM_MP_STATE_RUNNABLE
;
7361 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
7366 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
7367 struct kvm_mp_state
*mp_state
)
7369 if (!lapic_in_kernel(vcpu
) &&
7370 mp_state
->mp_state
!= KVM_MP_STATE_RUNNABLE
)
7373 /* INITs are latched while in SMM */
7374 if ((is_smm(vcpu
) || vcpu
->arch
.smi_pending
) &&
7375 (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
||
7376 mp_state
->mp_state
== KVM_MP_STATE_INIT_RECEIVED
))
7379 if (mp_state
->mp_state
== KVM_MP_STATE_SIPI_RECEIVED
) {
7380 vcpu
->arch
.mp_state
= KVM_MP_STATE_INIT_RECEIVED
;
7381 set_bit(KVM_APIC_SIPI
, &vcpu
->arch
.apic
->pending_events
);
7383 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
7384 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7388 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int idt_index
,
7389 int reason
, bool has_error_code
, u32 error_code
)
7391 struct x86_emulate_ctxt
*ctxt
= &vcpu
->arch
.emulate_ctxt
;
7394 init_emulate_ctxt(vcpu
);
7396 ret
= emulator_task_switch(ctxt
, tss_selector
, idt_index
, reason
,
7397 has_error_code
, error_code
);
7400 return EMULATE_FAIL
;
7402 kvm_rip_write(vcpu
, ctxt
->eip
);
7403 kvm_set_rflags(vcpu
, ctxt
->eflags
);
7404 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7405 return EMULATE_DONE
;
7407 EXPORT_SYMBOL_GPL(kvm_task_switch
);
7409 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
7410 struct kvm_sregs
*sregs
)
7412 struct msr_data apic_base_msr
;
7413 int mmu_reset_needed
= 0;
7414 int pending_vec
, max_bits
, idx
;
7417 if (!guest_cpuid_has(vcpu
, X86_FEATURE_XSAVE
) &&
7418 (sregs
->cr4
& X86_CR4_OSXSAVE
))
7421 apic_base_msr
.data
= sregs
->apic_base
;
7422 apic_base_msr
.host_initiated
= true;
7423 if (kvm_set_apic_base(vcpu
, &apic_base_msr
))
7426 dt
.size
= sregs
->idt
.limit
;
7427 dt
.address
= sregs
->idt
.base
;
7428 kvm_x86_ops
->set_idt(vcpu
, &dt
);
7429 dt
.size
= sregs
->gdt
.limit
;
7430 dt
.address
= sregs
->gdt
.base
;
7431 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
7433 vcpu
->arch
.cr2
= sregs
->cr2
;
7434 mmu_reset_needed
|= kvm_read_cr3(vcpu
) != sregs
->cr3
;
7435 vcpu
->arch
.cr3
= sregs
->cr3
;
7436 __set_bit(VCPU_EXREG_CR3
, (ulong
*)&vcpu
->arch
.regs_avail
);
7438 kvm_set_cr8(vcpu
, sregs
->cr8
);
7440 mmu_reset_needed
|= vcpu
->arch
.efer
!= sregs
->efer
;
7441 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
7443 mmu_reset_needed
|= kvm_read_cr0(vcpu
) != sregs
->cr0
;
7444 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
7445 vcpu
->arch
.cr0
= sregs
->cr0
;
7447 mmu_reset_needed
|= kvm_read_cr4(vcpu
) != sregs
->cr4
;
7448 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
7449 if (sregs
->cr4
& (X86_CR4_OSXSAVE
| X86_CR4_PKE
))
7450 kvm_update_cpuid(vcpu
);
7452 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7453 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
7454 load_pdptrs(vcpu
, vcpu
->arch
.walk_mmu
, kvm_read_cr3(vcpu
));
7455 mmu_reset_needed
= 1;
7457 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7459 if (mmu_reset_needed
)
7460 kvm_mmu_reset_context(vcpu
);
7462 max_bits
= KVM_NR_INTERRUPTS
;
7463 pending_vec
= find_first_bit(
7464 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
7465 if (pending_vec
< max_bits
) {
7466 kvm_queue_interrupt(vcpu
, pending_vec
, false);
7467 pr_debug("Set back pending irq %d\n", pending_vec
);
7470 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
7471 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
7472 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
7473 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
7474 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
7475 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
7477 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
7478 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
7480 update_cr8_intercept(vcpu
);
7482 /* Older userspace won't unhalt the vcpu on reset. */
7483 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
7484 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
7486 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7488 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7493 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
7494 struct kvm_guest_debug
*dbg
)
7496 unsigned long rflags
;
7499 if (dbg
->control
& (KVM_GUESTDBG_INJECT_DB
| KVM_GUESTDBG_INJECT_BP
)) {
7501 if (vcpu
->arch
.exception
.pending
)
7503 if (dbg
->control
& KVM_GUESTDBG_INJECT_DB
)
7504 kvm_queue_exception(vcpu
, DB_VECTOR
);
7506 kvm_queue_exception(vcpu
, BP_VECTOR
);
7510 * Read rflags as long as potentially injected trace flags are still
7513 rflags
= kvm_get_rflags(vcpu
);
7515 vcpu
->guest_debug
= dbg
->control
;
7516 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
7517 vcpu
->guest_debug
= 0;
7519 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
7520 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
7521 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
7522 vcpu
->arch
.guest_debug_dr7
= dbg
->arch
.debugreg
[7];
7524 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
7525 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
7527 kvm_update_dr7(vcpu
);
7529 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
7530 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
) +
7531 get_segment_base(vcpu
, VCPU_SREG_CS
);
7534 * Trigger an rflags update that will inject or remove the trace
7537 kvm_set_rflags(vcpu
, rflags
);
7539 kvm_x86_ops
->update_bp_intercept(vcpu
);
7549 * Translate a guest virtual address to a guest physical address.
7551 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
7552 struct kvm_translation
*tr
)
7554 unsigned long vaddr
= tr
->linear_address
;
7558 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
7559 gpa
= kvm_mmu_gva_to_gpa_system(vcpu
, vaddr
, NULL
);
7560 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
7561 tr
->physical_address
= gpa
;
7562 tr
->valid
= gpa
!= UNMAPPED_GVA
;
7569 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7571 struct fxregs_state
*fxsave
=
7572 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7574 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
7575 fpu
->fcw
= fxsave
->cwd
;
7576 fpu
->fsw
= fxsave
->swd
;
7577 fpu
->ftwx
= fxsave
->twd
;
7578 fpu
->last_opcode
= fxsave
->fop
;
7579 fpu
->last_ip
= fxsave
->rip
;
7580 fpu
->last_dp
= fxsave
->rdp
;
7581 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
7586 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
7588 struct fxregs_state
*fxsave
=
7589 &vcpu
->arch
.guest_fpu
.state
.fxsave
;
7591 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
7592 fxsave
->cwd
= fpu
->fcw
;
7593 fxsave
->swd
= fpu
->fsw
;
7594 fxsave
->twd
= fpu
->ftwx
;
7595 fxsave
->fop
= fpu
->last_opcode
;
7596 fxsave
->rip
= fpu
->last_ip
;
7597 fxsave
->rdp
= fpu
->last_dp
;
7598 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
7603 static void fx_init(struct kvm_vcpu
*vcpu
)
7605 fpstate_init(&vcpu
->arch
.guest_fpu
.state
);
7606 if (boot_cpu_has(X86_FEATURE_XSAVES
))
7607 vcpu
->arch
.guest_fpu
.state
.xsave
.header
.xcomp_bv
=
7608 host_xcr0
| XSTATE_COMPACTION_ENABLED
;
7611 * Ensure guest xcr0 is valid for loading
7613 vcpu
->arch
.xcr0
= XFEATURE_MASK_FP
;
7615 vcpu
->arch
.cr0
|= X86_CR0_ET
;
7618 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
7620 if (vcpu
->guest_fpu_loaded
)
7624 * Restore all possible states in the guest,
7625 * and assume host would use all available bits.
7626 * Guest xcr0 would be loaded later.
7628 vcpu
->guest_fpu_loaded
= 1;
7629 __kernel_fpu_begin();
7630 __copy_kernel_to_fpregs(&vcpu
->arch
.guest_fpu
.state
);
7634 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
7636 if (!vcpu
->guest_fpu_loaded
)
7639 vcpu
->guest_fpu_loaded
= 0;
7640 copy_fpregs_to_fpstate(&vcpu
->arch
.guest_fpu
);
7642 ++vcpu
->stat
.fpu_reload
;
7646 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
7648 void *wbinvd_dirty_mask
= vcpu
->arch
.wbinvd_dirty_mask
;
7650 kvmclock_reset(vcpu
);
7652 kvm_x86_ops
->vcpu_free(vcpu
);
7653 free_cpumask_var(wbinvd_dirty_mask
);
7656 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
7659 struct kvm_vcpu
*vcpu
;
7661 if (check_tsc_unstable() && atomic_read(&kvm
->online_vcpus
) != 0)
7662 printk_once(KERN_WARNING
7663 "kvm: SMP vm created on host with unstable TSC; "
7664 "guest TSC will not be reliable\n");
7666 vcpu
= kvm_x86_ops
->vcpu_create(kvm
, id
);
7671 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
7675 kvm_vcpu_mtrr_init(vcpu
);
7676 r
= vcpu_load(vcpu
);
7679 kvm_vcpu_reset(vcpu
, false);
7680 kvm_mmu_setup(vcpu
);
7685 void kvm_arch_vcpu_postcreate(struct kvm_vcpu
*vcpu
)
7687 struct msr_data msr
;
7688 struct kvm
*kvm
= vcpu
->kvm
;
7690 kvm_hv_vcpu_postcreate(vcpu
);
7692 if (vcpu_load(vcpu
))
7695 msr
.index
= MSR_IA32_TSC
;
7696 msr
.host_initiated
= true;
7697 kvm_write_tsc(vcpu
, &msr
);
7700 if (!kvmclock_periodic_sync
)
7703 schedule_delayed_work(&kvm
->arch
.kvmclock_sync_work
,
7704 KVMCLOCK_SYNC_PERIOD
);
7707 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
7710 vcpu
->arch
.apf
.msr_val
= 0;
7712 r
= vcpu_load(vcpu
);
7714 kvm_mmu_unload(vcpu
);
7717 kvm_x86_ops
->vcpu_free(vcpu
);
7720 void kvm_vcpu_reset(struct kvm_vcpu
*vcpu
, bool init_event
)
7722 vcpu
->arch
.hflags
= 0;
7724 vcpu
->arch
.smi_pending
= 0;
7725 atomic_set(&vcpu
->arch
.nmi_queued
, 0);
7726 vcpu
->arch
.nmi_pending
= 0;
7727 vcpu
->arch
.nmi_injected
= false;
7728 kvm_clear_interrupt_queue(vcpu
);
7729 kvm_clear_exception_queue(vcpu
);
7731 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
7732 kvm_update_dr0123(vcpu
);
7733 vcpu
->arch
.dr6
= DR6_INIT
;
7734 kvm_update_dr6(vcpu
);
7735 vcpu
->arch
.dr7
= DR7_FIXED_1
;
7736 kvm_update_dr7(vcpu
);
7740 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
7741 vcpu
->arch
.apf
.msr_val
= 0;
7742 vcpu
->arch
.st
.msr_val
= 0;
7744 kvmclock_reset(vcpu
);
7746 kvm_clear_async_pf_completion_queue(vcpu
);
7747 kvm_async_pf_hash_reset(vcpu
);
7748 vcpu
->arch
.apf
.halted
= false;
7751 kvm_pmu_reset(vcpu
);
7752 vcpu
->arch
.smbase
= 0x30000;
7754 vcpu
->arch
.msr_platform_info
= MSR_PLATFORM_INFO_CPUID_FAULT
;
7755 vcpu
->arch
.msr_misc_features_enables
= 0;
7758 memset(vcpu
->arch
.regs
, 0, sizeof(vcpu
->arch
.regs
));
7759 vcpu
->arch
.regs_avail
= ~0;
7760 vcpu
->arch
.regs_dirty
= ~0;
7762 kvm_x86_ops
->vcpu_reset(vcpu
, init_event
);
7765 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu
*vcpu
, u8 vector
)
7767 struct kvm_segment cs
;
7769 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7770 cs
.selector
= vector
<< 8;
7771 cs
.base
= vector
<< 12;
7772 kvm_set_segment(vcpu
, &cs
, VCPU_SREG_CS
);
7773 kvm_rip_write(vcpu
, 0);
7776 int kvm_arch_hardware_enable(void)
7779 struct kvm_vcpu
*vcpu
;
7784 bool stable
, backwards_tsc
= false;
7786 kvm_shared_msr_cpu_online();
7787 ret
= kvm_x86_ops
->hardware_enable();
7791 local_tsc
= rdtsc();
7792 stable
= !check_tsc_unstable();
7793 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7794 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7795 if (!stable
&& vcpu
->cpu
== smp_processor_id())
7796 kvm_make_request(KVM_REQ_CLOCK_UPDATE
, vcpu
);
7797 if (stable
&& vcpu
->arch
.last_host_tsc
> local_tsc
) {
7798 backwards_tsc
= true;
7799 if (vcpu
->arch
.last_host_tsc
> max_tsc
)
7800 max_tsc
= vcpu
->arch
.last_host_tsc
;
7806 * Sometimes, even reliable TSCs go backwards. This happens on
7807 * platforms that reset TSC during suspend or hibernate actions, but
7808 * maintain synchronization. We must compensate. Fortunately, we can
7809 * detect that condition here, which happens early in CPU bringup,
7810 * before any KVM threads can be running. Unfortunately, we can't
7811 * bring the TSCs fully up to date with real time, as we aren't yet far
7812 * enough into CPU bringup that we know how much real time has actually
7813 * elapsed; our helper function, ktime_get_boot_ns() will be using boot
7814 * variables that haven't been updated yet.
7816 * So we simply find the maximum observed TSC above, then record the
7817 * adjustment to TSC in each VCPU. When the VCPU later gets loaded,
7818 * the adjustment will be applied. Note that we accumulate
7819 * adjustments, in case multiple suspend cycles happen before some VCPU
7820 * gets a chance to run again. In the event that no KVM threads get a
7821 * chance to run, we will miss the entire elapsed period, as we'll have
7822 * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7823 * loose cycle time. This isn't too big a deal, since the loss will be
7824 * uniform across all VCPUs (not to mention the scenario is extremely
7825 * unlikely). It is possible that a second hibernate recovery happens
7826 * much faster than a first, causing the observed TSC here to be
7827 * smaller; this would require additional padding adjustment, which is
7828 * why we set last_host_tsc to the local tsc observed here.
7830 * N.B. - this code below runs only on platforms with reliable TSC,
7831 * as that is the only way backwards_tsc is set above. Also note
7832 * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7833 * have the same delta_cyc adjustment applied if backwards_tsc
7834 * is detected. Note further, this adjustment is only done once,
7835 * as we reset last_host_tsc on all VCPUs to stop this from being
7836 * called multiple times (one for each physical CPU bringup).
7838 * Platforms with unreliable TSCs don't have to deal with this, they
7839 * will be compensated by the logic in vcpu_load, which sets the TSC to
7840 * catchup mode. This will catchup all VCPUs to real time, but cannot
7841 * guarantee that they stay in perfect synchronization.
7843 if (backwards_tsc
) {
7844 u64 delta_cyc
= max_tsc
- local_tsc
;
7845 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
7846 kvm
->arch
.backwards_tsc_observed
= true;
7847 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
7848 vcpu
->arch
.tsc_offset_adjustment
+= delta_cyc
;
7849 vcpu
->arch
.last_host_tsc
= local_tsc
;
7850 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE
, vcpu
);
7854 * We have to disable TSC offset matching.. if you were
7855 * booting a VM while issuing an S4 host suspend....
7856 * you may have some problem. Solving this issue is
7857 * left as an exercise to the reader.
7859 kvm
->arch
.last_tsc_nsec
= 0;
7860 kvm
->arch
.last_tsc_write
= 0;
7867 void kvm_arch_hardware_disable(void)
7869 kvm_x86_ops
->hardware_disable();
7870 drop_user_return_notifiers();
7873 int kvm_arch_hardware_setup(void)
7877 r
= kvm_x86_ops
->hardware_setup();
7881 if (kvm_has_tsc_control
) {
7883 * Make sure the user can only configure tsc_khz values that
7884 * fit into a signed integer.
7885 * A min value is not calculated needed because it will always
7886 * be 1 on all machines.
7888 u64 max
= min(0x7fffffffULL
,
7889 __scale_tsc(kvm_max_tsc_scaling_ratio
, tsc_khz
));
7890 kvm_max_guest_tsc_khz
= max
;
7892 kvm_default_tsc_scaling_ratio
= 1ULL << kvm_tsc_scaling_ratio_frac_bits
;
7895 kvm_init_msr_list();
7899 void kvm_arch_hardware_unsetup(void)
7901 kvm_x86_ops
->hardware_unsetup();
7904 void kvm_arch_check_processor_compat(void *rtn
)
7906 kvm_x86_ops
->check_processor_compatibility(rtn
);
7909 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu
*vcpu
)
7911 return vcpu
->kvm
->arch
.bsp_vcpu_id
== vcpu
->vcpu_id
;
7913 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp
);
7915 bool kvm_vcpu_is_bsp(struct kvm_vcpu
*vcpu
)
7917 return (vcpu
->arch
.apic_base
& MSR_IA32_APICBASE_BSP
) != 0;
7920 struct static_key kvm_no_apic_vcpu __read_mostly
;
7921 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu
);
7923 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
7929 BUG_ON(vcpu
->kvm
== NULL
);
7932 vcpu
->arch
.apicv_active
= kvm_x86_ops
->get_enable_apicv();
7933 vcpu
->arch
.pv
.pv_unhalted
= false;
7934 vcpu
->arch
.emulate_ctxt
.ops
= &emulate_ops
;
7935 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_reset_bsp(vcpu
))
7936 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
7938 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
7940 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
7945 vcpu
->arch
.pio_data
= page_address(page
);
7947 kvm_set_tsc_khz(vcpu
, max_tsc_khz
);
7949 r
= kvm_mmu_create(vcpu
);
7951 goto fail_free_pio_data
;
7953 if (irqchip_in_kernel(kvm
)) {
7954 r
= kvm_create_lapic(vcpu
);
7956 goto fail_mmu_destroy
;
7958 static_key_slow_inc(&kvm_no_apic_vcpu
);
7960 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
7962 if (!vcpu
->arch
.mce_banks
) {
7964 goto fail_free_lapic
;
7966 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
7968 if (!zalloc_cpumask_var(&vcpu
->arch
.wbinvd_dirty_mask
, GFP_KERNEL
)) {
7970 goto fail_free_mce_banks
;
7975 vcpu
->arch
.ia32_tsc_adjust_msr
= 0x0;
7976 vcpu
->arch
.pv_time_enabled
= false;
7978 vcpu
->arch
.guest_supported_xcr0
= 0;
7979 vcpu
->arch
.guest_xstate_size
= XSAVE_HDR_SIZE
+ XSAVE_HDR_OFFSET
;
7981 vcpu
->arch
.maxphyaddr
= cpuid_query_maxphyaddr(vcpu
);
7983 vcpu
->arch
.pat
= MSR_IA32_CR_PAT_DEFAULT
;
7985 kvm_async_pf_hash_reset(vcpu
);
7988 vcpu
->arch
.pending_external_vector
= -1;
7989 vcpu
->arch
.preempted_in_kernel
= false;
7991 kvm_hv_vcpu_init(vcpu
);
7995 fail_free_mce_banks
:
7996 kfree(vcpu
->arch
.mce_banks
);
7998 kvm_free_lapic(vcpu
);
8000 kvm_mmu_destroy(vcpu
);
8002 free_page((unsigned long)vcpu
->arch
.pio_data
);
8007 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
8011 kvm_hv_vcpu_uninit(vcpu
);
8012 kvm_pmu_destroy(vcpu
);
8013 kfree(vcpu
->arch
.mce_banks
);
8014 kvm_free_lapic(vcpu
);
8015 idx
= srcu_read_lock(&vcpu
->kvm
->srcu
);
8016 kvm_mmu_destroy(vcpu
);
8017 srcu_read_unlock(&vcpu
->kvm
->srcu
, idx
);
8018 free_page((unsigned long)vcpu
->arch
.pio_data
);
8019 if (!lapic_in_kernel(vcpu
))
8020 static_key_slow_dec(&kvm_no_apic_vcpu
);
8023 void kvm_arch_sched_in(struct kvm_vcpu
*vcpu
, int cpu
)
8025 kvm_x86_ops
->sched_in(vcpu
, cpu
);
8028 int kvm_arch_init_vm(struct kvm
*kvm
, unsigned long type
)
8033 INIT_HLIST_HEAD(&kvm
->arch
.mask_notifier_list
);
8034 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
8035 INIT_LIST_HEAD(&kvm
->arch
.zapped_obsolete_pages
);
8036 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
8037 atomic_set(&kvm
->arch
.noncoherent_dma_count
, 0);
8039 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8040 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
8041 /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8042 set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID
,
8043 &kvm
->arch
.irq_sources_bitmap
);
8045 raw_spin_lock_init(&kvm
->arch
.tsc_write_lock
);
8046 mutex_init(&kvm
->arch
.apic_map_lock
);
8047 mutex_init(&kvm
->arch
.hyperv
.hv_lock
);
8048 spin_lock_init(&kvm
->arch
.pvclock_gtod_sync_lock
);
8050 kvm
->arch
.kvmclock_offset
= -ktime_get_boot_ns();
8051 pvclock_update_vm_gtod_copy(kvm
);
8053 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_update_work
, kvmclock_update_fn
);
8054 INIT_DELAYED_WORK(&kvm
->arch
.kvmclock_sync_work
, kvmclock_sync_fn
);
8056 kvm_page_track_init(kvm
);
8057 kvm_mmu_init_vm(kvm
);
8059 if (kvm_x86_ops
->vm_init
)
8060 return kvm_x86_ops
->vm_init(kvm
);
8065 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
8068 r
= vcpu_load(vcpu
);
8070 kvm_mmu_unload(vcpu
);
8074 static void kvm_free_vcpus(struct kvm
*kvm
)
8077 struct kvm_vcpu
*vcpu
;
8080 * Unpin any mmu pages first.
8082 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
8083 kvm_clear_async_pf_completion_queue(vcpu
);
8084 kvm_unload_vcpu_mmu(vcpu
);
8086 kvm_for_each_vcpu(i
, vcpu
, kvm
)
8087 kvm_arch_vcpu_free(vcpu
);
8089 mutex_lock(&kvm
->lock
);
8090 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
8091 kvm
->vcpus
[i
] = NULL
;
8093 atomic_set(&kvm
->online_vcpus
, 0);
8094 mutex_unlock(&kvm
->lock
);
8097 void kvm_arch_sync_events(struct kvm
*kvm
)
8099 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_sync_work
);
8100 cancel_delayed_work_sync(&kvm
->arch
.kvmclock_update_work
);
8104 int __x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8108 struct kvm_memslots
*slots
= kvm_memslots(kvm
);
8109 struct kvm_memory_slot
*slot
, old
;
8111 /* Called with kvm->slots_lock held. */
8112 if (WARN_ON(id
>= KVM_MEM_SLOTS_NUM
))
8115 slot
= id_to_memslot(slots
, id
);
8121 * MAP_SHARED to prevent internal slot pages from being moved
8124 hva
= vm_mmap(NULL
, 0, size
, PROT_READ
| PROT_WRITE
,
8125 MAP_SHARED
| MAP_ANONYMOUS
, 0);
8126 if (IS_ERR((void *)hva
))
8127 return PTR_ERR((void *)hva
);
8136 for (i
= 0; i
< KVM_ADDRESS_SPACE_NUM
; i
++) {
8137 struct kvm_userspace_memory_region m
;
8139 m
.slot
= id
| (i
<< 16);
8141 m
.guest_phys_addr
= gpa
;
8142 m
.userspace_addr
= hva
;
8143 m
.memory_size
= size
;
8144 r
= __kvm_set_memory_region(kvm
, &m
);
8150 r
= vm_munmap(old
.userspace_addr
, old
.npages
* PAGE_SIZE
);
8156 EXPORT_SYMBOL_GPL(__x86_set_memory_region
);
8158 int x86_set_memory_region(struct kvm
*kvm
, int id
, gpa_t gpa
, u32 size
)
8162 mutex_lock(&kvm
->slots_lock
);
8163 r
= __x86_set_memory_region(kvm
, id
, gpa
, size
);
8164 mutex_unlock(&kvm
->slots_lock
);
8168 EXPORT_SYMBOL_GPL(x86_set_memory_region
);
8170 void kvm_arch_destroy_vm(struct kvm
*kvm
)
8172 if (current
->mm
== kvm
->mm
) {
8174 * Free memory regions allocated on behalf of userspace,
8175 * unless the the memory map has changed due to process exit
8178 x86_set_memory_region(kvm
, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT
, 0, 0);
8179 x86_set_memory_region(kvm
, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT
, 0, 0);
8180 x86_set_memory_region(kvm
, TSS_PRIVATE_MEMSLOT
, 0, 0);
8182 if (kvm_x86_ops
->vm_destroy
)
8183 kvm_x86_ops
->vm_destroy(kvm
);
8184 kvm_pic_destroy(kvm
);
8185 kvm_ioapic_destroy(kvm
);
8186 kvm_free_vcpus(kvm
);
8187 kvfree(rcu_dereference_check(kvm
->arch
.apic_map
, 1));
8188 kvm_mmu_uninit_vm(kvm
);
8189 kvm_page_track_cleanup(kvm
);
8192 void kvm_arch_free_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*free
,
8193 struct kvm_memory_slot
*dont
)
8197 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8198 if (!dont
|| free
->arch
.rmap
[i
] != dont
->arch
.rmap
[i
]) {
8199 kvfree(free
->arch
.rmap
[i
]);
8200 free
->arch
.rmap
[i
] = NULL
;
8205 if (!dont
|| free
->arch
.lpage_info
[i
- 1] !=
8206 dont
->arch
.lpage_info
[i
- 1]) {
8207 kvfree(free
->arch
.lpage_info
[i
- 1]);
8208 free
->arch
.lpage_info
[i
- 1] = NULL
;
8212 kvm_page_track_free_memslot(free
, dont
);
8215 int kvm_arch_create_memslot(struct kvm
*kvm
, struct kvm_memory_slot
*slot
,
8216 unsigned long npages
)
8220 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8221 struct kvm_lpage_info
*linfo
;
8226 lpages
= gfn_to_index(slot
->base_gfn
+ npages
- 1,
8227 slot
->base_gfn
, level
) + 1;
8229 slot
->arch
.rmap
[i
] =
8230 kvzalloc(lpages
* sizeof(*slot
->arch
.rmap
[i
]), GFP_KERNEL
);
8231 if (!slot
->arch
.rmap
[i
])
8236 linfo
= kvzalloc(lpages
* sizeof(*linfo
), GFP_KERNEL
);
8240 slot
->arch
.lpage_info
[i
- 1] = linfo
;
8242 if (slot
->base_gfn
& (KVM_PAGES_PER_HPAGE(level
) - 1))
8243 linfo
[0].disallow_lpage
= 1;
8244 if ((slot
->base_gfn
+ npages
) & (KVM_PAGES_PER_HPAGE(level
) - 1))
8245 linfo
[lpages
- 1].disallow_lpage
= 1;
8246 ugfn
= slot
->userspace_addr
>> PAGE_SHIFT
;
8248 * If the gfn and userspace address are not aligned wrt each
8249 * other, or if explicitly asked to, disable large page
8250 * support for this slot
8252 if ((slot
->base_gfn
^ ugfn
) & (KVM_PAGES_PER_HPAGE(level
) - 1) ||
8253 !kvm_largepages_enabled()) {
8256 for (j
= 0; j
< lpages
; ++j
)
8257 linfo
[j
].disallow_lpage
= 1;
8261 if (kvm_page_track_create_memslot(slot
, npages
))
8267 for (i
= 0; i
< KVM_NR_PAGE_SIZES
; ++i
) {
8268 kvfree(slot
->arch
.rmap
[i
]);
8269 slot
->arch
.rmap
[i
] = NULL
;
8273 kvfree(slot
->arch
.lpage_info
[i
- 1]);
8274 slot
->arch
.lpage_info
[i
- 1] = NULL
;
8279 void kvm_arch_memslots_updated(struct kvm
*kvm
, struct kvm_memslots
*slots
)
8282 * memslots->generation has been incremented.
8283 * mmio generation may have reached its maximum value.
8285 kvm_mmu_invalidate_mmio_sptes(kvm
, slots
);
8288 int kvm_arch_prepare_memory_region(struct kvm
*kvm
,
8289 struct kvm_memory_slot
*memslot
,
8290 const struct kvm_userspace_memory_region
*mem
,
8291 enum kvm_mr_change change
)
8296 static void kvm_mmu_slot_apply_flags(struct kvm
*kvm
,
8297 struct kvm_memory_slot
*new)
8299 /* Still write protect RO slot */
8300 if (new->flags
& KVM_MEM_READONLY
) {
8301 kvm_mmu_slot_remove_write_access(kvm
, new);
8306 * Call kvm_x86_ops dirty logging hooks when they are valid.
8308 * kvm_x86_ops->slot_disable_log_dirty is called when:
8310 * - KVM_MR_CREATE with dirty logging is disabled
8311 * - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
8313 * The reason is, in case of PML, we need to set D-bit for any slots
8314 * with dirty logging disabled in order to eliminate unnecessary GPA
8315 * logging in PML buffer (and potential PML buffer full VMEXT). This
8316 * guarantees leaving PML enabled during guest's lifetime won't have
8317 * any additonal overhead from PML when guest is running with dirty
8318 * logging disabled for memory slots.
8320 * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
8321 * to dirty logging mode.
8323 * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
8325 * In case of write protect:
8327 * Write protect all pages for dirty logging.
8329 * All the sptes including the large sptes which point to this
8330 * slot are set to readonly. We can not create any new large
8331 * spte on this slot until the end of the logging.
8333 * See the comments in fast_page_fault().
8335 if (new->flags
& KVM_MEM_LOG_DIRTY_PAGES
) {
8336 if (kvm_x86_ops
->slot_enable_log_dirty
)
8337 kvm_x86_ops
->slot_enable_log_dirty(kvm
, new);
8339 kvm_mmu_slot_remove_write_access(kvm
, new);
8341 if (kvm_x86_ops
->slot_disable_log_dirty
)
8342 kvm_x86_ops
->slot_disable_log_dirty(kvm
, new);
8346 void kvm_arch_commit_memory_region(struct kvm
*kvm
,
8347 const struct kvm_userspace_memory_region
*mem
,
8348 const struct kvm_memory_slot
*old
,
8349 const struct kvm_memory_slot
*new,
8350 enum kvm_mr_change change
)
8352 int nr_mmu_pages
= 0;
8354 if (!kvm
->arch
.n_requested_mmu_pages
)
8355 nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
8358 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
8361 * Dirty logging tracks sptes in 4k granularity, meaning that large
8362 * sptes have to be split. If live migration is successful, the guest
8363 * in the source machine will be destroyed and large sptes will be
8364 * created in the destination. However, if the guest continues to run
8365 * in the source machine (for example if live migration fails), small
8366 * sptes will remain around and cause bad performance.
8368 * Scan sptes if dirty logging has been stopped, dropping those
8369 * which can be collapsed into a single large-page spte. Later
8370 * page faults will create the large-page sptes.
8372 if ((change
!= KVM_MR_DELETE
) &&
8373 (old
->flags
& KVM_MEM_LOG_DIRTY_PAGES
) &&
8374 !(new->flags
& KVM_MEM_LOG_DIRTY_PAGES
))
8375 kvm_mmu_zap_collapsible_sptes(kvm
, new);
8378 * Set up write protection and/or dirty logging for the new slot.
8380 * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
8381 * been zapped so no dirty logging staff is needed for old slot. For
8382 * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
8383 * new and it's also covered when dealing with the new slot.
8385 * FIXME: const-ify all uses of struct kvm_memory_slot.
8387 if (change
!= KVM_MR_DELETE
)
8388 kvm_mmu_slot_apply_flags(kvm
, (struct kvm_memory_slot
*) new);
8391 void kvm_arch_flush_shadow_all(struct kvm
*kvm
)
8393 kvm_mmu_invalidate_zap_all_pages(kvm
);
8396 void kvm_arch_flush_shadow_memslot(struct kvm
*kvm
,
8397 struct kvm_memory_slot
*slot
)
8399 kvm_page_track_flush_slot(kvm
, slot
);
8402 static inline bool kvm_vcpu_has_events(struct kvm_vcpu
*vcpu
)
8404 if (!list_empty_careful(&vcpu
->async_pf
.done
))
8407 if (kvm_apic_has_events(vcpu
))
8410 if (vcpu
->arch
.pv
.pv_unhalted
)
8413 if (kvm_test_request(KVM_REQ_NMI
, vcpu
) ||
8414 (vcpu
->arch
.nmi_pending
&&
8415 kvm_x86_ops
->nmi_allowed(vcpu
)))
8418 if (kvm_test_request(KVM_REQ_SMI
, vcpu
) ||
8419 (vcpu
->arch
.smi_pending
&& !is_smm(vcpu
)))
8422 if (kvm_arch_interrupt_allowed(vcpu
) &&
8423 kvm_cpu_has_interrupt(vcpu
))
8426 if (kvm_hv_has_stimer_pending(vcpu
))
8432 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
8434 return kvm_vcpu_running(vcpu
) || kvm_vcpu_has_events(vcpu
);
8437 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu
*vcpu
)
8439 return vcpu
->arch
.preempted_in_kernel
;
8442 int kvm_arch_vcpu_should_kick(struct kvm_vcpu
*vcpu
)
8444 return kvm_vcpu_exiting_guest_mode(vcpu
) == IN_GUEST_MODE
;
8447 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
8449 return kvm_x86_ops
->interrupt_allowed(vcpu
);
8452 unsigned long kvm_get_linear_rip(struct kvm_vcpu
*vcpu
)
8454 if (is_64_bit_mode(vcpu
))
8455 return kvm_rip_read(vcpu
);
8456 return (u32
)(get_segment_base(vcpu
, VCPU_SREG_CS
) +
8457 kvm_rip_read(vcpu
));
8459 EXPORT_SYMBOL_GPL(kvm_get_linear_rip
);
8461 bool kvm_is_linear_rip(struct kvm_vcpu
*vcpu
, unsigned long linear_rip
)
8463 return kvm_get_linear_rip(vcpu
) == linear_rip
;
8465 EXPORT_SYMBOL_GPL(kvm_is_linear_rip
);
8467 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
8469 unsigned long rflags
;
8471 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
8472 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
8473 rflags
&= ~X86_EFLAGS_TF
;
8476 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
8478 static void __kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8480 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
8481 kvm_is_linear_rip(vcpu
, vcpu
->arch
.singlestep_rip
))
8482 rflags
|= X86_EFLAGS_TF
;
8483 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
8486 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
8488 __kvm_set_rflags(vcpu
, rflags
);
8489 kvm_make_request(KVM_REQ_EVENT
, vcpu
);
8491 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
8493 void kvm_arch_async_page_ready(struct kvm_vcpu
*vcpu
, struct kvm_async_pf
*work
)
8497 if ((vcpu
->arch
.mmu
.direct_map
!= work
->arch
.direct_map
) ||
8501 r
= kvm_mmu_reload(vcpu
);
8505 if (!vcpu
->arch
.mmu
.direct_map
&&
8506 work
->arch
.cr3
!= vcpu
->arch
.mmu
.get_cr3(vcpu
))
8509 vcpu
->arch
.mmu
.page_fault(vcpu
, work
->gva
, 0, true);
8512 static inline u32
kvm_async_pf_hash_fn(gfn_t gfn
)
8514 return hash_32(gfn
& 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU
));
8517 static inline u32
kvm_async_pf_next_probe(u32 key
)
8519 return (key
+ 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU
) - 1);
8522 static void kvm_add_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8524 u32 key
= kvm_async_pf_hash_fn(gfn
);
8526 while (vcpu
->arch
.apf
.gfns
[key
] != ~0)
8527 key
= kvm_async_pf_next_probe(key
);
8529 vcpu
->arch
.apf
.gfns
[key
] = gfn
;
8532 static u32
kvm_async_pf_gfn_slot(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8535 u32 key
= kvm_async_pf_hash_fn(gfn
);
8537 for (i
= 0; i
< roundup_pow_of_two(ASYNC_PF_PER_VCPU
) &&
8538 (vcpu
->arch
.apf
.gfns
[key
] != gfn
&&
8539 vcpu
->arch
.apf
.gfns
[key
] != ~0); i
++)
8540 key
= kvm_async_pf_next_probe(key
);
8545 bool kvm_find_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8547 return vcpu
->arch
.apf
.gfns
[kvm_async_pf_gfn_slot(vcpu
, gfn
)] == gfn
;
8550 static void kvm_del_async_pf_gfn(struct kvm_vcpu
*vcpu
, gfn_t gfn
)
8554 i
= j
= kvm_async_pf_gfn_slot(vcpu
, gfn
);
8556 vcpu
->arch
.apf
.gfns
[i
] = ~0;
8558 j
= kvm_async_pf_next_probe(j
);
8559 if (vcpu
->arch
.apf
.gfns
[j
] == ~0)
8561 k
= kvm_async_pf_hash_fn(vcpu
->arch
.apf
.gfns
[j
]);
8563 * k lies cyclically in ]i,j]
8565 * |....j i.k.| or |.k..j i...|
8567 } while ((i
<= j
) ? (i
< k
&& k
<= j
) : (i
< k
|| k
<= j
));
8568 vcpu
->arch
.apf
.gfns
[i
] = vcpu
->arch
.apf
.gfns
[j
];
8573 static int apf_put_user(struct kvm_vcpu
*vcpu
, u32 val
)
8576 return kvm_write_guest_cached(vcpu
->kvm
, &vcpu
->arch
.apf
.data
, &val
,
8580 void kvm_arch_async_page_not_present(struct kvm_vcpu
*vcpu
,
8581 struct kvm_async_pf
*work
)
8583 struct x86_exception fault
;
8585 trace_kvm_async_pf_not_present(work
->arch
.token
, work
->gva
);
8586 kvm_add_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8588 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) ||
8589 (vcpu
->arch
.apf
.send_user_only
&&
8590 kvm_x86_ops
->get_cpl(vcpu
) == 0))
8591 kvm_make_request(KVM_REQ_APF_HALT
, vcpu
);
8592 else if (!apf_put_user(vcpu
, KVM_PV_REASON_PAGE_NOT_PRESENT
)) {
8593 fault
.vector
= PF_VECTOR
;
8594 fault
.error_code_valid
= true;
8595 fault
.error_code
= 0;
8596 fault
.nested_page_fault
= false;
8597 fault
.address
= work
->arch
.token
;
8598 fault
.async_page_fault
= true;
8599 kvm_inject_page_fault(vcpu
, &fault
);
8603 void kvm_arch_async_page_present(struct kvm_vcpu
*vcpu
,
8604 struct kvm_async_pf
*work
)
8606 struct x86_exception fault
;
8608 if (work
->wakeup_all
)
8609 work
->arch
.token
= ~0; /* broadcast wakeup */
8611 kvm_del_async_pf_gfn(vcpu
, work
->arch
.gfn
);
8612 trace_kvm_async_pf_ready(work
->arch
.token
, work
->gva
);
8614 if ((vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
) &&
8615 !apf_put_user(vcpu
, KVM_PV_REASON_PAGE_READY
)) {
8616 fault
.vector
= PF_VECTOR
;
8617 fault
.error_code_valid
= true;
8618 fault
.error_code
= 0;
8619 fault
.nested_page_fault
= false;
8620 fault
.address
= work
->arch
.token
;
8621 fault
.async_page_fault
= true;
8622 kvm_inject_page_fault(vcpu
, &fault
);
8624 vcpu
->arch
.apf
.halted
= false;
8625 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
8628 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu
*vcpu
)
8630 if (!(vcpu
->arch
.apf
.msr_val
& KVM_ASYNC_PF_ENABLED
))
8633 return kvm_can_do_async_pf(vcpu
);
8636 void kvm_arch_start_assignment(struct kvm
*kvm
)
8638 atomic_inc(&kvm
->arch
.assigned_device_count
);
8640 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment
);
8642 void kvm_arch_end_assignment(struct kvm
*kvm
)
8644 atomic_dec(&kvm
->arch
.assigned_device_count
);
8646 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment
);
8648 bool kvm_arch_has_assigned_device(struct kvm
*kvm
)
8650 return atomic_read(&kvm
->arch
.assigned_device_count
);
8652 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device
);
8654 void kvm_arch_register_noncoherent_dma(struct kvm
*kvm
)
8656 atomic_inc(&kvm
->arch
.noncoherent_dma_count
);
8658 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma
);
8660 void kvm_arch_unregister_noncoherent_dma(struct kvm
*kvm
)
8662 atomic_dec(&kvm
->arch
.noncoherent_dma_count
);
8664 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma
);
8666 bool kvm_arch_has_noncoherent_dma(struct kvm
*kvm
)
8668 return atomic_read(&kvm
->arch
.noncoherent_dma_count
);
8670 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma
);
8672 bool kvm_arch_has_irq_bypass(void)
8674 return kvm_x86_ops
->update_pi_irte
!= NULL
;
8677 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer
*cons
,
8678 struct irq_bypass_producer
*prod
)
8680 struct kvm_kernel_irqfd
*irqfd
=
8681 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8683 irqfd
->producer
= prod
;
8685 return kvm_x86_ops
->update_pi_irte(irqfd
->kvm
,
8686 prod
->irq
, irqfd
->gsi
, 1);
8689 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer
*cons
,
8690 struct irq_bypass_producer
*prod
)
8693 struct kvm_kernel_irqfd
*irqfd
=
8694 container_of(cons
, struct kvm_kernel_irqfd
, consumer
);
8696 WARN_ON(irqfd
->producer
!= prod
);
8697 irqfd
->producer
= NULL
;
8700 * When producer of consumer is unregistered, we change back to
8701 * remapped mode, so we can re-use the current implementation
8702 * when the irq is masked/disabled or the consumer side (KVM
8703 * int this case doesn't want to receive the interrupts.
8705 ret
= kvm_x86_ops
->update_pi_irte(irqfd
->kvm
, prod
->irq
, irqfd
->gsi
, 0);
8707 printk(KERN_INFO
"irq bypass consumer (token %p) unregistration"
8708 " fails: %d\n", irqfd
->consumer
.token
, ret
);
8711 int kvm_arch_update_irqfd_routing(struct kvm
*kvm
, unsigned int host_irq
,
8712 uint32_t guest_irq
, bool set
)
8714 if (!kvm_x86_ops
->update_pi_irte
)
8717 return kvm_x86_ops
->update_pi_irte(kvm
, host_irq
, guest_irq
, set
);
8720 bool kvm_vector_hashing_enabled(void)
8722 return vector_hashing
;
8724 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled
);
8726 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
8727 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio
);
8728 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
8729 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
8730 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
8731 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
8732 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
8733 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
8734 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
8735 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
8736 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
8737 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);
8738 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts
);
8739 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset
);
8740 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window
);
8741 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full
);
8742 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update
);
8743 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access
);
8744 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi
);