2 * Distributed under the Boost Software License, Version 1.0.
3 * (See accompanying file LICENSE_1_0.txt or copy at
4 * http://www.boost.org/LICENSE_1_0.txt)
6 * Copyright (c) 2009 Helge Bahmann
7 * Copyright (c) 2012 Tim Blechmann
8 * Copyright (c) 2014 Andrey Semashev
11 * \file atomic/detail/ops_gcc_x86.hpp
13 * This header contains implementation of the \c operations template.
16 #ifndef BOOST_ATOMIC_DETAIL_OPS_GCC_X86_HPP_INCLUDED_
17 #define BOOST_ATOMIC_DETAIL_OPS_GCC_X86_HPP_INCLUDED_
19 #include <boost/memory_order.hpp>
20 #include <boost/atomic/detail/config.hpp>
21 #include <boost/atomic/detail/storage_type.hpp>
22 #include <boost/atomic/detail/operations_fwd.hpp>
23 #include <boost/atomic/capabilities.hpp>
24 #if defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG8B) || defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG16B)
25 #include <boost/atomic/detail/ops_gcc_x86_dcas.hpp>
26 #include <boost/atomic/detail/ops_cas_based.hpp>
29 #ifdef BOOST_HAS_PRAGMA_ONCE
33 #if defined(__x86_64__)
34 #define BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "rdx"
36 #define BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "edx"
43 struct gcc_x86_operations_base
45 static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;
47 static BOOST_FORCEINLINE void fence_before(memory_order order) BOOST_NOEXCEPT
49 if ((order & memory_order_release) != 0)
50 __asm__ __volatile__ ("" ::: "memory");
53 static BOOST_FORCEINLINE void fence_after(memory_order order) BOOST_NOEXCEPT
55 if ((order & memory_order_acquire) != 0)
56 __asm__ __volatile__ ("" ::: "memory");
60 template< typename T, typename Derived >
61 struct gcc_x86_operations :
62 public gcc_x86_operations_base
64 typedef T storage_type;
66 static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
68 if (order != memory_order_seq_cst)
76 Derived::exchange(storage, v, order);
80 static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order order) BOOST_NOEXCEPT
82 storage_type v = storage;
87 static BOOST_FORCEINLINE storage_type fetch_sub(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
89 return Derived::fetch_add(storage, -v, order);
92 static BOOST_FORCEINLINE bool compare_exchange_weak(
93 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
95 return Derived::compare_exchange_strong(storage, expected, desired, success_order, failure_order);
98 static BOOST_FORCEINLINE bool test_and_set(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
100 return !!Derived::exchange(storage, (storage_type)1, order);
103 static BOOST_FORCEINLINE void clear(storage_type volatile& storage, memory_order order) BOOST_NOEXCEPT
105 store(storage, (storage_type)0, order);
108 static BOOST_FORCEINLINE bool is_lock_free(storage_type const volatile&) BOOST_NOEXCEPT
114 template< bool Signed >
115 struct operations< 1u, Signed > :
116 public gcc_x86_operations< typename make_storage_type< 1u, Signed >::type, operations< 1u, Signed > >
118 typedef gcc_x86_operations< typename make_storage_type< 1u, Signed >::type, operations< 1u, Signed > > base_type;
119 typedef typename base_type::storage_type storage_type;
120 typedef typename make_storage_type< 1u, Signed >::aligned aligned_storage_type;
122 static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
127 : "+q" (v), "+m" (storage)
129 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
134 static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
139 : "+q" (v), "+m" (storage)
146 static BOOST_FORCEINLINE bool compare_exchange_strong(
147 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order, memory_order) BOOST_NOEXCEPT
149 storage_type previous = expected;
153 "lock; cmpxchgb %3, %1\n\t"
155 : "+a" (previous), "+m" (storage), "=q" (success)
157 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
163 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
164 __asm__ __volatile__\
166 "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
168 "1: movb %[arg], %%dl\n\t"\
169 op " %%al, %%dl\n\t"\
170 "lock; cmpxchgb %%dl, %[storage]\n\t"\
172 : [res] "+a" (result), [storage] "+m" (storage)\
173 : [arg] "q" (argument)\
174 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
177 static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
179 storage_type res = storage;
180 BOOST_ATOMIC_DETAIL_CAS_LOOP("andb", v, res);
184 static BOOST_FORCEINLINE storage_type fetch_or(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
186 storage_type res = storage;
187 BOOST_ATOMIC_DETAIL_CAS_LOOP("orb", v, res);
191 static BOOST_FORCEINLINE storage_type fetch_xor(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
193 storage_type res = storage;
194 BOOST_ATOMIC_DETAIL_CAS_LOOP("xorb", v, res);
198 #undef BOOST_ATOMIC_DETAIL_CAS_LOOP
201 template< bool Signed >
202 struct operations< 2u, Signed > :
203 public gcc_x86_operations< typename make_storage_type< 2u, Signed >::type, operations< 2u, Signed > >
205 typedef gcc_x86_operations< typename make_storage_type< 2u, Signed >::type, operations< 2u, Signed > > base_type;
206 typedef typename base_type::storage_type storage_type;
207 typedef typename make_storage_type< 2u, Signed >::aligned aligned_storage_type;
209 static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
214 : "+q" (v), "+m" (storage)
216 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
221 static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
226 : "+q" (v), "+m" (storage)
233 static BOOST_FORCEINLINE bool compare_exchange_strong(
234 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order, memory_order) BOOST_NOEXCEPT
236 storage_type previous = expected;
240 "lock; cmpxchgw %3, %1\n\t"
242 : "+a" (previous), "+m" (storage), "=q" (success)
244 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
250 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
251 __asm__ __volatile__\
253 "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
255 "1: movw %[arg], %%dx\n\t"\
256 op " %%ax, %%dx\n\t"\
257 "lock; cmpxchgw %%dx, %[storage]\n\t"\
259 : [res] "+a" (result), [storage] "+m" (storage)\
260 : [arg] "q" (argument)\
261 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
264 static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
266 storage_type res = storage;
267 BOOST_ATOMIC_DETAIL_CAS_LOOP("andw", v, res);
271 static BOOST_FORCEINLINE storage_type fetch_or(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
273 storage_type res = storage;
274 BOOST_ATOMIC_DETAIL_CAS_LOOP("orw", v, res);
278 static BOOST_FORCEINLINE storage_type fetch_xor(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
280 storage_type res = storage;
281 BOOST_ATOMIC_DETAIL_CAS_LOOP("xorw", v, res);
285 #undef BOOST_ATOMIC_DETAIL_CAS_LOOP
288 template< bool Signed >
289 struct operations< 4u, Signed > :
290 public gcc_x86_operations< typename make_storage_type< 4u, Signed >::type, operations< 4u, Signed > >
292 typedef gcc_x86_operations< typename make_storage_type< 4u, Signed >::type, operations< 4u, Signed > > base_type;
293 typedef typename base_type::storage_type storage_type;
294 typedef typename make_storage_type< 4u, Signed >::aligned aligned_storage_type;
296 static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
301 : "+r" (v), "+m" (storage)
303 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
308 static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
313 : "+r" (v), "+m" (storage)
320 static BOOST_FORCEINLINE bool compare_exchange_strong(
321 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order, memory_order) BOOST_NOEXCEPT
323 storage_type previous = expected;
327 "lock; cmpxchgl %3, %1\n\t"
329 : "+a" (previous), "+m" (storage), "=q" (success)
331 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
337 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
338 __asm__ __volatile__\
340 "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
342 "1: movl %[arg], %%edx\n\t"\
343 op " %%eax, %%edx\n\t"\
344 "lock; cmpxchgl %%edx, %[storage]\n\t"\
346 : [res] "+a" (result), [storage] "+m" (storage)\
347 : [arg] "r" (argument)\
348 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
351 static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
353 storage_type res = storage;
354 BOOST_ATOMIC_DETAIL_CAS_LOOP("andl", v, res);
358 static BOOST_FORCEINLINE storage_type fetch_or(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
360 storage_type res = storage;
361 BOOST_ATOMIC_DETAIL_CAS_LOOP("orl", v, res);
365 static BOOST_FORCEINLINE storage_type fetch_xor(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
367 storage_type res = storage;
368 BOOST_ATOMIC_DETAIL_CAS_LOOP("xorl", v, res);
372 #undef BOOST_ATOMIC_DETAIL_CAS_LOOP
375 #if defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG8B)
377 template< bool Signed >
378 struct operations< 8u, Signed > :
379 public cas_based_operations< gcc_dcas_x86< Signed > >
383 #elif defined(__x86_64__)
385 template< bool Signed >
386 struct operations< 8u, Signed > :
387 public gcc_x86_operations< typename make_storage_type< 8u, Signed >::type, operations< 8u, Signed > >
389 typedef gcc_x86_operations< typename make_storage_type< 8u, Signed >::type, operations< 8u, Signed > > base_type;
390 typedef typename base_type::storage_type storage_type;
391 typedef typename make_storage_type< 8u, Signed >::aligned aligned_storage_type;
393 static BOOST_FORCEINLINE storage_type fetch_add(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
398 : "+r" (v), "+m" (storage)
400 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
405 static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
410 : "+r" (v), "+m" (storage)
417 static BOOST_FORCEINLINE bool compare_exchange_strong(
418 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order, memory_order) BOOST_NOEXCEPT
420 storage_type previous = expected;
424 "lock; cmpxchgq %3, %1\n\t"
426 : "+a" (previous), "+m" (storage), "=q" (success)
428 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA "memory"
434 #define BOOST_ATOMIC_DETAIL_CAS_LOOP(op, argument, result)\
435 __asm__ __volatile__\
437 "xor %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER ", %%" BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER "\n\t"\
439 "1: movq %[arg], %%rdx\n\t"\
440 op " %%rax, %%rdx\n\t"\
441 "lock; cmpxchgq %%rdx, %[storage]\n\t"\
443 : [res] "+a" (result), [storage] "+m" (storage)\
444 : [arg] "r" (argument)\
445 : BOOST_ATOMIC_DETAIL_ASM_CLOBBER_CC_COMMA BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER, "memory"\
448 static BOOST_FORCEINLINE storage_type fetch_and(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
450 storage_type res = storage;
451 BOOST_ATOMIC_DETAIL_CAS_LOOP("andq", v, res);
455 static BOOST_FORCEINLINE storage_type fetch_or(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
457 storage_type res = storage;
458 BOOST_ATOMIC_DETAIL_CAS_LOOP("orq", v, res);
462 static BOOST_FORCEINLINE storage_type fetch_xor(storage_type volatile& storage, storage_type v, memory_order) BOOST_NOEXCEPT
464 storage_type res = storage;
465 BOOST_ATOMIC_DETAIL_CAS_LOOP("xorq", v, res);
469 #undef BOOST_ATOMIC_DETAIL_CAS_LOOP
474 #if defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG16B)
476 template< bool Signed >
477 struct operations< 16u, Signed > :
478 public cas_based_operations< gcc_dcas_x86_64< Signed > >
482 #endif // defined(BOOST_ATOMIC_DETAIL_X86_HAS_CMPXCHG16B)
484 BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
486 if (order == memory_order_seq_cst)
490 #if defined(BOOST_ATOMIC_DETAIL_X86_HAS_MFENCE)
493 "lock; addl $0, (%%esp)\n"
498 else if ((order & (memory_order_acquire | memory_order_release)) != 0)
500 __asm__ __volatile__ ("" ::: "memory");
504 BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
506 if (order != memory_order_relaxed)
507 __asm__ __volatile__ ("" ::: "memory");
510 } // namespace detail
511 } // namespace atomics
514 #undef BOOST_ATOMIC_DETAIL_TEMP_CAS_REGISTER
516 #endif // BOOST_ATOMIC_DETAIL_OPS_GCC_X86_HPP_INCLUDED_