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28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
30 %ifidn __OUTPUT_FORMAT__, elf64
31 %define WRT_OPT wrt ..plt
36 %include "reg_sizes.asm"
37 %include "multibinary.asm"
41 ; declare the L3 ctx level symbols (these will then call the appropriate
43 extern md5_ctx_mgr_init_sse
44 extern md5_ctx_mgr_submit_sse
45 extern md5_ctx_mgr_flush_sse
47 extern md5_ctx_mgr_init_avx
48 extern md5_ctx_mgr_submit_avx
49 extern md5_ctx_mgr_flush_avx
51 extern md5_ctx_mgr_init_avx2
52 extern md5_ctx_mgr_submit_avx2
53 extern md5_ctx_mgr_flush_avx2
55 %ifdef HAVE_AS_KNOWS_AVX512
56 extern md5_ctx_mgr_init_avx512
57 extern md5_ctx_mgr_submit_avx512
58 extern md5_ctx_mgr_flush_avx512
61 ;;; *_mbinit are initial values for *_dispatched; is updated on first call.
62 ;;; Therefore, *_dispatch_init is only executed on first call.
65 mbin_interface md5_ctx_mgr_init
66 mbin_interface md5_ctx_mgr_submit
67 mbin_interface md5_ctx_mgr_flush
69 %ifdef HAVE_AS_KNOWS_AVX512
70 ; Reuse mbin_dispatch_init6 through replacing base by sse version
71 mbin_dispatch_init6 md5_ctx_mgr_init, md5_ctx_mgr_init_sse, md5_ctx_mgr_init_sse, md5_ctx_mgr_init_avx, md5_ctx_mgr_init_avx2, md5_ctx_mgr_init_avx512
72 mbin_dispatch_init6 md5_ctx_mgr_submit, md5_ctx_mgr_submit_sse, md5_ctx_mgr_submit_sse, md5_ctx_mgr_submit_avx, md5_ctx_mgr_submit_avx2, md5_ctx_mgr_submit_avx512
73 mbin_dispatch_init6 md5_ctx_mgr_flush, md5_ctx_mgr_flush_sse, md5_ctx_mgr_flush_sse, md5_ctx_mgr_flush_avx, md5_ctx_mgr_flush_avx2, md5_ctx_mgr_flush_avx512
75 mbin_dispatch_init md5_ctx_mgr_init, md5_ctx_mgr_init_sse, md5_ctx_mgr_init_avx, md5_ctx_mgr_init_avx2
76 mbin_dispatch_init md5_ctx_mgr_submit, md5_ctx_mgr_submit_sse, md5_ctx_mgr_submit_avx, md5_ctx_mgr_submit_avx2
77 mbin_dispatch_init md5_ctx_mgr_flush, md5_ctx_mgr_flush_sse, md5_ctx_mgr_flush_avx, md5_ctx_mgr_flush_avx2
80 ;; func core, ver, snum
81 slversion md5_ctx_mgr_init, 00, 03, 0189
82 slversion md5_ctx_mgr_submit, 00, 03, 018a
83 slversion md5_ctx_mgr_flush, 00, 03, 018b