ceph/src/crypto/isa-l/isa-l_crypto/mh_sha1_murmur3_x64_128/mh_sha1_murmur3_x64_128_multibinary.asm

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  29
  30 %ifidn __OUTPUT_FORMAT__, elf64
  31 %define WRT_OPT         wrt ..plt
  32 %else
  33 %define WRT_OPT
  34 %endif
  35
  36 %include "reg_sizes.asm"
  37 %include "multibinary.asm"
  38
  39 %ifidn __OUTPUT_FORMAT__, elf32
  40  [bits 32]
  41 %else
  42  default rel
  43  [bits 64]
  44
  45  extern mh_sha1_murmur3_x64_128_update_sse
  46  extern mh_sha1_murmur3_x64_128_update_avx
  47  extern mh_sha1_murmur3_x64_128_update_avx2
  48  extern mh_sha1_murmur3_x64_128_finalize_sse
  49  extern mh_sha1_murmur3_x64_128_finalize_avx
  50  extern mh_sha1_murmur3_x64_128_finalize_avx2
  51
  52  %ifdef HAVE_AS_KNOWS_AVX512
  53   extern mh_sha1_murmur3_x64_128_update_avx512
  54   extern mh_sha1_murmur3_x64_128_finalize_avx512
  55  %endif
  56
  57 %endif
  58
  59 extern mh_sha1_murmur3_x64_128_update_base
  60 extern mh_sha1_murmur3_x64_128_finalize_base
  61
  62 mbin_interface mh_sha1_murmur3_x64_128_update
  63 mbin_interface mh_sha1_murmur3_x64_128_finalize
  64
  65 %ifidn __OUTPUT_FORMAT__, elf64
  66
  67  %ifdef HAVE_AS_KNOWS_AVX512
  68   mbin_dispatch_init6 mh_sha1_murmur3_x64_128_update, mh_sha1_murmur3_x64_128_update_base, mh_sha1_murmur3_x64_128_update_sse, mh_sha1_murmur3_x64_128_update_avx, mh_sha1_murmur3_x64_128_update_avx2, mh_sha1_murmur3_x64_128_update_avx512
  69   mbin_dispatch_init6 mh_sha1_murmur3_x64_128_finalize, mh_sha1_murmur3_x64_128_finalize_base, mh_sha1_murmur3_x64_128_finalize_sse, mh_sha1_murmur3_x64_128_finalize_avx, mh_sha1_murmur3_x64_128_finalize_avx2, mh_sha1_murmur3_x64_128_finalize_avx512
  70  %else
  71   mbin_dispatch_init5 mh_sha1_murmur3_x64_128_update, mh_sha1_murmur3_x64_128_update_base, mh_sha1_murmur3_x64_128_update_sse, mh_sha1_murmur3_x64_128_update_avx, mh_sha1_murmur3_x64_128_update_avx2
  72   mbin_dispatch_init5 mh_sha1_murmur3_x64_128_finalize, mh_sha1_murmur3_x64_128_finalize_base, mh_sha1_murmur3_x64_128_finalize_sse, mh_sha1_murmur3_x64_128_finalize_avx, mh_sha1_murmur3_x64_128_finalize_avx2
  73  %endif
  74
  75 %else
  76  mbin_dispatch_init2 mh_sha1_murmur3_x64_128_update, mh_sha1_murmur3_x64_128_update_base
  77  mbin_dispatch_init2 mh_sha1_murmur3_x64_128_finalize, mh_sha1_murmur3_x64_128_finalize_base
  78 %endif
  79
  80 ;;;       func                                          core, ver, snum
  81 slversion mh_sha1_murmur3_x64_128_update,               00, 02, 0252
  82 slversion mh_sha1_murmur3_x64_128_finalize,             00, 02, 0253