1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2 ; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
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28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
30 %include "sha1_job.asm"
31 %include "sha1_mb_mgr_datastruct.asm"
33 %include "reg_sizes.asm"
37 %ifidn __OUTPUT_FORMAT__, win64
38 ; WINDOWS register definitions
42 ; idx needs to be in a register not clobberred by sha1_mult
46 %define size_offset rdi
50 ; LINUX register definitions
54 ; idx needs to be in a register not clobberred by sha1_mult
58 %define size_offset rcx
70 %define start_offset r11
72 %define unused_lanes rbx
81 %define extra_blocks r8
90 ; STACK_SPACE needs to be an odd multiple of 8
91 %define STACK_SPACE 8*4 + 16*10 + 8
93 ; SHA1_JOB* sha1_mb_mgr_submit_avx(SHA1_MB_JOB_MGR *state, SHA1_JOB *job)
96 global sha1_mb_mgr_submit_avx:function
97 sha1_mb_mgr_submit_avx:
102 %ifidn __OUTPUT_FORMAT__, win64
105 vmovdqa [rsp + 8*4 + 16*0], xmm6
106 vmovdqa [rsp + 8*4 + 16*1], xmm7
107 vmovdqa [rsp + 8*4 + 16*2], xmm8
108 vmovdqa [rsp + 8*4 + 16*3], xmm9
109 vmovdqa [rsp + 8*4 + 16*4], xmm10
110 vmovdqa [rsp + 8*4 + 16*5], xmm11
111 vmovdqa [rsp + 8*4 + 16*6], xmm12
112 vmovdqa [rsp + 8*4 + 16*7], xmm13
113 vmovdqa [rsp + 8*4 + 16*8], xmm14
114 vmovdqa [rsp + 8*4 + 16*9], xmm15
117 mov unused_lanes, [state + _unused_lanes]
118 movzx lane, BYTE(unused_lanes)
121 imul lane_data, lane, _LANE_DATA_size
122 mov dword [job + _status], STS_BEING_PROCESSED
123 lea lane_data, [state + _ldata + lane_data]
124 mov [state + _unused_lanes], unused_lanes
125 mov DWORD(len), [job + _len]
130 mov [lane_data + _job_in_lane], job
131 mov [state + _lens + 4*lane], DWORD(len)
133 ; Load digest words from result_digest
134 vmovdqu xmm0, [job + _result_digest + 0*16]
135 mov DWORD(tmp), [job + _result_digest + 1*16]
136 vmovd [state + _args_digest + 4*lane + 0*16], xmm0
137 vpextrd [state + _args_digest + 4*lane + 1*16], xmm0, 1
138 vpextrd [state + _args_digest + 4*lane + 2*16], xmm0, 2
139 vpextrd [state + _args_digest + 4*lane + 3*16], xmm0, 3
140 mov [state + _args_digest + 4*lane + 4*16], DWORD(tmp)
142 mov p, [job + _buffer]
143 mov [state + _args_data_ptr + 8*lane], p
145 cmp unused_lanes, 0xF
150 mov DWORD(lens0), [state + _lens + 0*4]
152 mov DWORD(lens1), [state + _lens + 1*4]
155 mov DWORD(lens2), [state + _lens + 2*4]
158 mov DWORD(lens3), [state + _lens + 3*4]
171 mov [state + _lens + 0*4], DWORD(lens0)
172 mov [state + _lens + 1*4], DWORD(lens1)
173 mov [state + _lens + 2*4], DWORD(lens2)
174 mov [state + _lens + 3*4], DWORD(lens3)
176 ; "state" and "args" are the same address, arg1
179 ; state and idx are intact
182 ; process completed job "idx"
183 imul lane_data, idx, _LANE_DATA_size
184 lea lane_data, [state + _ldata + lane_data]
186 mov job_rax, [lane_data + _job_in_lane]
187 mov unused_lanes, [state + _unused_lanes]
188 mov qword [lane_data + _job_in_lane], 0
189 mov dword [job_rax + _status], STS_COMPLETED
192 mov [state + _unused_lanes], unused_lanes
194 vmovd xmm0, [state + _args_digest + 4*idx + 0*16]
195 vpinsrd xmm0, [state + _args_digest + 4*idx + 1*16], 1
196 vpinsrd xmm0, [state + _args_digest + 4*idx + 2*16], 2
197 vpinsrd xmm0, [state + _args_digest + 4*idx + 3*16], 3
198 mov DWORD(tmp), [state + _args_digest + 4*idx + 4*16]
200 vmovdqa [job_rax + _result_digest + 0*16], xmm0
201 mov [job_rax + _result_digest + 1*16], DWORD(tmp)
205 %ifidn __OUTPUT_FORMAT__, win64
206 vmovdqa xmm6, [rsp + 8*4 + 16*0]
207 vmovdqa xmm7, [rsp + 8*4 + 16*1]
208 vmovdqa xmm8, [rsp + 8*4 + 16*2]
209 vmovdqa xmm9, [rsp + 8*4 + 16*3]
210 vmovdqa xmm10, [rsp + 8*4 + 16*4]
211 vmovdqa xmm11, [rsp + 8*4 + 16*5]
212 vmovdqa xmm12, [rsp + 8*4 + 16*6]
213 vmovdqa xmm13, [rsp + 8*4 + 16*7]
214 vmovdqa xmm14, [rsp + 8*4 + 16*8]
215 vmovdqa xmm15, [rsp + 8*4 + 16*9]
230 section .data align=16