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add subtree-ish sources for 12.0.3
[ceph.git] / ceph / src / crypto / isa-l / isa-l_crypto / sha256_mb / sha256_mb_mgr_submit_avx2.asm
1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2 ; Copyright(c) 2011-2016 Intel Corporation All rights reserved.
3 ;
4 ; Redistribution and use in source and binary forms, with or without
5 ; modification, are permitted provided that the following conditions
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11 ; the documentation and/or other materials provided with the
12 ; distribution.
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17 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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23 ; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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27 ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
29
30 %include "sha256_job.asm"
31 %include "memcpy.asm"
32 %include "sha256_mb_mgr_datastruct.asm"
33
34 %include "reg_sizes.asm"
35
36 extern sha256_mb_x8_avx2
37 default rel
38
39 %ifidn __OUTPUT_FORMAT__, elf64
40 ; Linux register definitions
41 %define arg1 rdi ; rcx
42 %define arg2 rsi ; rdx
43
44 %define size_offset rcx ; rdi
45 %define tmp2 rcx ; rdi
46
47 %else
48 ; WINDOWS register definitions
49 %define arg1 rcx
50 %define arg2 rdx
51
52 %define size_offset rdi
53 %define tmp2 rdi
54
55 %endif
56
57 ; Common definitions
58 %define state arg1
59 %define job arg2
60 %define len2 arg2
61 %define p2 arg2
62
63 %define idx r8
64 %define last_len r8
65 %define p r11
66 %define start_offset r11
67
68 %define unused_lanes rbx
69
70 %define job_rax rax
71 %define len rax
72
73 %define lane rbp
74 %define tmp3 rbp
75
76 %define tmp r9
77
78 %define lane_data r10
79
80
81 ; STACK_SPACE needs to be an odd multiple of 8
82 %define STACK_SPACE 8*8 + 16*10 + 8
83
84 ; SHA256_JOB* sha256_mb_mgr_submit_avx2(SHA256_MB_JOB_MGR *state, SHA256_JOB *job)
85 ; arg 1 : rcx : state
86 ; arg 2 : rdx : job
87 global sha256_mb_mgr_submit_avx2:function
88 sha256_mb_mgr_submit_avx2:
89
90 sub rsp, STACK_SPACE
91 mov [rsp + 8*0], rbx
92 mov [rsp + 8*3], rbp
93 mov [rsp + 8*4], r12
94 mov [rsp + 8*5], r13
95 mov [rsp + 8*6], r14
96 mov [rsp + 8*7], r15
97 %ifidn __OUTPUT_FORMAT__, win64
98 mov [rsp + 8*1], rsi
99 mov [rsp + 8*2], rdi
100 vmovdqa [rsp + 8*8 + 16*0], xmm6
101 vmovdqa [rsp + 8*8 + 16*1], xmm7
102 vmovdqa [rsp + 8*8 + 16*2], xmm8
103 vmovdqa [rsp + 8*8 + 16*3], xmm9
104 vmovdqa [rsp + 8*8 + 16*4], xmm10
105 vmovdqa [rsp + 8*8 + 16*5], xmm11
106 vmovdqa [rsp + 8*8 + 16*6], xmm12
107 vmovdqa [rsp + 8*8 + 16*7], xmm13
108 vmovdqa [rsp + 8*8 + 16*8], xmm14
109 vmovdqa [rsp + 8*8 + 16*9], xmm15
110 %endif
111 mov unused_lanes, [state + _unused_lanes]
112 mov lane, unused_lanes
113 and lane, 0xF
114 shr unused_lanes, 4
115 imul lane_data, lane, _LANE_DATA_size
116 mov dword [job + _status], STS_BEING_PROCESSED
117 lea lane_data, [state + _ldata + lane_data]
118 mov [state + _unused_lanes], unused_lanes
119 mov DWORD(len), [job + _len]
120
121 shl len, 4
122 or len, lane
123 mov [state + _lens + 4*lane], DWORD(len)
124
125 mov [lane_data + _job_in_lane], job
126
127 ; Load digest words from result_digest
128 vmovdqu xmm0, [job + _result_digest + 0*16]
129 vmovdqu xmm1, [job + _result_digest + 1*16]
130 vmovd [state + _args_digest + 4*lane + 0*4*8], xmm0
131 vpextrd [state + _args_digest + 4*lane + 1*4*8], xmm0, 1
132 vpextrd [state + _args_digest + 4*lane + 2*4*8], xmm0, 2
133 vpextrd [state + _args_digest + 4*lane + 3*4*8], xmm0, 3
134 vmovd [state + _args_digest + 4*lane + 4*4*8], xmm1
135 vpextrd [state + _args_digest + 4*lane + 5*4*8], xmm1, 1
136 vpextrd [state + _args_digest + 4*lane + 6*4*8], xmm1, 2
137 vpextrd [state + _args_digest + 4*lane + 7*4*8], xmm1, 3
138
139
140 mov p, [job + _buffer]
141 mov [state + _args_data_ptr + 8*lane], p
142
143 cmp unused_lanes, 0xf
144 jne return_null
145
146 start_loop:
147 ; Find min length
148 vmovdqa xmm0, [state + _lens + 0*16]
149 vmovdqa xmm1, [state + _lens + 1*16]
150
151 vpminud xmm2, xmm0, xmm1 ; xmm2 has {D,C,B,A}
152 vpalignr xmm3, xmm3, xmm2, 8 ; xmm3 has {x,x,D,C}
153 vpminud xmm2, xmm2, xmm3 ; xmm2 has {x,x,E,F}
154 vpalignr xmm3, xmm3, xmm2, 4 ; xmm3 has {x,x,x,E}
155 vpminud xmm2, xmm2, xmm3 ; xmm2 has min value in low dword
156
157 vmovd DWORD(idx), xmm2
158 mov len2, idx
159 and idx, 0xF
160 shr len2, 4
161 jz len_is_0
162
163 vpand xmm2, xmm2, [rel clear_low_nibble]
164 vpshufd xmm2, xmm2, 0
165
166 vpsubd xmm0, xmm0, xmm2
167 vpsubd xmm1, xmm1, xmm2
168
169 vmovdqa [state + _lens + 0*16], xmm0
170 vmovdqa [state + _lens + 1*16], xmm1
171
172
173 ; "state" and "args" are the same address, arg1
174 ; len is arg2
175 call sha256_mb_x8_avx2
176
177 ; state and idx are intact
178
179 len_is_0:
180 ; process completed job "idx"
181 imul lane_data, idx, _LANE_DATA_size
182 lea lane_data, [state + _ldata + lane_data]
183
184 mov job_rax, [lane_data + _job_in_lane]
185 mov unused_lanes, [state + _unused_lanes]
186 mov qword [lane_data + _job_in_lane], 0
187 mov dword [job_rax + _status], STS_COMPLETED
188 shl unused_lanes, 4
189 or unused_lanes, idx
190 mov [state + _unused_lanes], unused_lanes
191
192 vmovd xmm0, [state + _args_digest + 4*idx + 0*4*8]
193 vpinsrd xmm0, [state + _args_digest + 4*idx + 1*4*8], 1
194 vpinsrd xmm0, [state + _args_digest + 4*idx + 2*4*8], 2
195 vpinsrd xmm0, [state + _args_digest + 4*idx + 3*4*8], 3
196 vmovd xmm1, [state + _args_digest + 4*idx + 4*4*8]
197 vpinsrd xmm1, [state + _args_digest + 4*idx + 5*4*8], 1
198 vpinsrd xmm1, [state + _args_digest + 4*idx + 6*4*8], 2
199 vpinsrd xmm1, [state + _args_digest + 4*idx + 7*4*8], 3
200
201 vmovdqa [job_rax + _result_digest + 0*16], xmm0
202 vmovdqa [job_rax + _result_digest + 1*16], xmm1
203
204 return:
205
206 %ifidn __OUTPUT_FORMAT__, win64
207 vmovdqa xmm6, [rsp + 8*8 + 16*0]
208 vmovdqa xmm7, [rsp + 8*8 + 16*1]
209 vmovdqa xmm8, [rsp + 8*8 + 16*2]
210 vmovdqa xmm9, [rsp + 8*8 + 16*3]
211 vmovdqa xmm10, [rsp + 8*8 + 16*4]
212 vmovdqa xmm11, [rsp + 8*8 + 16*5]
213 vmovdqa xmm12, [rsp + 8*8 + 16*6]
214 vmovdqa xmm13, [rsp + 8*8 + 16*7]
215 vmovdqa xmm14, [rsp + 8*8 + 16*8]
216 vmovdqa xmm15, [rsp + 8*8 + 16*9]
217 mov rsi, [rsp + 8*1]
218 mov rdi, [rsp + 8*2]
219 %endif
220 mov rbx, [rsp + 8*0]
221 mov rbp, [rsp + 8*3]
222 mov r12, [rsp + 8*4]
223 mov r13, [rsp + 8*5]
224 mov r14, [rsp + 8*6]
225 mov r15, [rsp + 8*7]
226 add rsp, STACK_SPACE
227
228 ret
229
230 return_null:
231 xor job_rax, job_rax
232 jmp return
233
234 section .data align=16
235
236 align 16
237 clear_low_nibble:
238 dq 0x00000000FFFFFFF0, 0x0000000000000000
239