1 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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28 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
30 %include "sha512_job.asm"
31 %include "sha512_mb_mgr_datastruct.asm"
33 %include "reg_sizes.asm"
35 extern sha512_mb_x2_sse
37 %ifidn __OUTPUT_FORMAT__, elf64
38 ; Linux register definitions
39 %define arg1 rdi ; rcx
40 %define arg2 rsi ; rdx
42 ; idx needs to be other than arg1, arg2, rbx, r12
44 %define last_len rdx ; rsi
46 %define size_offset rcx ; rdi
47 %define tmp2 rcx ; rdi
50 ; WINDOWS register definitions
54 ; idx needs to be other than arg1, arg2, rbx, r12
58 %define size_offset rdi
70 %define start_offset r11
72 %define unused_lanes rbx
81 %define extra_blocks r8
96 ; STACK_SPACE needs to be an odd multiple of 8
97 %define _XMM_SAVE stack_frame.gpr
98 %define _GPR_SAVE stack_frame.rsp
99 %define STACK_SPACE stack_frame_size
101 ; SHA512_JOB* sha512_mb_mgr_submit_sse(SHA512_MB_JOB_MGR *state, SHA256_JOB *job)
102 ; arg 1 : rcx : state
104 mk_global sha512_mb_mgr_submit_sse, function
105 sha512_mb_mgr_submit_sse:
113 mov [rsp + stack_frame.rsp], rax
115 mov [rsp + _XMM_SAVE + 8*0], rbx
116 mov [rsp + _XMM_SAVE + 8*1], rbp
117 mov [rsp + _XMM_SAVE + 8*2], r12
118 %ifidn __OUTPUT_FORMAT__, win64
119 mov [rsp + _XMM_SAVE + 8*3], rsi
120 mov [rsp + _XMM_SAVE + 8*4], rdi
121 movdqa [rsp + 16*0], xmm6
122 movdqa [rsp + 16*1], xmm7
123 movdqa [rsp + 16*2], xmm8
124 movdqa [rsp + 16*3], xmm9
125 movdqa [rsp + 16*4], xmm10
126 movdqa [rsp + 16*5], xmm11
127 movdqa [rsp + 16*6], xmm12
128 movdqa [rsp + 16*7], xmm13
129 movdqa [rsp + 16*8], xmm14
130 movdqa [rsp + 16*9], xmm15
133 mov unused_lanes, [state + _unused_lanes]
134 movzx lane, BYTE(unused_lanes)
136 imul lane_data, lane, _LANE_DATA_size
137 mov dword [job + _status], STS_BEING_PROCESSED
138 lea lane_data, [state + _ldata + lane_data]
139 mov [state + _unused_lanes], unused_lanes
140 mov DWORD(len), [job + _len]
142 mov [lane_data + _job_in_lane], job
143 mov [state + _lens + 4 + 8*lane], DWORD(len)
145 ; Load digest words from result_digest
146 movdqa xmm0, [job + _result_digest + 0*16]
147 movdqa xmm1, [job + _result_digest + 1*16]
148 movdqa xmm2, [job + _result_digest + 2*16]
149 movdqa xmm3, [job + _result_digest + 3*16]
150 movq [state + _args_digest + 8*lane + 0*32], xmm0
151 pextrq [state + _args_digest + 8*lane + 1*32], xmm0, 1
152 movq [state + _args_digest + 8*lane + 2*32], xmm1
153 pextrq [state + _args_digest + 8*lane + 3*32], xmm1, 1
154 movq [state + _args_digest + 8*lane + 4*32], xmm2
155 pextrq [state + _args_digest + 8*lane + 5*32], xmm2, 1
156 movq [state + _args_digest + 8*lane + 6*32], xmm3
157 pextrq [state + _args_digest + 8*lane + 7*32], xmm3, 1
159 mov p, [job + _buffer]
160 mov [state + _args_data_ptr + 8*lane], p
162 add dword [state + _num_lanes_inuse], 1
163 cmp unused_lanes, 0xff
169 mov lens0, [state + _lens + 0*8]
171 mov lens1, [state + _lens + 1*8]
183 mov [state + _lens + 0*8], lens0
184 mov [state + _lens + 1*8], lens1
186 ; "state" and "args" are the same address, arg1
188 call sha512_mb_x2_sse
189 ; state and idx are intact
193 ; process completed job "idx"
194 imul lane_data, idx, _LANE_DATA_size
195 lea lane_data, [state + _ldata + lane_data]
197 mov job_rax, [lane_data + _job_in_lane]
199 mov unused_lanes, [state + _unused_lanes]
200 mov qword [lane_data + _job_in_lane], 0
201 mov dword [job_rax + _status], STS_COMPLETED
204 mov [state + _unused_lanes], unused_lanes
206 sub dword [state + _num_lanes_inuse], 1
208 movq xmm0, [state + _args_digest + 8*idx + 0*32]
209 pinsrq xmm0, [state + _args_digest + 8*idx + 1*32], 1
210 movq xmm1, [state + _args_digest + 8*idx + 2*32]
211 pinsrq xmm1, [state + _args_digest + 8*idx + 3*32], 1
212 movq xmm2, [state + _args_digest + 8*idx + 4*32]
213 pinsrq xmm2, [state + _args_digest + 8*idx + 5*32], 1
214 movq xmm3, [state + _args_digest + 8*idx + 6*32]
215 pinsrq xmm3, [state + _args_digest + 8*idx + 7*32], 1
217 movdqa [job_rax + _result_digest + 0*16], xmm0
218 movdqa [job_rax + _result_digest + 1*16], xmm1
219 movdqa [job_rax + _result_digest + 2*16], xmm2
220 movdqa [job_rax + _result_digest + 3*16], xmm3
224 %ifidn __OUTPUT_FORMAT__, win64
225 movdqa xmm6, [rsp + 16*0]
226 movdqa xmm7, [rsp + 16*1]
227 movdqa xmm8, [rsp + 16*2]
228 movdqa xmm9, [rsp + 16*3]
229 movdqa xmm10, [rsp + 16*4]
230 movdqa xmm11, [rsp + 16*5]
231 movdqa xmm12, [rsp + 16*6]
232 movdqa xmm13, [rsp + 16*7]
233 movdqa xmm14, [rsp + 16*8]
234 movdqa xmm15, [rsp + 16*9]
235 mov rsi, [rsp + _XMM_SAVE + 8*3]
236 mov rdi, [rsp + _XMM_SAVE + 8*4]
238 mov rbx, [rsp + _XMM_SAVE + 8*0]
239 mov rbp, [rsp + _XMM_SAVE + 8*1]
240 mov r12, [rsp + _XMM_SAVE + 8*2]
241 mov rsp, [rsp + stack_frame.rsp]
249 section .data align=16