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add subtree-ish sources for 12.0.3
[ceph.git] / ceph / src / dpdk / drivers / net / cxgbe / cxgbe_compat.h
1 /*-
2 * BSD LICENSE
3 *
4 * Copyright(c) 2014-2015 Chelsio Communications.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of Chelsio Communications nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef _CXGBE_COMPAT_H_
35 #define _CXGBE_COMPAT_H_
36
37 #include <string.h>
38 #include <stdint.h>
39 #include <stdio.h>
40 #include <stdarg.h>
41
42 #include <rte_common.h>
43 #include <rte_memcpy.h>
44 #include <rte_byteorder.h>
45 #include <rte_cycles.h>
46 #include <rte_spinlock.h>
47 #include <rte_log.h>
48
49 #define dev_printf(level, fmt, args...) \
50 RTE_LOG(level, PMD, "rte_cxgbe_pmd: " fmt, ## args)
51
52 #define dev_err(x, args...) dev_printf(ERR, args)
53 #define dev_info(x, args...) dev_printf(INFO, args)
54 #define dev_warn(x, args...) dev_printf(WARNING, args)
55
56 #ifdef RTE_LIBRTE_CXGBE_DEBUG
57 #define dev_debug(x, args...) dev_printf(DEBUG, args)
58 #else
59 #define dev_debug(x, args...) do { } while (0)
60 #endif
61
62 #ifdef RTE_LIBRTE_CXGBE_DEBUG_REG
63 #define CXGBE_DEBUG_REG(x, args...) dev_printf(DEBUG, "REG:" args)
64 #else
65 #define CXGBE_DEBUG_REG(x, args...) do { } while (0)
66 #endif
67
68 #ifdef RTE_LIBRTE_CXGBE_DEBUG_MBOX
69 #define CXGBE_DEBUG_MBOX(x, args...) dev_printf(DEBUG, "MBOX:" args)
70 #else
71 #define CXGBE_DEBUG_MBOX(x, args...) do { } while (0)
72 #endif
73
74 #ifdef RTE_LIBRTE_CXGBE_DEBUG_TX
75 #define CXGBE_DEBUG_TX(x, args...) dev_printf(DEBUG, "TX:" args)
76 #else
77 #define CXGBE_DEBUG_TX(x, args...) do { } while (0)
78 #endif
79
80 #ifdef RTE_LIBRTE_CXGBE_DEBUG_RX
81 #define CXGBE_DEBUG_RX(x, args...) dev_printf(DEBUG, "RX:" args)
82 #else
83 #define CXGBE_DEBUG_RX(x, args...) do { } while (0)
84 #endif
85
86 #ifdef RTE_LIBRTE_CXGBE_DEBUG
87 #define CXGBE_FUNC_TRACE() \
88 RTE_LOG(DEBUG, PMD, "CXGBE trace: %s\n", __func__)
89 #else
90 #define CXGBE_FUNC_TRACE() do { } while (0)
91 #endif
92
93 #define pr_err(y, args...) dev_err(0, y, ##args)
94 #define pr_warn(y, args...) dev_warn(0, y, ##args)
95 #define pr_info(y, args...) dev_info(0, y, ##args)
96 #define BUG() pr_err("BUG at %s:%d", __func__, __LINE__)
97
98 #define ASSERT(x) do {\
99 if (!(x)) \
100 rte_panic("CXGBE: x"); \
101 } while (0)
102 #define BUG_ON(x) ASSERT(!(x))
103
104 #ifndef WARN_ON
105 #define WARN_ON(x) do { \
106 int ret = !!(x); \
107 if (unlikely(ret)) \
108 pr_warn("WARN_ON: \"" #x "\" at %s:%d\n", __func__, __LINE__); \
109 } while (0)
110 #endif
111
112 #define __iomem
113
114 #ifndef BIT
115 #define BIT(n) (1 << (n))
116 #endif
117
118 #define L1_CACHE_SHIFT 6
119 #define L1_CACHE_BYTES BIT(L1_CACHE_SHIFT)
120
121 #define PAGE_SHIFT 12
122 #define CXGBE_ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
123 #define PTR_ALIGN(p, a) ((typeof(p))CXGBE_ALIGN((unsigned long)(p), (a)))
124
125 #define VLAN_HLEN 4
126
127 #define rmb() rte_rmb() /* dpdk rte provided rmb */
128 #define wmb() rte_wmb() /* dpdk rte provided wmb */
129
130 typedef uint8_t u8;
131 typedef int8_t s8;
132 typedef uint16_t u16;
133 typedef uint32_t u32;
134 typedef int32_t s32;
135 typedef uint64_t u64;
136 typedef int bool;
137 typedef uint64_t dma_addr_t;
138
139 #ifndef __le16
140 #define __le16 uint16_t
141 #endif
142 #ifndef __le32
143 #define __le32 uint32_t
144 #endif
145 #ifndef __le64
146 #define __le64 uint64_t
147 #endif
148 #ifndef __be16
149 #define __be16 uint16_t
150 #endif
151 #ifndef __be32
152 #define __be32 uint32_t
153 #endif
154 #ifndef __be64
155 #define __be64 uint64_t
156 #endif
157 #ifndef __u8
158 #define __u8 uint8_t
159 #endif
160 #ifndef __u16
161 #define __u16 uint16_t
162 #endif
163 #ifndef __u32
164 #define __u32 uint32_t
165 #endif
166 #ifndef __u64
167 #define __u64 uint64_t
168 #endif
169
170 #define FALSE 0
171 #define TRUE 1
172 #define false 0
173 #define true 1
174
175 #define min(a, b) RTE_MIN(a, b)
176 #define max(a, b) RTE_MAX(a, b)
177
178 /*
179 * round up val _p to a power of 2 size _s
180 */
181 #define cxgbe_roundup(_p, _s) (((unsigned long)(_p) + (_s - 1)) & ~(_s - 1))
182
183 #undef container_of
184 #define container_of(ptr, type, member) ({ \
185 typeof(((type *)0)->member)(*__mptr) = (ptr); \
186 (type *)((char *)__mptr - offsetof(type, member)); })
187
188 #define ARRAY_SIZE(arr) RTE_DIM(arr)
189
190 #define cpu_to_be16(o) rte_cpu_to_be_16(o)
191 #define cpu_to_be32(o) rte_cpu_to_be_32(o)
192 #define cpu_to_be64(o) rte_cpu_to_be_64(o)
193 #define cpu_to_le32(o) rte_cpu_to_le_32(o)
194 #define be16_to_cpu(o) rte_be_to_cpu_16(o)
195 #define be32_to_cpu(o) rte_be_to_cpu_32(o)
196 #define be64_to_cpu(o) rte_be_to_cpu_64(o)
197 #define le32_to_cpu(o) rte_le_to_cpu_32(o)
198
199 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
200 #define DELAY(x) rte_delay_us(x)
201 #define udelay(x) DELAY(x)
202 #define msleep(x) DELAY(1000 * (x))
203 #define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
204
205 static inline uint8_t hweight32(uint32_t word32)
206 {
207 uint32_t res = word32 - ((word32 >> 1) & 0x55555555);
208
209 res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
210 res = (res + (res >> 4)) & 0x0F0F0F0F;
211 res = res + (res >> 8);
212 return (res + (res >> 16)) & 0x000000FF;
213
214 } /* weight32 */
215
216 /**
217 * cxgbe_fls - find last (most-significant) bit set
218 * @x: the word to search
219 *
220 * This is defined the same way as ffs.
221 * Note cxgbe_fls(0) = 0, cxgbe_fls(1) = 1, cxgbe_fls(0x80000000) = 32.
222 */
223 static inline int cxgbe_fls(int x)
224 {
225 return x ? sizeof(x) * 8 - __builtin_clz(x) : 0;
226 }
227
228 static inline unsigned long ilog2(unsigned long n)
229 {
230 unsigned int e = 0;
231
232 while (n) {
233 if (n & ~((1 << 8) - 1)) {
234 e += 8;
235 n >>= 8;
236 continue;
237 }
238
239 if (n & ~((1 << 4) - 1)) {
240 e += 4;
241 n >>= 4;
242 }
243
244 for (;;) {
245 n >>= 1;
246 if (n == 0)
247 break;
248 e++;
249 }
250 }
251
252 return e;
253 }
254
255 static inline void writel(unsigned int val, volatile void __iomem *addr)
256 {
257 *(volatile unsigned int *)addr = val;
258 }
259
260 static inline void writeq(u64 val, volatile void __iomem *addr)
261 {
262 writel(val, addr);
263 writel(val >> 32, (void *)((uintptr_t)addr + 4));
264 }
265
266 #endif /* _CXGBE_COMPAT_H_ */