]> git.proxmox.com Git - ceph.git/blob - ceph/src/dpdk/drivers/net/enic/base/vnic_cq.h
add subtree-ish sources for 12.0.3
[ceph.git] / ceph / src / dpdk / drivers / net / enic / base / vnic_cq.h
1 /*
2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * Copyright (c) 2014, Cisco Systems, Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 *
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 *
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in
17 * the documentation and/or other materials provided with the
18 * distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24 * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35 #ifndef _VNIC_CQ_H_
36 #define _VNIC_CQ_H_
37
38 #include <rte_mbuf.h>
39
40 #include "cq_desc.h"
41 #include "vnic_dev.h"
42
43 /* Completion queue control */
44 struct vnic_cq_ctrl {
45 u64 ring_base; /* 0x00 */
46 u32 ring_size; /* 0x08 */
47 u32 pad0;
48 u32 flow_control_enable; /* 0x10 */
49 u32 pad1;
50 u32 color_enable; /* 0x18 */
51 u32 pad2;
52 u32 cq_head; /* 0x20 */
53 u32 pad3;
54 u32 cq_tail; /* 0x28 */
55 u32 pad4;
56 u32 cq_tail_color; /* 0x30 */
57 u32 pad5;
58 u32 interrupt_enable; /* 0x38 */
59 u32 pad6;
60 u32 cq_entry_enable; /* 0x40 */
61 u32 pad7;
62 u32 cq_message_enable; /* 0x48 */
63 u32 pad8;
64 u32 interrupt_offset; /* 0x50 */
65 u32 pad9;
66 u64 cq_message_addr; /* 0x58 */
67 u32 pad10;
68 };
69
70 #ifdef ENIC_AIC
71 struct vnic_rx_bytes_counter {
72 unsigned int small_pkt_bytes_cnt;
73 unsigned int large_pkt_bytes_cnt;
74 };
75 #endif
76
77 struct vnic_cq {
78 unsigned int index;
79 struct vnic_dev *vdev;
80 struct vnic_cq_ctrl __iomem *ctrl; /* memory-mapped */
81 struct vnic_dev_ring ring;
82 unsigned int to_clean;
83 unsigned int last_color;
84 unsigned int interrupt_offset;
85 #ifdef ENIC_AIC
86 struct vnic_rx_bytes_counter pkt_size_counter;
87 unsigned int cur_rx_coal_timeval;
88 unsigned int tobe_rx_coal_timeval;
89 ktime_t prev_ts;
90 #endif
91 };
92
93 void vnic_cq_free(struct vnic_cq *cq);
94 int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,
95 unsigned int socket_id,
96 unsigned int desc_count, unsigned int desc_size);
97 void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,
98 unsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,
99 unsigned int cq_tail_color, unsigned int interrupt_enable,
100 unsigned int cq_entry_enable, unsigned int message_enable,
101 unsigned int interrupt_offset, u64 message_addr);
102 void vnic_cq_clean(struct vnic_cq *cq);
103 int vnic_cq_mem_size(struct vnic_cq *cq, unsigned int desc_count,
104 unsigned int desc_size);
105
106 #endif /* _VNIC_CQ_H_ */