ceph/src/dpdk/drivers/net/nfp/nfp_net_pmd.h

   1 /*
   2  * Copyright (c) 2014, 2015 Netronome Systems, Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *  this list of conditions and the following disclaimer.
  10  *
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *  notice, this list of conditions and the following disclaimer in the
  13  *  documentation and/or other materials provided with the distribution
  14  *
  15  * 3. Neither the name of the copyright holder nor the names of its
  16  *  contributors may be used to endorse or promote products derived from this
  17  *  software without specific prior written permission.
  18  *
  19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
  23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  29  * POSSIBILITY OF SUCH DAMAGE.
  30  */
  31
  32 /*
  33  * vim:shiftwidth=8:noexpandtab
  34  *
  35  * @file dpdk/pmd/nfp_net_pmd.h
  36  *
  37  * Netronome NFP_NET PDM driver
  38  */
  39
  40 #ifndef _NFP_NET_PMD_H_
  41 #define _NFP_NET_PMD_H_
  42
  43 #define NFP_NET_PMD_VERSION "0.1"
  44 #define PCI_VENDOR_ID_NETRONOME         0x19ee
  45 #define PCI_DEVICE_ID_NFP6000_PF_NIC    0x6000
  46 #define PCI_DEVICE_ID_NFP6000_VF_NIC    0x6003
  47
  48 /* Forward declaration */
  49 struct nfp_net_adapter;
  50
  51 /*
  52  * The maximum number of descriptors is limited by design as
  53  * DPDK uses uint16_t variables for these values
  54  */
  55 #define NFP_NET_MAX_TX_DESC (32 * 1024)
  56 #define NFP_NET_MIN_TX_DESC 64
  57
  58 #define NFP_NET_MAX_RX_DESC (32 * 1024)
  59 #define NFP_NET_MIN_RX_DESC 64
  60
  61 /* Bar allocation */
  62 #define NFP_NET_CRTL_BAR        0
  63 #define NFP_NET_TX_BAR          2
  64 #define NFP_NET_RX_BAR          2
  65
  66 /* Macros for accessing the Queue Controller Peripheral 'CSRs' */
  67 #define NFP_QCP_QUEUE_OFF(_x)                 ((_x) * 0x800)
  68 #define NFP_QCP_QUEUE_ADD_RPTR                  0x0000
  69 #define NFP_QCP_QUEUE_ADD_WPTR                  0x0004
  70 #define NFP_QCP_QUEUE_STS_LO                    0x0008
  71 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask     (0x3ffff)
  72 #define NFP_QCP_QUEUE_STS_HI                    0x000c
  73 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask    (0x3ffff)
  74
  75 /* Interrupt definitions */
  76 #define NFP_NET_IRQ_LSC_IDX             0
  77
  78 /* Default values for RX/TX configuration */
  79 #define DEFAULT_RX_FREE_THRESH  32
  80 #define DEFAULT_RX_PTHRESH      8
  81 #define DEFAULT_RX_HTHRESH      8
  82 #define DEFAULT_RX_WTHRESH      0
  83
  84 #define DEFAULT_TX_RS_THRESH    32
  85 #define DEFAULT_TX_FREE_THRESH  32
  86 #define DEFAULT_TX_PTHRESH      32
  87 #define DEFAULT_TX_HTHRESH      0
  88 #define DEFAULT_TX_WTHRESH      0
  89 #define DEFAULT_TX_RSBIT_THRESH 32
  90
  91 /* Alignment for dma zones */
  92 #define NFP_MEMZONE_ALIGN       128
  93
  94 /*
  95  * This is used by the reconfig protocol. It sets the maximum time waiting in
  96  * milliseconds before a reconfig timeout happens.
  97  */
  98 #define NFP_NET_POLL_TIMEOUT    5000
  99
 100 #define NFP_QCP_QUEUE_ADDR_SZ   (0x800)
 101
 102 #define NFP_NET_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
 103 #define NFP_NET_LINK_UP_CHECK_TIMEOUT   1000 /* ms */
 104
 105 /* Version number helper defines */
 106 #define NFD_CFG_CLASS_VER_msk       0xff
 107 #define NFD_CFG_CLASS_VER_shf       24
 108 #define NFD_CFG_CLASS_VER(x)        (((x) & 0xff) << 24)
 109 #define NFD_CFG_CLASS_VER_of(x)     (((x) >> 24) & 0xff)
 110 #define NFD_CFG_CLASS_TYPE_msk      0xff
 111 #define NFD_CFG_CLASS_TYPE_shf      16
 112 #define NFD_CFG_CLASS_TYPE(x)       (((x) & 0xff) << 16)
 113 #define NFD_CFG_CLASS_TYPE_of(x)    (((x) >> 16) & 0xff)
 114 #define NFD_CFG_MAJOR_VERSION_msk   0xff
 115 #define NFD_CFG_MAJOR_VERSION_shf   8
 116 #define NFD_CFG_MAJOR_VERSION(x)    (((x) & 0xff) << 8)
 117 #define NFD_CFG_MAJOR_VERSION_of(x) (((x) >> 8) & 0xff)
 118 #define NFD_CFG_MINOR_VERSION_msk   0xff
 119 #define NFD_CFG_MINOR_VERSION_shf   0
 120 #define NFD_CFG_MINOR_VERSION(x)    (((x) & 0xff) << 0)
 121 #define NFD_CFG_MINOR_VERSION_of(x) (((x) >> 0) & 0xff)
 122
 123 #include <linux/types.h>
 124
 125 static inline uint8_t nn_readb(volatile const void *addr)
 126 {
 127         return *((volatile const uint8_t *)(addr));
 128 }
 129
 130 static inline void nn_writeb(uint8_t val, volatile void *addr)
 131 {
 132         *((volatile uint8_t *)(addr)) = val;
 133 }
 134
 135 static inline uint32_t nn_readl(volatile const void *addr)
 136 {
 137         return *((volatile const uint32_t *)(addr));
 138 }
 139
 140 static inline void nn_writel(uint32_t val, volatile void *addr)
 141 {
 142         *((volatile uint32_t *)(addr)) = val;
 143 }
 144
 145 static inline uint64_t nn_readq(volatile void *addr)
 146 {
 147         const volatile uint32_t *p = addr;
 148         uint32_t low, high;
 149
 150         high = nn_readl((volatile const void *)(p + 1));
 151         low = nn_readl((volatile const void *)p);
 152
 153         return low + ((uint64_t)high << 32);
 154 }
 155
 156 static inline void nn_writeq(uint64_t val, volatile void *addr)
 157 {
 158         nn_writel(val >> 32, (volatile char *)addr + 4);
 159         nn_writel(val, addr);
 160 }
 161
 162 /* TX descriptor format */
 163 #define PCIE_DESC_TX_EOP                (1 << 7)
 164 #define PCIE_DESC_TX_OFFSET_MASK        (0x7f)
 165
 166 /* Flags in the host TX descriptor */
 167 #define PCIE_DESC_TX_CSUM               (1 << 7)
 168 #define PCIE_DESC_TX_IP4_CSUM           (1 << 6)
 169 #define PCIE_DESC_TX_TCP_CSUM           (1 << 5)
 170 #define PCIE_DESC_TX_UDP_CSUM           (1 << 4)
 171 #define PCIE_DESC_TX_VLAN               (1 << 3)
 172 #define PCIE_DESC_TX_LSO                (1 << 2)
 173 #define PCIE_DESC_TX_ENCAP_NONE         (0)
 174 #define PCIE_DESC_TX_ENCAP_VXLAN        (1 << 1)
 175 #define PCIE_DESC_TX_ENCAP_GRE          (1 << 0)
 176
 177 struct nfp_net_tx_desc {
 178         union {
 179                 struct {
 180                         uint8_t dma_addr_hi;   /* High bits of host buf address */
 181                         __le16 dma_len;     /* Length to DMA for this desc */
 182                         uint8_t offset_eop;    /* Offset in buf where pkt starts +
 183                                              * highest bit is eop flag.
 184                                              */
 185                         __le32 dma_addr_lo; /* Low 32bit of host buf addr */
 186
 187                         __le16 lso;         /* MSS to be used for LSO */
 188                         uint8_t l4_offset;     /* LSO, where the L4 data starts */
 189                         uint8_t flags;         /* TX Flags, see @PCIE_DESC_TX_* */
 190
 191                         __le16 vlan;        /* VLAN tag to add if indicated */
 192                         __le16 data_len;    /* Length of frame + meta data */
 193                 } __attribute__((__packed__));
 194                 __le32 vals[4];
 195         };
 196 };
 197
 198 struct nfp_net_txq {
 199         struct nfp_net_hw *hw; /* Backpointer to nfp_net structure */
 200
 201         /*
 202          * Queue information: @qidx is the queue index from Linux's
 203          * perspective.  @tx_qcidx is the index of the Queue
 204          * Controller Peripheral queue relative to the TX queue BAR.
 205          * @cnt is the size of the queue in number of
 206          * descriptors. @qcp_q is a pointer to the base of the queue
 207          * structure on the NFP
 208          */
 209         uint8_t *qcp_q;
 210
 211         /*
 212          * Read and Write pointers.  @wr_p and @rd_p are host side pointer,
 213          * they are free running and have little relation to the QCP pointers *
 214          * @qcp_rd_p is a local copy queue controller peripheral read pointer
 215          */
 216
 217         uint32_t wr_p;
 218         uint32_t rd_p;
 219         uint32_t qcp_rd_p;
 220
 221         uint32_t tx_count;
 222
 223         uint32_t tx_free_thresh;
 224         uint32_t tail;
 225
 226         /*
 227          * For each descriptor keep a reference to the mbuff and
 228          * DMA address used until completion is signalled.
 229          */
 230         struct {
 231                 struct rte_mbuf *mbuf;
 232         } *txbufs;
 233
 234         /*
 235          * Information about the host side queue location. @txds is
 236          * the virtual address for the queue, @dma is the DMA address
 237          * of the queue and @size is the size in bytes for the queue
 238          * (needed for free)
 239          */
 240         struct nfp_net_tx_desc *txds;
 241
 242         /*
 243          * At this point 56 bytes have been used for all the fields in the
 244          * TX critical path. We have room for 8 bytes and still all placed
 245          * in a cache line. We are not using the threshold values below nor
 246          * the txq_flags but if we need to, we can add the most used in the
 247          * remaining bytes.
 248          */
 249         uint32_t tx_rs_thresh; /* not used by now. Future? */
 250         uint32_t tx_pthresh;   /* not used by now. Future? */
 251         uint32_t tx_hthresh;   /* not used by now. Future? */
 252         uint32_t tx_wthresh;   /* not used by now. Future? */
 253         uint32_t txq_flags;    /* not used by now. Future? */
 254         uint8_t  port_id;
 255         int qidx;
 256         int tx_qcidx;
 257         __le64 dma;
 258 } __attribute__ ((__aligned__(64)));
 259
 260 /* RX and freelist descriptor format */
 261 #define PCIE_DESC_RX_DD                 (1 << 7)
 262 #define PCIE_DESC_RX_META_LEN_MASK      (0x7f)
 263
 264 /* Flags in the RX descriptor */
 265 #define PCIE_DESC_RX_RSS                (1 << 15)
 266 #define PCIE_DESC_RX_I_IP4_CSUM         (1 << 14)
 267 #define PCIE_DESC_RX_I_IP4_CSUM_OK      (1 << 13)
 268 #define PCIE_DESC_RX_I_TCP_CSUM         (1 << 12)
 269 #define PCIE_DESC_RX_I_TCP_CSUM_OK      (1 << 11)
 270 #define PCIE_DESC_RX_I_UDP_CSUM         (1 << 10)
 271 #define PCIE_DESC_RX_I_UDP_CSUM_OK      (1 <<  9)
 272 #define PCIE_DESC_RX_INGRESS_PORT       (1 <<  8)
 273 #define PCIE_DESC_RX_EOP                (1 <<  7)
 274 #define PCIE_DESC_RX_IP4_CSUM           (1 <<  6)
 275 #define PCIE_DESC_RX_IP4_CSUM_OK        (1 <<  5)
 276 #define PCIE_DESC_RX_TCP_CSUM           (1 <<  4)
 277 #define PCIE_DESC_RX_TCP_CSUM_OK        (1 <<  3)
 278 #define PCIE_DESC_RX_UDP_CSUM           (1 <<  2)
 279 #define PCIE_DESC_RX_UDP_CSUM_OK        (1 <<  1)
 280 #define PCIE_DESC_RX_VLAN               (1 <<  0)
 281
 282 struct nfp_net_rx_desc {
 283         union {
 284                 /* Freelist descriptor */
 285                 struct {
 286                         uint8_t dma_addr_hi;
 287                         __le16 spare;
 288                         uint8_t dd;
 289
 290                         __le32 dma_addr_lo;
 291                 } __attribute__((__packed__)) fld;
 292
 293                 /* RX descriptor */
 294                 struct {
 295                         __le16 data_len;
 296                         uint8_t reserved;
 297                         uint8_t meta_len_dd;
 298
 299                         __le16 flags;
 300                         __le16 vlan;
 301                 } __attribute__((__packed__)) rxd;
 302
 303                 __le32 vals[2];
 304         };
 305 };
 306
 307 struct nfp_net_rx_buff {
 308         struct rte_mbuf *mbuf;
 309 };
 310
 311 struct nfp_net_rxq {
 312         struct nfp_net_hw *hw;  /* Backpointer to nfp_net structure */
 313
 314          /*
 315           * @qcp_fl and @qcp_rx are pointers to the base addresses of the
 316           * freelist and RX queue controller peripheral queue structures on the
 317           * NFP
 318           */
 319         uint8_t *qcp_fl;
 320         uint8_t *qcp_rx;
 321
 322         /*
 323          * Read and Write pointers.  @wr_p and @rd_p are host side
 324          * pointer, they are free running and have little relation to
 325          * the QCP pointers. @wr_p is where the driver adds new
 326          * freelist descriptors and @rd_p is where the driver start
 327          * reading descriptors for newly arrive packets from.
 328          */
 329         uint32_t wr_p;
 330         uint32_t rd_p;
 331
 332         /*
 333          * For each buffer placed on the freelist, record the
 334          * associated SKB
 335          */
 336         struct nfp_net_rx_buff *rxbufs;
 337
 338         /*
 339          * Information about the host side queue location.  @rxds is
 340          * the virtual address for the queue
 341          */
 342         struct nfp_net_rx_desc *rxds;
 343
 344         /*
 345          * The mempool is created by the user specifying a mbuf size.
 346          * We save here the reference of the mempool needed in the RX
 347          * path and the mbuf size for checking received packets can be
 348          * safely copied to the mbuf using the NFP_NET_RX_OFFSET
 349          */
 350         struct rte_mempool *mem_pool;
 351         uint16_t mbuf_size;
 352
 353         /*
 354          * Next two fields are used for giving more free descriptors
 355          * to the NFP
 356          */
 357         uint16_t rx_free_thresh;
 358         uint16_t nb_rx_hold;
 359
 360          /* the size of the queue in number of descriptors */
 361         uint16_t rx_count;
 362
 363         /*
 364          * Fields above this point fit in a single cache line and are all used
 365          * in the RX critical path. Fields below this point are just used
 366          * during queue configuration or not used at all (yet)
 367          */
 368
 369         /* referencing dev->data->port_id */
 370         uint16_t port_id;
 371
 372         uint8_t  crc_len; /* Not used by now */
 373         uint8_t  drop_en; /* Not used by now */
 374
 375         /* DMA address of the queue */
 376         __le64 dma;
 377
 378         /*
 379          * Queue information: @qidx is the queue index from Linux's
 380          * perspective.  @fl_qcidx is the index of the Queue
 381          * Controller peripheral queue relative to the RX queue BAR
 382          * used for the freelist and @rx_qcidx is the Queue Controller
 383          * Peripheral index for the RX queue.
 384          */
 385         int qidx;
 386         int fl_qcidx;
 387         int rx_qcidx;
 388 } __attribute__ ((__aligned__(64)));
 389
 390 struct nfp_net_hw {
 391         /* Info from the firmware */
 392         uint32_t ver;
 393         uint32_t cap;
 394         uint32_t max_mtu;
 395         uint32_t mtu;
 396         uint32_t rx_offset;
 397
 398         /* Current values for control */
 399         uint32_t ctrl;
 400
 401         uint8_t *ctrl_bar;
 402         uint8_t *tx_bar;
 403         uint8_t *rx_bar;
 404
 405         int stride_rx;
 406         int stride_tx;
 407
 408         uint8_t *qcp_cfg;
 409         rte_spinlock_t reconfig_lock;
 410
 411         uint32_t max_tx_queues;
 412         uint32_t max_rx_queues;
 413         uint16_t flbufsz;
 414         uint16_t device_id;
 415         uint16_t vendor_id;
 416         uint16_t subsystem_device_id;
 417         uint16_t subsystem_vendor_id;
 418 #if defined(DSTQ_SELECTION)
 419 #if DSTQ_SELECTION
 420         uint16_t device_function;
 421 #endif
 422 #endif
 423
 424         uint8_t mac_addr[ETHER_ADDR_LEN];
 425
 426         /* Records starting point for counters */
 427         struct rte_eth_stats eth_stats_base;
 428
 429 #ifdef NFP_NET_LIBNFP
 430         struct nfp_cpp *cpp;
 431         struct nfp_cpp_area *ctrl_area;
 432         struct nfp_cpp_area *tx_area;
 433         struct nfp_cpp_area *rx_area;
 434         struct nfp_cpp_area *msix_area;
 435 #endif
 436 };
 437
 438 struct nfp_net_adapter {
 439         struct nfp_net_hw hw;
 440 };
 441
 442 #define NFP_NET_DEV_PRIVATE_TO_HW(adapter)\
 443         (&((struct nfp_net_adapter *)adapter)->hw)
 444
 445 #endif /* _NFP_NET_PMD_H_ */
 446 /*
 447  * Local variables:
 448  * c-file-style: "Linux"
 449  * indent-tabs-mode: t
 450  * End:
 451  */