ceph/src/dpdk/drivers/net/qede/base/ecore_init_fw_funcs.h

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #ifndef _INIT_FW_FUNCS_H
  10 #define _INIT_FW_FUNCS_H
  11 /* forward declarations */
  12 struct init_qm_pq_params;
  13 /**
  14  * @brief ecore_qm_pf_mem_size - prepare QM ILT sizes
  15  *
  16  * Returns the required host memory size in 4KB units.
  17  * Must be called before all QM init HSI functions.
  18  *
  19  * @param pf_id                 - physical function ID
  20  * @param num_pf_cids   - number of connections used by this PF
  21  * @param num_vf_cids   - number of connections used by VFs of this PF
  22  * @param num_tids              - number of tasks used by this PF
  23  * @param num_pf_pqs    - number of PQs used by this PF
  24  * @param num_vf_pqs    - number of PQs used by VFs of this PF
  25  *
  26  * @return The required host memory size in 4KB units.
  27  */
  28 u32 ecore_qm_pf_mem_size(u8 pf_id,
  29                                                  u32 num_pf_cids,
  30                                                  u32 num_vf_cids,
  31                                                  u32 num_tids,
  32                                                  u16 num_pf_pqs,
  33                                                  u16 num_vf_pqs);
  34 /**
  35  * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for engine
  36  *                                  phase
  37  *
  38  * @param p_hwfn
  39  * @param max_ports_per_engine  - max number of ports per engine in HW
  40  * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
  41  * @param pf_rl_en                              - enable per-PF rate limiters
  42  * @param pf_wfq_en                             - enable per-PF WFQ
  43  * @param vport_rl_en                   - enable per-VPORT rate limiters
  44  * @param vport_wfq_en                  - enable per-VPORT WFQ
  45  * @param port_params - array of size MAX_NUM_PORTS with params for each port
  46  *
  47  * @return 0 on success, -1 on error.
  48  */
  49 int ecore_qm_common_rt_init(struct ecore_hwfn *p_hwfn,
  50                          u8 max_ports_per_engine,
  51                          u8 max_phys_tcs_per_port,
  52                          bool pf_rl_en,
  53                          bool pf_wfq_en,
  54                          bool vport_rl_en,
  55                          bool vport_wfq_en,
  56                          struct init_qm_port_params port_params[MAX_NUM_PORTS]);
  57 /**
  58  * @brief ecore_qm_pf_rt_init  Prepare QM runtime init values for the PF phase
  59  *
  60  * @param p_hwfn
  61  * @param p_ptt                 - ptt window used for writing the registers
  62  * @param port_id                               - port ID
  63  * @param pf_id                                 - PF ID
  64  * @param max_phys_tcs_per_port - max number of physical TCs per port in HW
  65  * @param is_first_pf                   - 1 = first PF in engine, 0 = othwerwise
  66  * @param num_pf_cids                   - number of connections used by this PF
  67  * @param num_vf_cids           - number of connections used by VFs of this PF
  68  * @param num_tids                      - number of tasks used by this PF
  69  * @param start_pq                      - first Tx PQ ID associated with this PF
  70  * @param num_pf_pqs    - number of Tx PQs associated with this PF (non-VF)
  71  * @param num_vf_pqs                    - number of Tx PQs associated with a VF
  72  * @param start_vport                   - first VPORT ID associated with this PF
  73  * @param num_vports - number of VPORTs associated with this PF
  74  * @param pf_wfq - WFQ weight. if PF WFQ is globally disabled, the weight must
  75  *                 be 0. otherwise, the weight must be non-zero.
  76  * @param pf_rl - rate limit in Mb/sec units. a value of 0 means don't
  77  *                configure. ignored if PF RL is globally disabled.
  78  * @param pq_params - array of size (num_pf_pqs+num_vf_pqs) with parameters for
  79  *                    each Tx PQ associated with the specified PF.
  80  * @param vport_params - array of size num_vports with parameters for each
  81  *                       associated VPORT.
  82  *
  83  * @return 0 on success, -1 on error.
  84  */
  85 int ecore_qm_pf_rt_init(struct ecore_hwfn *p_hwfn,
  86                                 struct ecore_ptt *p_ptt,
  87                                 u8 port_id,
  88                                 u8 pf_id,
  89                                 u8 max_phys_tcs_per_port,
  90                                 bool is_first_pf,
  91                                 u32 num_pf_cids,
  92                                 u32 num_vf_cids,
  93                                 u32 num_tids,
  94                                 u16 start_pq,
  95                                 u16 num_pf_pqs,
  96                                 u16 num_vf_pqs,
  97                                 u8 start_vport,
  98                                 u8 num_vports,
  99                                 u16 pf_wfq,
 100                                 u32 pf_rl,
 101                                 struct init_qm_pq_params *pq_params,
 102                                 struct init_qm_vport_params *vport_params);
 103 /**
 104  * @brief ecore_init_pf_wfq  Initializes the WFQ weight of the specified PF
 105  *
 106  * @param p_hwfn
 107  * @param p_ptt         - ptt window used for writing the registers
 108  * @param pf_id         - PF ID
 109  * @param pf_wfq        - WFQ weight. Must be non-zero.
 110  *
 111  * @return 0 on success, -1 on error.
 112  */
 113 int ecore_init_pf_wfq(struct ecore_hwfn *p_hwfn,
 114                                           struct ecore_ptt *p_ptt,
 115                                           u8 pf_id,
 116                                           u16 pf_wfq);
 117 /**
 118  * @brief ecore_init_pf_rl  Initializes the rate limit of the specified PF
 119  *
 120  * @param p_hwfn
 121  * @param p_ptt - ptt window used for writing the registers
 122  * @param pf_id - PF ID
 123  * @param pf_rl - rate limit in Mb/sec units
 124  *
 125  * @return 0 on success, -1 on error.
 126  */
 127 int ecore_init_pf_rl(struct ecore_hwfn *p_hwfn,
 128                                          struct ecore_ptt *p_ptt,
 129                                          u8 pf_id,
 130                                          u32 pf_rl);
 131 /**
 132  * @brief ecore_init_vport_wfq  Initializes the WFQ weight of specified VPORT
 133  *
 134  * @param p_hwfn
 135  * @param p_ptt                 - ptt window used for writing the registers
 136  * @param first_tx_pq_id- An array containing the first Tx PQ ID associated
 137  *                        with the VPORT for each TC. This array is filled by
 138  *                        ecore_qm_pf_rt_init
 139  * @param vport_wfq             - WFQ weight. Must be non-zero.
 140  *
 141  * @return 0 on success, -1 on error.
 142  */
 143 int ecore_init_vport_wfq(struct ecore_hwfn *p_hwfn,
 144                                                  struct ecore_ptt *p_ptt,
 145                                                  u16 first_tx_pq_id[NUM_OF_TCS],
 146                                                  u16 vport_wfq);
 147 /**
 148  * @brief ecore_init_vport_rl  Initializes the rate limit of the specified VPORT
 149  *
 150  * @param p_hwfn
 151  * @param p_ptt         - ptt window used for writing the registers
 152  * @param vport_id      - VPORT ID
 153  * @param vport_rl      - rate limit in Mb/sec units
 154  *
 155  * @return 0 on success, -1 on error.
 156  */
 157 int ecore_init_vport_rl(struct ecore_hwfn *p_hwfn,
 158                                                 struct ecore_ptt *p_ptt,
 159                                                 u8 vport_id,
 160                                                 u32 vport_rl);
 161 /**
 162  * @brief ecore_send_qm_stop_cmd  Sends a stop command to the QM
 163  *
 164  * @param p_hwfn
 165  * @param p_ptt          - ptt window used for writing the registers
 166  * @param is_release_cmd - true for release, false for stop.
 167  * @param is_tx_pq       - true for Tx PQs, false for Other PQs.
 168  * @param start_pq       - first PQ ID to stop
 169  * @param num_pqs        - Number of PQs to stop, starting from start_pq.
 170  *
 171  * @return bool, true if successful, false if timeout occurred while waiting
 172  *  for QM command done.
 173  */
 174 bool ecore_send_qm_stop_cmd(struct ecore_hwfn *p_hwfn,
 175                                                         struct ecore_ptt *p_ptt,
 176                                                         bool is_release_cmd,
 177                                                         bool is_tx_pq,
 178                                                         u16 start_pq,
 179                                                         u16 num_pqs);
 180 #ifndef UNUSED_HSI_FUNC
 181 /**
 182  * @brief ecore_init_nig_ets - initializes the NIG ETS arbiter
 183  *
 184  * Based on weight/priority requirements per-TC.
 185  *
 186  * @param p_ptt - ptt window used for writing the registers.
 187  * @param req   - the NIG ETS initialization requirements.
 188  * @param is_lb - if set, the loopback port arbiter is initialized, otherwise
 189  *                the physical port arbiter is initialized. The pure-LB TC
 190  *                requirements are ignored when is_lb is cleared.
 191  */
 192 void ecore_init_nig_ets(struct ecore_hwfn *p_hwfn,
 193                                                 struct ecore_ptt *p_ptt,
 194                                                 struct init_ets_req *req,
 195                                                 bool is_lb);
 196 /**
 197  * @brief ecore_init_nig_lb_rl - initializes the NIG LB RLs
 198  *
 199  * Based on global and per-TC rate requirements
 200  *
 201  * @param p_ptt - ptt window used for writing the registers.
 202  * @param req   - the NIG LB RLs initialization requirements.
 203  */
 204 void ecore_init_nig_lb_rl(struct ecore_hwfn *p_hwfn,
 205                                   struct ecore_ptt *p_ptt,
 206                                   struct init_nig_lb_rl_req *req);
 207 #endif /* UNUSED_HSI_FUNC */
 208 /**
 209  * @brief ecore_init_nig_pri_tc_map - initializes the NIG priority to TC map.
 210  *
 211  * Assumes valid arguments.
 212  *
 213  * @param p_ptt - ptt window used for writing the registers.
 214  * @param req   - required mapping from prioirties to TCs.
 215  */
 216 void ecore_init_nig_pri_tc_map(struct ecore_hwfn *p_hwfn,
 217                                            struct ecore_ptt *p_ptt,
 218                                            struct init_nig_pri_tc_map_req *req);
 219 #ifndef UNUSED_HSI_FUNC
 220 /**
 221  * @brief ecore_init_prs_ets - initializes the PRS Rx ETS arbiter
 222  *
 223  * Based on weight/priority requirements per-TC.
 224  *
 225  * @param p_ptt - ptt window used for writing the registers.
 226  * @param req   - the PRS ETS initialization requirements.
 227  */
 228 void ecore_init_prs_ets(struct ecore_hwfn *p_hwfn,
 229                                                 struct ecore_ptt *p_ptt,
 230                                                 struct init_ets_req *req);
 231 #endif /* UNUSED_HSI_FUNC */
 232 #ifndef UNUSED_HSI_FUNC
 233 /**
 234  * @brief ecore_init_brb_ram - initializes BRB RAM sizes per TC
 235  *
 236  * Based on weight/priority requirements per-TC.
 237  *
 238  * @param p_ptt - ptt window used for writing the registers.
 239  * @param req   - the BRB RAM initialization requirements.
 240  */
 241 void ecore_init_brb_ram(struct ecore_hwfn *p_hwfn,
 242                                                 struct ecore_ptt *p_ptt,
 243                                                 struct init_brb_ram_req *req);
 244 #endif /* UNUSED_HSI_FUNC */
 245 #ifndef UNUSED_HSI_FUNC
 246 /**
 247  * @brief ecore_set_engine_mf_ovlan_eth_type - initializes Nig,Prs,Pbf and llh
 248  *                                             ethType Regs to  input ethType
 249  *                                             should Be called once per engine
 250  *                                             if engine
 251  *  is in BD mode.
 252  *
 253  * @param p_ptt    - ptt window used for writing the registers.
 254  * @param ethType - etherType to configure
 255  */
 256 void ecore_set_engine_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
 257                         struct ecore_ptt *p_ptt, u32 ethType);
 258 /**
 259  * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to
 260  *                                           input ethType should Be called
 261  *                                           once per port.
 262  *
 263  * @param p_ptt    - ptt window used for writing the registers.
 264  * @param ethType - etherType to configure
 265  */
 266 void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
 267                         struct ecore_ptt *p_ptt, u32 ethType);
 268 #endif /* UNUSED_HSI_FUNC */
 269 /**
 270  * @brief ecore_set_vxlan_dest_port - initializes vxlan tunnel destination udp
 271  *                                    port
 272  *
 273  * @param p_ptt     - ptt window used for writing the registers.
 274  * @param dest_port - vxlan destination udp port.
 275  */
 276 void ecore_set_vxlan_dest_port(struct ecore_hwfn *p_hwfn,
 277                                struct ecore_ptt *p_ptt,
 278                                u16 dest_port);
 279 /**
 280  * @brief ecore_set_vxlan_enable - enable or disable VXLAN tunnel in HW
 281  *
 282  * @param p_ptt - ptt window used for writing the registers.
 283  * @param vxlan_enable - vxlan enable flag.
 284  */
 285 void ecore_set_vxlan_enable(struct ecore_hwfn *p_hwfn,
 286                             struct ecore_ptt *p_ptt,
 287                             bool vxlan_enable);
 288 /**
 289  * @brief ecore_set_gre_enable - enable or disable GRE tunnel in HW
 290  *
 291  * @param p_ptt          - ptt window used for writing the registers.
 292  * @param eth_gre_enable - eth GRE enable enable flag.
 293  * @param ip_gre_enable  - IP GRE enable enable flag.
 294  */
 295 void ecore_set_gre_enable(struct ecore_hwfn *p_hwfn,
 296                           struct ecore_ptt *p_ptt,
 297                           bool eth_gre_enable,
 298                           bool ip_gre_enable);
 299 /**
 300  * @brief ecore_set_geneve_dest_port - initializes geneve tunnel destination
 301  *                                     udp port
 302  *
 303  * @param p_ptt     - ptt window used for writing the registers.
 304  * @param dest_port - geneve destination udp port.
 305  */
 306 void ecore_set_geneve_dest_port(struct ecore_hwfn *p_hwfn,
 307                                 struct ecore_ptt *p_ptt,
 308                                 u16 dest_port);
 309 /**
 310  * @brief ecore_set_gre_enable - enable or disable GRE tunnel in HW
 311  *
 312  * @param p_ptt             - ptt window used for writing the registers.
 313  * @param eth_geneve_enable - eth GENEVE enable enable flag.
 314  * @param ip_geneve_enable  - IP GENEVE enable enable flag.
 315   */
 316 void ecore_set_geneve_enable(struct ecore_hwfn *p_hwfn,
 317                              struct ecore_ptt *p_ptt,
 318                              bool eth_geneve_enable,
 319                              bool ip_geneve_enable);
 320 #ifndef UNUSED_HSI_FUNC
 321 /**
 322 * @brief ecore_set_gft_event_id_cm_hdr - configure GFT event id and cm header
 323 *
 324 * @param p_ptt          - ptt window used for writing the registers.
 325 */
 326 void ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn *p_hwfn,
 327                                    struct ecore_ptt *p_ptt);
 328 /**
 329 * @brief ecore_set_rfs_mode_enable - enable and configure HW for RFS
 330 *
 331 *
 332 * @param p_ptt             - ptt window used for writing the registers.
 333 * @param pf_id - pf on which to enable RFS.
 334 * @param tcp -  set profile tcp packets.
 335 * @param udp -  set profile udp  packet.
 336 * @param ipv4 - set profile ipv4 packet.
 337 * @param ipv6 - set profile ipv6 packet.
 338 */
 339 void ecore_set_rfs_mode_enable(struct ecore_hwfn *p_hwfn,
 340         struct ecore_ptt *p_ptt,
 341         u16 pf_id,
 342         bool tcp,
 343         bool udp,
 344         bool ipv4,
 345         bool ipv6);
 346 #endif /* UNUSED_HSI_FUNC */
 347 /**
 348 * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be
 349 *                                         used before first ETH queue started.
 350 *
 351 *
 352 * @param p_ptt        -  ptt window used for writing the registers. Don't care
 353 *                        if runtime_init used
 354 * @param mode         -  VF zone size mode. Use enum vf_zone_size_mode.
 355 * @param runtime_init -  Set 1 to init runtime registers in engine phase. Set 0
 356 *                        if VF zone size mode configured after engine phase.
 357 */
 358 void ecore_config_vf_zone_size_mode(struct ecore_hwfn *p_hwfn, struct ecore_ptt
 359                                     *p_ptt, u16 mode, bool runtime_init);
 360 /**
 361 * @brief ecore_get_mstorm_queue_stat_offset - get mstorm statistics offset by VF
 362 *                                             zone size mode.
 363 *
 364 * @param stat_cnt_id         -  statistic counter id
 365 * @param vf_zone_size_mode   -  VF zone size mode. Use enum vf_zone_size_mode.
 366 */
 367 u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn,
 368                                        u16 stat_cnt_id, u16 vf_zone_size_mode);
 369 /**
 370 * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone
 371 *                                               size mode.
 372 *
 373 * @param vf_id               -  vf id.
 374 * @param vf_queue_id         -  per VF rx queue id.
 375 * @param vf_zone_size_mode   -  vf zone size mode. Use enum vf_zone_size_mode.
 376 */
 377 u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn, u8 vf_id, u8
 378                                          vf_queue_id, u16 vf_zone_size_mode);
 379 #endif