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add subtree-ish sources for 12.0.3
[ceph.git] / ceph / src / dpdk / drivers / net / qede / base / ecore_sriov.c
1 /*
2 * Copyright (c) 2016 QLogic Corporation.
3 * All rights reserved.
4 * www.qlogic.com
5 *
6 * See LICENSE.qede_pmd for copyright and licensing details.
7 */
8
9 #include "bcm_osal.h"
10 #include "ecore.h"
11 #include "reg_addr.h"
12 #include "ecore_sriov.h"
13 #include "ecore_status.h"
14 #include "ecore_hw.h"
15 #include "ecore_hw_defs.h"
16 #include "ecore_int.h"
17 #include "ecore_hsi_eth.h"
18 #include "ecore_l2.h"
19 #include "ecore_vfpf_if.h"
20 #include "ecore_rt_defs.h"
21 #include "ecore_init_ops.h"
22 #include "ecore_gtt_reg_addr.h"
23 #include "ecore_iro.h"
24 #include "ecore_mcp.h"
25 #include "ecore_cxt.h"
26 #include "ecore_vf.h"
27 #include "ecore_init_fw_funcs.h"
28 #include "ecore_sp_commands.h"
29
30 const char *ecore_channel_tlvs_string[] = {
31 "CHANNEL_TLV_NONE", /* ends tlv sequence */
32 "CHANNEL_TLV_ACQUIRE",
33 "CHANNEL_TLV_VPORT_START",
34 "CHANNEL_TLV_VPORT_UPDATE",
35 "CHANNEL_TLV_VPORT_TEARDOWN",
36 "CHANNEL_TLV_START_RXQ",
37 "CHANNEL_TLV_START_TXQ",
38 "CHANNEL_TLV_STOP_RXQ",
39 "CHANNEL_TLV_STOP_TXQ",
40 "CHANNEL_TLV_UPDATE_RXQ",
41 "CHANNEL_TLV_INT_CLEANUP",
42 "CHANNEL_TLV_CLOSE",
43 "CHANNEL_TLV_RELEASE",
44 "CHANNEL_TLV_LIST_END",
45 "CHANNEL_TLV_UCAST_FILTER",
46 "CHANNEL_TLV_VPORT_UPDATE_ACTIVATE",
47 "CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH",
48 "CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP",
49 "CHANNEL_TLV_VPORT_UPDATE_MCAST",
50 "CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM",
51 "CHANNEL_TLV_VPORT_UPDATE_RSS",
52 "CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN",
53 "CHANNEL_TLV_VPORT_UPDATE_SGE_TPA",
54 "CHANNEL_TLV_MAX"
55 };
56
57 /* IOV ramrods */
58 static enum _ecore_status_t ecore_sp_vf_start(struct ecore_hwfn *p_hwfn,
59 struct ecore_vf_info *p_vf)
60 {
61 struct vf_start_ramrod_data *p_ramrod = OSAL_NULL;
62 struct ecore_spq_entry *p_ent = OSAL_NULL;
63 struct ecore_sp_init_data init_data;
64 enum _ecore_status_t rc = ECORE_NOTIMPL;
65 u8 fp_minor;
66
67 /* Get SPQ entry */
68 OSAL_MEMSET(&init_data, 0, sizeof(init_data));
69 init_data.cid = ecore_spq_get_cid(p_hwfn);
70 init_data.opaque_fid = p_vf->opaque_fid;
71 init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
72
73 rc = ecore_sp_init_request(p_hwfn, &p_ent,
74 COMMON_RAMROD_VF_START,
75 PROTOCOLID_COMMON, &init_data);
76 if (rc != ECORE_SUCCESS)
77 return rc;
78
79 p_ramrod = &p_ent->ramrod.vf_start;
80
81 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
82 p_ramrod->opaque_fid = OSAL_CPU_TO_LE16(p_vf->opaque_fid);
83
84 switch (p_hwfn->hw_info.personality) {
85 case ECORE_PCI_ETH:
86 p_ramrod->personality = PERSONALITY_ETH;
87 break;
88 case ECORE_PCI_ETH_ROCE:
89 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
90 break;
91 default:
92 DP_NOTICE(p_hwfn, true, "Unknown VF personality %d\n",
93 p_hwfn->hw_info.personality);
94 return ECORE_INVAL;
95 }
96
97 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
98 if (fp_minor > ETH_HSI_VER_MINOR &&
99 fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
100 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
101 "VF [%d] - Requested fp hsi %02x.%02x which is"
102 " slightly newer than PF's %02x.%02x; Configuring"
103 " PFs version\n",
104 p_vf->abs_vf_id,
105 ETH_HSI_VER_MAJOR, fp_minor,
106 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
107 fp_minor = ETH_HSI_VER_MINOR;
108 }
109
110 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
111 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
112
113 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
114 "VF[%d] - Starting using HSI %02x.%02x\n",
115 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
116
117 return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
118 }
119
120 static enum _ecore_status_t ecore_sp_vf_stop(struct ecore_hwfn *p_hwfn,
121 u32 concrete_vfid,
122 u16 opaque_vfid)
123 {
124 struct vf_stop_ramrod_data *p_ramrod = OSAL_NULL;
125 struct ecore_spq_entry *p_ent = OSAL_NULL;
126 struct ecore_sp_init_data init_data;
127 enum _ecore_status_t rc = ECORE_NOTIMPL;
128
129 /* Get SPQ entry */
130 OSAL_MEMSET(&init_data, 0, sizeof(init_data));
131 init_data.cid = ecore_spq_get_cid(p_hwfn);
132 init_data.opaque_fid = opaque_vfid;
133 init_data.comp_mode = ECORE_SPQ_MODE_EBLOCK;
134
135 rc = ecore_sp_init_request(p_hwfn, &p_ent,
136 COMMON_RAMROD_VF_STOP,
137 PROTOCOLID_COMMON, &init_data);
138 if (rc != ECORE_SUCCESS)
139 return rc;
140
141 p_ramrod = &p_ent->ramrod.vf_stop;
142
143 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
144
145 return ecore_spq_post(p_hwfn, p_ent, OSAL_NULL);
146 }
147
148 bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn, int rel_vf_id,
149 bool b_enabled_only)
150 {
151 if (!p_hwfn->pf_iov_info) {
152 DP_NOTICE(p_hwfn->p_dev, true, "No iov info\n");
153 return false;
154 }
155
156 if ((rel_vf_id >= p_hwfn->p_dev->p_iov_info->total_vfs) ||
157 (rel_vf_id < 0))
158 return false;
159
160 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
161 b_enabled_only)
162 return false;
163
164 return true;
165 }
166
167 struct ecore_vf_info *ecore_iov_get_vf_info(struct ecore_hwfn *p_hwfn,
168 u16 relative_vf_id,
169 bool b_enabled_only)
170 {
171 struct ecore_vf_info *vf = OSAL_NULL;
172
173 if (!p_hwfn->pf_iov_info) {
174 DP_NOTICE(p_hwfn->p_dev, true, "No iov info\n");
175 return OSAL_NULL;
176 }
177
178 if (ecore_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
179 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
180 else
181 DP_ERR(p_hwfn, "ecore_iov_get_vf_info: VF[%d] is not enabled\n",
182 relative_vf_id);
183
184 return vf;
185 }
186
187 static bool ecore_iov_validate_rxq(struct ecore_hwfn *p_hwfn,
188 struct ecore_vf_info *p_vf,
189 u16 rx_qid)
190 {
191 if (rx_qid >= p_vf->num_rxqs)
192 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
193 "VF[0x%02x] - can't touch Rx queue[%04x];"
194 " Only 0x%04x are allocated\n",
195 p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
196 return rx_qid < p_vf->num_rxqs;
197 }
198
199 static bool ecore_iov_validate_txq(struct ecore_hwfn *p_hwfn,
200 struct ecore_vf_info *p_vf,
201 u16 tx_qid)
202 {
203 if (tx_qid >= p_vf->num_txqs)
204 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
205 "VF[0x%02x] - can't touch Tx queue[%04x];"
206 " Only 0x%04x are allocated\n",
207 p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
208 return tx_qid < p_vf->num_txqs;
209 }
210
211 static bool ecore_iov_validate_sb(struct ecore_hwfn *p_hwfn,
212 struct ecore_vf_info *p_vf,
213 u16 sb_idx)
214 {
215 int i;
216
217 for (i = 0; i < p_vf->num_sbs; i++)
218 if (p_vf->igu_sbs[i] == sb_idx)
219 return true;
220
221 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
222 "VF[0%02x] - tried using sb_idx %04x which doesn't exist as"
223 " one of its 0x%02x SBs\n",
224 p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
225
226 return false;
227 }
228
229 /* TODO - this is linux crc32; Need a way to ifdef it out for linux */
230 u32 ecore_crc32(u32 crc, u8 *ptr, u32 length)
231 {
232 int i;
233
234 while (length--) {
235 crc ^= *ptr++;
236 for (i = 0; i < 8; i++)
237 crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
238 }
239 return crc;
240 }
241
242 enum _ecore_status_t ecore_iov_post_vf_bulletin(struct ecore_hwfn *p_hwfn,
243 int vfid,
244 struct ecore_ptt *p_ptt)
245 {
246 struct ecore_bulletin_content *p_bulletin;
247 int crc_size = sizeof(p_bulletin->crc);
248 struct ecore_dmae_params params;
249 struct ecore_vf_info *p_vf;
250
251 p_vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
252 if (!p_vf)
253 return ECORE_INVAL;
254
255 /* TODO - check VF is in a state where it can accept message */
256 if (!p_vf->vf_bulletin)
257 return ECORE_INVAL;
258
259 p_bulletin = p_vf->bulletin.p_virt;
260
261 /* Increment bulletin board version and compute crc */
262 p_bulletin->version++;
263 p_bulletin->crc = ecore_crc32(0, (u8 *)p_bulletin + crc_size,
264 p_vf->bulletin.size - crc_size);
265
266 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
267 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
268 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
269
270 /* propagate bulletin board via dmae to vm memory */
271 OSAL_MEMSET(&params, 0, sizeof(params));
272 params.flags = ECORE_DMAE_FLAG_VF_DST;
273 params.dst_vfid = p_vf->abs_vf_id;
274 return ecore_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
275 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
276 &params);
277 }
278
279 static enum _ecore_status_t ecore_iov_pci_cfg_info(struct ecore_dev *p_dev)
280 {
281 struct ecore_hw_sriov_info *iov = p_dev->p_iov_info;
282 int pos = iov->pos;
283
284 DP_VERBOSE(p_dev, ECORE_MSG_IOV, "sriov ext pos %d\n", pos);
285 OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
286
287 OSAL_PCI_READ_CONFIG_WORD(p_dev,
288 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
289 OSAL_PCI_READ_CONFIG_WORD(p_dev,
290 pos + PCI_SRIOV_INITIAL_VF,
291 &iov->initial_vfs);
292
293 OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
294 if (iov->num_vfs) {
295 /* @@@TODO - in future we might want to add an OSAL here to
296 * allow each OS to decide on its own how to act.
297 */
298 DP_VERBOSE(p_dev, ECORE_MSG_IOV,
299 "Number of VFs are already set to non-zero value."
300 " Ignoring PCI configuration value\n");
301 iov->num_vfs = 0;
302 }
303
304 OSAL_PCI_READ_CONFIG_WORD(p_dev,
305 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
306
307 OSAL_PCI_READ_CONFIG_WORD(p_dev,
308 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
309
310 OSAL_PCI_READ_CONFIG_WORD(p_dev,
311 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
312
313 OSAL_PCI_READ_CONFIG_DWORD(p_dev,
314 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
315
316 OSAL_PCI_READ_CONFIG_DWORD(p_dev, pos + PCI_SRIOV_CAP, &iov->cap);
317
318 OSAL_PCI_READ_CONFIG_BYTE(p_dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
319
320 DP_VERBOSE(p_dev, ECORE_MSG_IOV, "IOV info[%d]: nres %d, cap 0x%x,"
321 "ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d,"
322 " stride %d, page size 0x%x\n", 0,
323 /* @@@TBD MichalK - function id */
324 iov->nres, iov->cap, iov->ctrl,
325 iov->total_vfs, iov->initial_vfs, iov->nr_virtfn,
326 iov->offset, iov->stride, iov->pgsz);
327
328 /* Some sanity checks */
329 if (iov->num_vfs > NUM_OF_VFS(p_dev) ||
330 iov->total_vfs > NUM_OF_VFS(p_dev)) {
331 /* This can happen only due to a bug. In this case we set
332 * num_vfs to zero to avoid memory corruption in the code that
333 * assumes max number of vfs
334 */
335 DP_NOTICE(p_dev, false,
336 "IOV: Unexpected number of vfs set: %d"
337 " setting num_vf to zero\n",
338 iov->num_vfs);
339
340 iov->num_vfs = 0;
341 iov->total_vfs = 0;
342 }
343
344 return ECORE_SUCCESS;
345 }
346
347 static void ecore_iov_clear_vf_igu_blocks(struct ecore_hwfn *p_hwfn,
348 struct ecore_ptt *p_ptt)
349 {
350 struct ecore_igu_block *p_sb;
351 u16 sb_id;
352 u32 val;
353
354 if (!p_hwfn->hw_info.p_igu_info) {
355 DP_ERR(p_hwfn,
356 "ecore_iov_clear_vf_igu_blocks IGU Info not inited\n");
357 return;
358 }
359
360 for (sb_id = 0;
361 sb_id < ECORE_MAPPING_MEMORY_SIZE(p_hwfn->p_dev); sb_id++) {
362 p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
363 if ((p_sb->status & ECORE_IGU_STATUS_FREE) &&
364 !(p_sb->status & ECORE_IGU_STATUS_PF)) {
365 val = ecore_rd(p_hwfn, p_ptt,
366 IGU_REG_MAPPING_MEMORY + sb_id * 4);
367 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
368 ecore_wr(p_hwfn, p_ptt,
369 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
370 }
371 }
372 }
373
374 static void ecore_iov_setup_vfdb(struct ecore_hwfn *p_hwfn)
375 {
376 struct ecore_hw_sriov_info *p_iov = p_hwfn->p_dev->p_iov_info;
377 struct ecore_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
378 struct ecore_bulletin_content *p_bulletin_virt;
379 dma_addr_t req_p, rply_p, bulletin_p;
380 union pfvf_tlvs *p_reply_virt_addr;
381 union vfpf_tlvs *p_req_virt_addr;
382 u8 idx = 0;
383
384 OSAL_MEMSET(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
385
386 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
387 req_p = p_iov_info->mbx_msg_phys_addr;
388 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
389 rply_p = p_iov_info->mbx_reply_phys_addr;
390 p_bulletin_virt = p_iov_info->p_bulletins;
391 bulletin_p = p_iov_info->bulletins_phys;
392 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
393 DP_ERR(p_hwfn,
394 "ecore_iov_setup_vfdb called without alloc mem first\n");
395 return;
396 }
397
398 p_iov_info->base_vport_id = 1; /* @@@TBD resource allocation */
399
400 for (idx = 0; idx < p_iov->total_vfs; idx++) {
401 struct ecore_vf_info *vf = &p_iov_info->vfs_array[idx];
402 u32 concrete;
403
404 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
405 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
406 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
407 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
408
409 #ifdef CONFIG_ECORE_SW_CHANNEL
410 vf->vf_mbx.sw_mbx.request_size = sizeof(union vfpf_tlvs);
411 vf->vf_mbx.sw_mbx.mbx_state = VF_PF_WAIT_FOR_START_REQUEST;
412 #endif
413 vf->state = VF_STOPPED;
414 vf->b_init = false;
415
416 vf->bulletin.phys = idx *
417 sizeof(struct ecore_bulletin_content) + bulletin_p;
418 vf->bulletin.p_virt = p_bulletin_virt + idx;
419 vf->bulletin.size = sizeof(struct ecore_bulletin_content);
420
421 vf->relative_vf_id = idx;
422 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
423 concrete = ecore_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
424 vf->concrete_fid = concrete;
425 /* TODO - need to devise a better way of getting opaque */
426 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
427 (vf->abs_vf_id << 8);
428 /* @@TBD MichalK - add base vport_id of VFs to equation */
429 vf->vport_id = p_iov_info->base_vport_id + idx;
430
431 vf->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
432 vf->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
433 }
434 }
435
436 static enum _ecore_status_t ecore_iov_allocate_vfdb(struct ecore_hwfn *p_hwfn)
437 {
438 struct ecore_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
439 void **p_v_addr;
440 u16 num_vfs = 0;
441
442 num_vfs = p_hwfn->p_dev->p_iov_info->total_vfs;
443
444 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
445 "ecore_iov_allocate_vfdb for %d VFs\n", num_vfs);
446
447 /* Allocate PF Mailbox buffer (per-VF) */
448 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
449 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
450 *p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
451 &p_iov_info->mbx_msg_phys_addr,
452 p_iov_info->mbx_msg_size);
453 if (!*p_v_addr)
454 return ECORE_NOMEM;
455
456 /* Allocate PF Mailbox Reply buffer (per-VF) */
457 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
458 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
459 *p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
460 &p_iov_info->mbx_reply_phys_addr,
461 p_iov_info->mbx_reply_size);
462 if (!*p_v_addr)
463 return ECORE_NOMEM;
464
465 p_iov_info->bulletins_size = sizeof(struct ecore_bulletin_content) *
466 num_vfs;
467 p_v_addr = &p_iov_info->p_bulletins;
468 *p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
469 &p_iov_info->bulletins_phys,
470 p_iov_info->bulletins_size);
471 if (!*p_v_addr)
472 return ECORE_NOMEM;
473
474 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
475 "PF's Requests mailbox [%p virt 0x%lx phys], "
476 "Response mailbox [%p virt 0x%lx phys] Bulletinsi"
477 " [%p virt 0x%lx phys]\n",
478 p_iov_info->mbx_msg_virt_addr,
479 (unsigned long)p_iov_info->mbx_msg_phys_addr,
480 p_iov_info->mbx_reply_virt_addr,
481 (unsigned long)p_iov_info->mbx_reply_phys_addr,
482 p_iov_info->p_bulletins,
483 (unsigned long)p_iov_info->bulletins_phys);
484
485 return ECORE_SUCCESS;
486 }
487
488 static void ecore_iov_free_vfdb(struct ecore_hwfn *p_hwfn)
489 {
490 struct ecore_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
491
492 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
493 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
494 p_iov_info->mbx_msg_virt_addr,
495 p_iov_info->mbx_msg_phys_addr,
496 p_iov_info->mbx_msg_size);
497
498 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
499 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
500 p_iov_info->mbx_reply_virt_addr,
501 p_iov_info->mbx_reply_phys_addr,
502 p_iov_info->mbx_reply_size);
503
504 if (p_iov_info->p_bulletins)
505 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
506 p_iov_info->p_bulletins,
507 p_iov_info->bulletins_phys,
508 p_iov_info->bulletins_size);
509 }
510
511 enum _ecore_status_t ecore_iov_alloc(struct ecore_hwfn *p_hwfn)
512 {
513 struct ecore_pf_iov *p_sriov;
514
515 if (!IS_PF_SRIOV(p_hwfn)) {
516 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
517 "No SR-IOV - no need for IOV db\n");
518 return ECORE_SUCCESS;
519 }
520
521 p_sriov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_sriov));
522 if (!p_sriov) {
523 DP_NOTICE(p_hwfn, true,
524 "Failed to allocate `struct ecore_sriov'\n");
525 return ECORE_NOMEM;
526 }
527
528 p_hwfn->pf_iov_info = p_sriov;
529
530 return ecore_iov_allocate_vfdb(p_hwfn);
531 }
532
533 void ecore_iov_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
534 {
535 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
536 return;
537
538 ecore_iov_setup_vfdb(p_hwfn);
539 ecore_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
540 }
541
542 void ecore_iov_free(struct ecore_hwfn *p_hwfn)
543 {
544 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
545 ecore_iov_free_vfdb(p_hwfn);
546 OSAL_FREE(p_hwfn->p_dev, p_hwfn->pf_iov_info);
547 }
548 }
549
550 void ecore_iov_free_hw_info(struct ecore_dev *p_dev)
551 {
552 OSAL_FREE(p_dev, p_dev->p_iov_info);
553 p_dev->p_iov_info = OSAL_NULL;
554 }
555
556 enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn)
557 {
558 struct ecore_dev *p_dev = p_hwfn->p_dev;
559 int pos;
560 enum _ecore_status_t rc;
561
562 if (IS_VF(p_hwfn->p_dev))
563 return ECORE_SUCCESS;
564
565 /* Learn the PCI configuration */
566 pos = OSAL_PCI_FIND_EXT_CAPABILITY(p_hwfn->p_dev,
567 PCI_EXT_CAP_ID_SRIOV);
568 if (!pos) {
569 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "No PCIe IOV support\n");
570 return ECORE_SUCCESS;
571 }
572
573 /* Allocate a new struct for IOV information */
574 /* TODO - can change to VALLOC when its available */
575 p_dev->p_iov_info = OSAL_ZALLOC(p_dev, GFP_KERNEL,
576 sizeof(*p_dev->p_iov_info));
577 if (!p_dev->p_iov_info) {
578 DP_NOTICE(p_hwfn, true,
579 "Can't support IOV due to lack of memory\n");
580 return ECORE_NOMEM;
581 }
582 p_dev->p_iov_info->pos = pos;
583
584 rc = ecore_iov_pci_cfg_info(p_dev);
585 if (rc)
586 return rc;
587
588 /* We want PF IOV to be synonemous with the existence of p_iov_info;
589 * In case the capability is published but there are no VFs, simply
590 * de-allocate the struct.
591 */
592 if (!p_dev->p_iov_info->total_vfs) {
593 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
594 "IOV capabilities, but no VFs are published\n");
595 OSAL_FREE(p_dev, p_dev->p_iov_info);
596 p_dev->p_iov_info = OSAL_NULL;
597 return ECORE_SUCCESS;
598 }
599
600 /* Calculate the first VF index - this is a bit tricky; Basically,
601 * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
602 * after the first engine's VFs.
603 */
604 p_dev->p_iov_info->first_vf_in_pf = p_hwfn->p_dev->p_iov_info->offset +
605 p_hwfn->abs_pf_id - 16;
606 if (ECORE_PATH_ID(p_hwfn))
607 p_dev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
608
609 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
610 "First VF in hwfn 0x%08x\n",
611 p_dev->p_iov_info->first_vf_in_pf);
612
613 return ECORE_SUCCESS;
614 }
615
616 bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid)
617 {
618 /* Check PF supports sriov */
619 if (IS_VF(p_hwfn->p_dev) || !IS_ECORE_SRIOV(p_hwfn->p_dev) ||
620 !IS_PF_SRIOV_ALLOC(p_hwfn))
621 return false;
622
623 /* Check VF validity */
624 if (!ecore_iov_is_valid_vfid(p_hwfn, vfid, true))
625 return false;
626
627 return true;
628 }
629
630 void ecore_iov_set_vf_to_disable(struct ecore_dev *p_dev,
631 u16 rel_vf_id, u8 to_disable)
632 {
633 struct ecore_vf_info *vf;
634 int i;
635
636 for_each_hwfn(p_dev, i) {
637 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
638
639 vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
640 if (!vf)
641 continue;
642
643 vf->to_disable = to_disable;
644 }
645 }
646
647 void ecore_iov_set_vfs_to_disable(struct ecore_dev *p_dev,
648 u8 to_disable)
649 {
650 u16 i;
651
652 if (!IS_ECORE_SRIOV(p_dev))
653 return;
654
655 for (i = 0; i < p_dev->p_iov_info->total_vfs; i++)
656 ecore_iov_set_vf_to_disable(p_dev, i, to_disable);
657 }
658
659 #ifndef LINUX_REMOVE
660 /* @@@TBD Consider taking outside of ecore... */
661 enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn *p_hwfn,
662 u16 vf_id,
663 void *ctx)
664 {
665 enum _ecore_status_t rc = ECORE_SUCCESS;
666 struct ecore_vf_info *vf = ecore_iov_get_vf_info(p_hwfn, vf_id, true);
667
668 if (vf != OSAL_NULL) {
669 vf->ctx = ctx;
670 #ifdef CONFIG_ECORE_SW_CHANNEL
671 vf->vf_mbx.sw_mbx.mbx_state = VF_PF_WAIT_FOR_START_REQUEST;
672 #endif
673 } else {
674 rc = ECORE_UNKNOWN_ERROR;
675 }
676 return rc;
677 }
678 #endif
679
680 static void ecore_iov_vf_pglue_clear_err(struct ecore_hwfn *p_hwfn,
681 struct ecore_ptt *p_ptt,
682 u8 abs_vfid)
683 {
684 ecore_wr(p_hwfn, p_ptt,
685 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
686 1 << (abs_vfid & 0x1f));
687 }
688
689 static void ecore_iov_vf_igu_reset(struct ecore_hwfn *p_hwfn,
690 struct ecore_ptt *p_ptt,
691 struct ecore_vf_info *vf)
692 {
693 int i;
694
695 /* Set VF masks and configuration - pretend */
696 ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
697
698 ecore_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
699
700 /* unpretend */
701 ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
702
703 /* iterate over all queues, clear sb consumer */
704 for (i = 0; i < vf->num_sbs; i++)
705 ecore_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
706 vf->igu_sbs[i],
707 vf->opaque_fid, true);
708 }
709
710 static void ecore_iov_vf_igu_set_int(struct ecore_hwfn *p_hwfn,
711 struct ecore_ptt *p_ptt,
712 struct ecore_vf_info *vf, bool enable)
713 {
714 u32 igu_vf_conf;
715
716 ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
717
718 igu_vf_conf = ecore_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
719
720 if (enable)
721 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
722 else
723 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
724
725 ecore_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
726
727 /* unpretend */
728 ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
729 }
730
731 static enum _ecore_status_t
732 ecore_iov_enable_vf_access(struct ecore_hwfn *p_hwfn,
733 struct ecore_ptt *p_ptt, struct ecore_vf_info *vf)
734 {
735 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
736 enum _ecore_status_t rc;
737
738 if (vf->to_disable)
739 return ECORE_SUCCESS;
740
741 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
742 "Enable internal access for vf %x [abs %x]\n", vf->abs_vf_id,
743 ECORE_VF_ABS_ID(p_hwfn, vf));
744
745 ecore_iov_vf_pglue_clear_err(p_hwfn, p_ptt,
746 ECORE_VF_ABS_ID(p_hwfn, vf));
747
748 ecore_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
749
750 rc = ecore_mcp_config_vf_msix(p_hwfn, p_ptt,
751 vf->abs_vf_id, vf->num_sbs);
752 if (rc != ECORE_SUCCESS)
753 return rc;
754
755 ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
756
757 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
758 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
759
760 ecore_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
761 p_hwfn->hw_info.hw_mode);
762
763 /* unpretend */
764 ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
765
766 vf->state = VF_FREE;
767
768 return rc;
769 }
770
771 /**
772 *
773 * @brief ecore_iov_config_perm_table - configure the permission
774 * zone table.
775 * In E4, queue zone permission table size is 320x9. There
776 * are 320 VF queues for single engine device (256 for dual
777 * engine device), and each entry has the following format:
778 * {Valid, VF[7:0]}
779 * @param p_hwfn
780 * @param p_ptt
781 * @param vf
782 * @param enable
783 */
784 static void ecore_iov_config_perm_table(struct ecore_hwfn *p_hwfn,
785 struct ecore_ptt *p_ptt,
786 struct ecore_vf_info *vf, u8 enable)
787 {
788 u32 reg_addr, val;
789 u16 qzone_id = 0;
790 int qid;
791
792 for (qid = 0; qid < vf->num_rxqs; qid++) {
793 ecore_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
794 &qzone_id);
795
796 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
797 val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
798 ecore_wr(p_hwfn, p_ptt, reg_addr, val);
799 }
800 }
801
802 static void ecore_iov_enable_vf_traffic(struct ecore_hwfn *p_hwfn,
803 struct ecore_ptt *p_ptt,
804 struct ecore_vf_info *vf)
805 {
806 /* Reset vf in IGU - interrupts are still disabled */
807 ecore_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
808
809 ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
810
811 /* Permission Table */
812 ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
813 }
814
815 static u8 ecore_iov_alloc_vf_igu_sbs(struct ecore_hwfn *p_hwfn,
816 struct ecore_ptt *p_ptt,
817 struct ecore_vf_info *vf,
818 u16 num_rx_queues)
819 {
820 struct ecore_igu_block *igu_blocks;
821 int qid = 0, igu_id = 0;
822 u32 val = 0;
823
824 igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
825
826 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
827 num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
828
829 p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
830
831 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
832 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
833 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
834
835 while ((qid < num_rx_queues) &&
836 (igu_id < ECORE_MAPPING_MEMORY_SIZE(p_hwfn->p_dev))) {
837 if (igu_blocks[igu_id].status & ECORE_IGU_STATUS_FREE) {
838 struct cau_sb_entry sb_entry;
839
840 vf->igu_sbs[qid] = (u16)igu_id;
841 igu_blocks[igu_id].status &= ~ECORE_IGU_STATUS_FREE;
842
843 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
844
845 ecore_wr(p_hwfn, p_ptt,
846 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
847 val);
848
849 /* Configure igu sb in CAU which were marked valid */
850 ecore_init_cau_sb_entry(p_hwfn, &sb_entry,
851 p_hwfn->rel_pf_id,
852 vf->abs_vf_id, 1);
853 ecore_dmae_host2grc(p_hwfn, p_ptt,
854 (u64)(osal_uintptr_t)&sb_entry,
855 CAU_REG_SB_VAR_MEMORY +
856 igu_id * sizeof(u64), 2, 0);
857 qid++;
858 }
859 igu_id++;
860 }
861
862 vf->num_sbs = (u8)num_rx_queues;
863
864 return vf->num_sbs;
865 }
866
867 /**
868 *
869 * @brief The function invalidates all the VF entries,
870 * technically this isn't required, but added for
871 * cleaness and ease of debugging incase a VF attempts to
872 * produce an interrupt after it has been taken down.
873 *
874 * @param p_hwfn
875 * @param p_ptt
876 * @param vf
877 */
878 static void ecore_iov_free_vf_igu_sbs(struct ecore_hwfn *p_hwfn,
879 struct ecore_ptt *p_ptt,
880 struct ecore_vf_info *vf)
881 {
882 struct ecore_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
883 int idx, igu_id;
884 u32 addr, val;
885
886 /* Invalidate igu CAM lines and mark them as free */
887 for (idx = 0; idx < vf->num_sbs; idx++) {
888 igu_id = vf->igu_sbs[idx];
889 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
890
891 val = ecore_rd(p_hwfn, p_ptt, addr);
892 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
893 ecore_wr(p_hwfn, p_ptt, addr, val);
894
895 p_info->igu_map.igu_blocks[igu_id].status |=
896 ECORE_IGU_STATUS_FREE;
897
898 p_hwfn->hw_info.p_igu_info->free_blks++;
899 }
900
901 vf->num_sbs = 0;
902 }
903
904 enum _ecore_status_t ecore_iov_init_hw_for_vf(struct ecore_hwfn *p_hwfn,
905 struct ecore_ptt *p_ptt,
906 u16 rel_vf_id, u16 num_rx_queues)
907 {
908 u8 num_of_vf_available_chains = 0;
909 struct ecore_vf_info *vf = OSAL_NULL;
910 enum _ecore_status_t rc = ECORE_SUCCESS;
911 u32 cids;
912 u8 i;
913
914 vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
915 if (!vf) {
916 DP_ERR(p_hwfn, "ecore_iov_init_hw_for_vf : vf is OSAL_NULL\n");
917 return ECORE_UNKNOWN_ERROR;
918 }
919
920 if (vf->b_init) {
921 DP_NOTICE(p_hwfn, true, "VF[%d] is already active.\n",
922 rel_vf_id);
923 return ECORE_INVAL;
924 }
925
926 /* Limit number of queues according to number of CIDs */
927 ecore_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
928 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
929 "VF[%d] - requesting to initialize for 0x%04x queues"
930 " [0x%04x CIDs available]\n",
931 vf->relative_vf_id, num_rx_queues, (u16)cids);
932 num_rx_queues = OSAL_MIN_T(u16, num_rx_queues, ((u16)cids));
933
934 num_of_vf_available_chains = ecore_iov_alloc_vf_igu_sbs(p_hwfn,
935 p_ptt,
936 vf,
937 num_rx_queues);
938 if (num_of_vf_available_chains == 0) {
939 DP_ERR(p_hwfn, "no available igu sbs\n");
940 return ECORE_NOMEM;
941 }
942
943 /* Choose queue number and index ranges */
944 vf->num_rxqs = num_of_vf_available_chains;
945 vf->num_txqs = num_of_vf_available_chains;
946
947 for (i = 0; i < vf->num_rxqs; i++) {
948 u16 queue_id = ecore_int_queue_id_from_sb_id(p_hwfn,
949 vf->igu_sbs[i]);
950
951 if (queue_id > RESC_NUM(p_hwfn, ECORE_L2_QUEUE)) {
952 DP_NOTICE(p_hwfn, true,
953 "VF[%d] will require utilizing of"
954 " out-of-bounds queues - %04x\n",
955 vf->relative_vf_id, queue_id);
956 /* TODO - cleanup the already allocate SBs */
957 return ECORE_INVAL;
958 }
959
960 /* CIDs are per-VF, so no problem having them 0-based. */
961 vf->vf_queues[i].fw_rx_qid = queue_id;
962 vf->vf_queues[i].fw_tx_qid = queue_id;
963 vf->vf_queues[i].fw_cid = i;
964
965 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
966 "VF[%d] - [%d] SB %04x, Tx/Rx queue %04x CID %04x\n",
967 vf->relative_vf_id, i, vf->igu_sbs[i], queue_id, i);
968 }
969
970 rc = ecore_iov_enable_vf_access(p_hwfn, p_ptt, vf);
971
972 if (rc == ECORE_SUCCESS) {
973 vf->b_init = true;
974 p_hwfn->pf_iov_info->active_vfs[vf->relative_vf_id / 64] |=
975 (1ULL << (vf->relative_vf_id % 64));
976
977 if (IS_LEAD_HWFN(p_hwfn))
978 p_hwfn->p_dev->p_iov_info->num_vfs++;
979 }
980
981 return rc;
982 }
983
984 void ecore_iov_set_link(struct ecore_hwfn *p_hwfn,
985 u16 vfid,
986 struct ecore_mcp_link_params *params,
987 struct ecore_mcp_link_state *link,
988 struct ecore_mcp_link_capabilities *p_caps)
989 {
990 struct ecore_vf_info *p_vf = ecore_iov_get_vf_info(p_hwfn, vfid, false);
991 struct ecore_bulletin_content *p_bulletin;
992
993 if (!p_vf)
994 return;
995
996 p_bulletin = p_vf->bulletin.p_virt;
997 p_bulletin->req_autoneg = params->speed.autoneg;
998 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
999 p_bulletin->req_forced_speed = params->speed.forced_speed;
1000 p_bulletin->req_autoneg_pause = params->pause.autoneg;
1001 p_bulletin->req_forced_rx = params->pause.forced_rx;
1002 p_bulletin->req_forced_tx = params->pause.forced_tx;
1003 p_bulletin->req_loopback = params->loopback_mode;
1004
1005 p_bulletin->link_up = link->link_up;
1006 p_bulletin->speed = link->speed;
1007 p_bulletin->full_duplex = link->full_duplex;
1008 p_bulletin->autoneg = link->an;
1009 p_bulletin->autoneg_complete = link->an_complete;
1010 p_bulletin->parallel_detection = link->parallel_detection;
1011 p_bulletin->pfc_enabled = link->pfc_enabled;
1012 p_bulletin->partner_adv_speed = link->partner_adv_speed;
1013 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
1014 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
1015 p_bulletin->partner_adv_pause = link->partner_adv_pause;
1016 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
1017
1018 p_bulletin->capability_speed = p_caps->speed_capabilities;
1019 }
1020
1021 enum _ecore_status_t ecore_iov_release_hw_for_vf(struct ecore_hwfn *p_hwfn,
1022 struct ecore_ptt *p_ptt,
1023 u16 rel_vf_id)
1024 {
1025 struct ecore_mcp_link_capabilities caps;
1026 struct ecore_mcp_link_params params;
1027 struct ecore_mcp_link_state link;
1028 struct ecore_vf_info *vf = OSAL_NULL;
1029
1030 vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
1031 if (!vf) {
1032 DP_ERR(p_hwfn, "ecore_iov_release_hw_for_vf : vf is NULL\n");
1033 return ECORE_UNKNOWN_ERROR;
1034 }
1035
1036 if (vf->bulletin.p_virt)
1037 OSAL_MEMSET(vf->bulletin.p_virt, 0,
1038 sizeof(*vf->bulletin.p_virt));
1039
1040 OSAL_MEMSET(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
1041
1042 /* Get the link configuration back in bulletin so
1043 * that when VFs are re-enabled they get the actual
1044 * link configuration.
1045 */
1046 OSAL_MEMCPY(&params, ecore_mcp_get_link_params(p_hwfn), sizeof(params));
1047 OSAL_MEMCPY(&link, ecore_mcp_get_link_state(p_hwfn), sizeof(link));
1048 OSAL_MEMCPY(&caps, ecore_mcp_get_link_capabilities(p_hwfn),
1049 sizeof(caps));
1050 ecore_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1051
1052 /* Forget the VF's acquisition message */
1053 OSAL_MEMSET(&vf->acquire, 0, sizeof(vf->acquire));
1054
1055 /* disablng interrupts and resetting permission table was done during
1056 * vf-close, however, we could get here without going through vf_close
1057 */
1058 /* Disable Interrupts for VF */
1059 ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
1060
1061 /* Reset Permission table */
1062 ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
1063
1064 vf->num_rxqs = 0;
1065 vf->num_txqs = 0;
1066 ecore_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
1067
1068 if (vf->b_init) {
1069 vf->b_init = false;
1070 p_hwfn->pf_iov_info->active_vfs[vf->relative_vf_id / 64] &=
1071 ~(1ULL << (vf->relative_vf_id / 64));
1072
1073 if (IS_LEAD_HWFN(p_hwfn))
1074 p_hwfn->p_dev->p_iov_info->num_vfs--;
1075 }
1076
1077 return ECORE_SUCCESS;
1078 }
1079
1080 static bool ecore_iov_tlv_supported(u16 tlvtype)
1081 {
1082 return tlvtype > CHANNEL_TLV_NONE && tlvtype < CHANNEL_TLV_MAX;
1083 }
1084
1085 static void ecore_iov_lock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
1086 struct ecore_vf_info *vf, u16 tlv)
1087 {
1088 /* lock the channel */
1089 /* mutex_lock(&vf->op_mutex); @@@TBD MichalK - add lock... */
1090
1091 /* record the locking op */
1092 /* vf->op_current = tlv; @@@TBD MichalK */
1093
1094 /* log the lock */
1095 if (ecore_iov_tlv_supported(tlv))
1096 DP_VERBOSE(p_hwfn,
1097 ECORE_MSG_IOV,
1098 "VF[%d]: vf pf channel locked by %s\n",
1099 vf->abs_vf_id,
1100 ecore_channel_tlvs_string[tlv]);
1101 else
1102 DP_VERBOSE(p_hwfn,
1103 ECORE_MSG_IOV,
1104 "VF[%d]: vf pf channel locked by %04x\n",
1105 vf->abs_vf_id, tlv);
1106 }
1107
1108 static void ecore_iov_unlock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
1109 struct ecore_vf_info *vf,
1110 u16 expected_tlv)
1111 {
1112 /* log the unlock */
1113 if (ecore_iov_tlv_supported(expected_tlv))
1114 DP_VERBOSE(p_hwfn,
1115 ECORE_MSG_IOV,
1116 "VF[%d]: vf pf channel unlocked by %s\n",
1117 vf->abs_vf_id,
1118 ecore_channel_tlvs_string[expected_tlv]);
1119 else
1120 DP_VERBOSE(p_hwfn,
1121 ECORE_MSG_IOV,
1122 "VF[%d]: vf pf channel unlocked by %04x\n",
1123 vf->abs_vf_id, expected_tlv);
1124
1125 /* record the locking op */
1126 /* vf->op_current = CHANNEL_TLV_NONE; */
1127 }
1128
1129 /* place a given tlv on the tlv buffer, continuing current tlv list */
1130 void *ecore_add_tlv(struct ecore_hwfn *p_hwfn,
1131 u8 **offset, u16 type, u16 length)
1132 {
1133 struct channel_tlv *tl = (struct channel_tlv *)*offset;
1134
1135 tl->type = type;
1136 tl->length = length;
1137
1138 /* Offset should keep pointing to next TLV (the end of the last) */
1139 *offset += length;
1140
1141 /* Return a pointer to the start of the added tlv */
1142 return *offset - length;
1143 }
1144
1145 /* list the types and lengths of the tlvs on the buffer */
1146 void ecore_dp_tlv_list(struct ecore_hwfn *p_hwfn, void *tlvs_list)
1147 {
1148 u16 i = 1, total_length = 0;
1149 struct channel_tlv *tlv;
1150
1151 do {
1152 /* cast current tlv list entry to channel tlv header */
1153 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
1154
1155 /* output tlv */
1156 if (ecore_iov_tlv_supported(tlv->type))
1157 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1158 "TLV number %d: type %s, length %d\n",
1159 i, ecore_channel_tlvs_string[tlv->type],
1160 tlv->length);
1161 else
1162 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1163 "TLV number %d: type %d, length %d\n",
1164 i, tlv->type, tlv->length);
1165
1166 if (tlv->type == CHANNEL_TLV_LIST_END)
1167 return;
1168
1169 /* Validate entry - protect against malicious VFs */
1170 if (!tlv->length) {
1171 DP_NOTICE(p_hwfn, false, "TLV of length 0 found\n");
1172 return;
1173 }
1174 total_length += tlv->length;
1175 if (total_length >= sizeof(struct tlv_buffer_size)) {
1176 DP_NOTICE(p_hwfn, false, "TLV ==> Buffer overflow\n");
1177 return;
1178 }
1179
1180 i++;
1181 } while (1);
1182 }
1183
1184 static void ecore_iov_send_response(struct ecore_hwfn *p_hwfn,
1185 struct ecore_ptt *p_ptt,
1186 struct ecore_vf_info *p_vf,
1187 u16 length, u8 status)
1188 {
1189 struct ecore_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1190 struct ecore_dmae_params params;
1191 u8 eng_vf_id;
1192
1193 mbx->reply_virt->default_resp.hdr.status = status;
1194
1195 ecore_dp_tlv_list(p_hwfn, mbx->reply_virt);
1196
1197 #ifdef CONFIG_ECORE_SW_CHANNEL
1198 mbx->sw_mbx.response_size =
1199 length + sizeof(struct channel_list_end_tlv);
1200
1201 if (!p_hwfn->p_dev->b_hw_channel)
1202 return;
1203 #endif
1204
1205 eng_vf_id = p_vf->abs_vf_id;
1206
1207 OSAL_MEMSET(&params, 0, sizeof(struct ecore_dmae_params));
1208 params.flags = ECORE_DMAE_FLAG_VF_DST;
1209 params.dst_vfid = eng_vf_id;
1210
1211 ecore_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1212 mbx->req_virt->first_tlv.reply_address +
1213 sizeof(u64),
1214 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1215 &params);
1216
1217 ecore_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1218 mbx->req_virt->first_tlv.reply_address,
1219 sizeof(u64) / 4, &params);
1220
1221 REG_WR(p_hwfn,
1222 GTT_BAR0_MAP_REG_USDM_RAM +
1223 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
1224 }
1225
1226 static u16 ecore_iov_vport_to_tlv(struct ecore_hwfn *p_hwfn,
1227 enum ecore_iov_vport_update_flag flag)
1228 {
1229 switch (flag) {
1230 case ECORE_IOV_VP_UPDATE_ACTIVATE:
1231 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1232 case ECORE_IOV_VP_UPDATE_VLAN_STRIP:
1233 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1234 case ECORE_IOV_VP_UPDATE_TX_SWITCH:
1235 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1236 case ECORE_IOV_VP_UPDATE_MCAST:
1237 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1238 case ECORE_IOV_VP_UPDATE_ACCEPT_PARAM:
1239 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1240 case ECORE_IOV_VP_UPDATE_RSS:
1241 return CHANNEL_TLV_VPORT_UPDATE_RSS;
1242 case ECORE_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1243 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1244 case ECORE_IOV_VP_UPDATE_SGE_TPA:
1245 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
1246 default:
1247 return 0;
1248 }
1249 }
1250
1251 static u16 ecore_iov_prep_vp_update_resp_tlvs(struct ecore_hwfn *p_hwfn,
1252 struct ecore_vf_info *p_vf,
1253 struct ecore_iov_vf_mbx *p_mbx,
1254 u8 status, u16 tlvs_mask,
1255 u16 tlvs_accepted)
1256 {
1257 struct pfvf_def_resp_tlv *resp;
1258 u16 size, total_len, i;
1259
1260 OSAL_MEMSET(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1261 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1262 size = sizeof(struct pfvf_def_resp_tlv);
1263 total_len = size;
1264
1265 ecore_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1266
1267 /* Prepare response for all extended tlvs if they are found by PF */
1268 for (i = 0; i < ECORE_IOV_VP_UPDATE_MAX; i++) {
1269 if (!(tlvs_mask & (1 << i)))
1270 continue;
1271
1272 resp = ecore_add_tlv(p_hwfn, &p_mbx->offset,
1273 ecore_iov_vport_to_tlv(p_hwfn, i), size);
1274
1275 if (tlvs_accepted & (1 << i))
1276 resp->hdr.status = status;
1277 else
1278 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1279
1280 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1281 "VF[%d] - vport_update resp: TLV %d, status %02x\n",
1282 p_vf->relative_vf_id,
1283 ecore_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1284
1285 total_len += size;
1286 }
1287
1288 ecore_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1289 sizeof(struct channel_list_end_tlv));
1290
1291 return total_len;
1292 }
1293
1294 static void ecore_iov_prepare_resp(struct ecore_hwfn *p_hwfn,
1295 struct ecore_ptt *p_ptt,
1296 struct ecore_vf_info *vf_info,
1297 u16 type, u16 length, u8 status)
1298 {
1299 struct ecore_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1300
1301 mbx->offset = (u8 *)mbx->reply_virt;
1302
1303 ecore_add_tlv(p_hwfn, &mbx->offset, type, length);
1304 ecore_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1305 sizeof(struct channel_list_end_tlv));
1306
1307 ecore_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1308
1309 OSAL_IOV_PF_RESP_TYPE(p_hwfn, vf_info->relative_vf_id, status);
1310 }
1311
1312 struct ecore_public_vf_info
1313 *ecore_iov_get_public_vf_info(struct ecore_hwfn *p_hwfn,
1314 u16 relative_vf_id,
1315 bool b_enabled_only)
1316 {
1317 struct ecore_vf_info *vf = OSAL_NULL;
1318
1319 vf = ecore_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1320 if (!vf)
1321 return OSAL_NULL;
1322
1323 return &vf->p_vf_info;
1324 }
1325
1326 static void ecore_iov_vf_cleanup(struct ecore_hwfn *p_hwfn,
1327 struct ecore_vf_info *p_vf)
1328 {
1329 u32 i;
1330 p_vf->vf_bulletin = 0;
1331 p_vf->vport_instance = 0;
1332 p_vf->configured_features = 0;
1333
1334 /* If VF previously requested less resources, go back to default */
1335 p_vf->num_rxqs = p_vf->num_sbs;
1336 p_vf->num_txqs = p_vf->num_sbs;
1337
1338 p_vf->num_active_rxqs = 0;
1339
1340 for (i = 0; i < ECORE_MAX_VF_CHAINS_PER_PF; i++)
1341 p_vf->vf_queues[i].rxq_active = 0;
1342
1343 OSAL_MEMSET(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
1344 OSAL_MEMSET(&p_vf->acquire, 0, sizeof(p_vf->acquire));
1345 OSAL_IOV_VF_CLEANUP(p_hwfn, p_vf->relative_vf_id);
1346 }
1347
1348 static u8 ecore_iov_vf_mbx_acquire_resc(struct ecore_hwfn *p_hwfn,
1349 struct ecore_ptt *p_ptt,
1350 struct ecore_vf_info *p_vf,
1351 struct vf_pf_resc_request *p_req,
1352 struct pf_vf_resc *p_resp)
1353 {
1354 int i;
1355
1356 /* Queue related information */
1357 p_resp->num_rxqs = p_vf->num_rxqs;
1358 p_resp->num_txqs = p_vf->num_txqs;
1359 p_resp->num_sbs = p_vf->num_sbs;
1360
1361 for (i = 0; i < p_resp->num_sbs; i++) {
1362 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1363 /* TODO - what's this sb_qid field? Is it deprecated?
1364 * or is there an ecore_client that looks at this?
1365 */
1366 p_resp->hw_sbs[i].sb_qid = 0;
1367 }
1368
1369 /* These fields are filled for backward compatibility.
1370 * Unused by modern vfs.
1371 */
1372 for (i = 0; i < p_resp->num_rxqs; i++) {
1373 ecore_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1374 (u16 *)&p_resp->hw_qid[i]);
1375 p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
1376 }
1377
1378 /* Filter related information */
1379 p_resp->num_mac_filters = OSAL_MIN_T(u8, p_vf->num_mac_filters,
1380 p_req->num_mac_filters);
1381 p_resp->num_vlan_filters = OSAL_MIN_T(u8, p_vf->num_vlan_filters,
1382 p_req->num_vlan_filters);
1383
1384 /* This isn't really needed/enforced, but some legacy VFs might depend
1385 * on the correct filling of this field.
1386 */
1387 p_resp->num_mc_filters = ECORE_MAX_MC_ADDRS;
1388
1389 /* Validate sufficient resources for VF */
1390 if (p_resp->num_rxqs < p_req->num_rxqs ||
1391 p_resp->num_txqs < p_req->num_txqs ||
1392 p_resp->num_sbs < p_req->num_sbs ||
1393 p_resp->num_mac_filters < p_req->num_mac_filters ||
1394 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
1395 p_resp->num_mc_filters < p_req->num_mc_filters) {
1396 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1397 "VF[%d] - Insufficient resources: rxq [%02x/%02x]"
1398 " txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x]"
1399 " vlan [%02x/%02x] mc [%02x/%02x]\n",
1400 p_vf->abs_vf_id,
1401 p_req->num_rxqs, p_resp->num_rxqs,
1402 p_req->num_rxqs, p_resp->num_txqs,
1403 p_req->num_sbs, p_resp->num_sbs,
1404 p_req->num_mac_filters, p_resp->num_mac_filters,
1405 p_req->num_vlan_filters, p_resp->num_vlan_filters,
1406 p_req->num_mc_filters, p_resp->num_mc_filters);
1407
1408 /* Some legacy OSes are incapable of correctly handling this
1409 * failure.
1410 */
1411 if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1412 ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1413 (p_vf->acquire.vfdev_info.os_type ==
1414 VFPF_ACQUIRE_OS_WINDOWS))
1415 return PFVF_STATUS_SUCCESS;
1416
1417 return PFVF_STATUS_NO_RESOURCE;
1418 }
1419
1420 return PFVF_STATUS_SUCCESS;
1421 }
1422
1423 static void ecore_iov_vf_mbx_acquire_stats(struct ecore_hwfn *p_hwfn,
1424 struct pfvf_stats_info *p_stats)
1425 {
1426 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1427 OFFSETOF(struct mstorm_vf_zone,
1428 non_trigger.eth_queue_stat);
1429 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1430 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1431 OFFSETOF(struct ustorm_vf_zone,
1432 non_trigger.eth_queue_stat);
1433 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1434 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1435 OFFSETOF(struct pstorm_vf_zone,
1436 non_trigger.eth_queue_stat);
1437 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1438 p_stats->tstats.address = 0;
1439 p_stats->tstats.len = 0;
1440 }
1441
1442 static void ecore_iov_vf_mbx_acquire(struct ecore_hwfn *p_hwfn,
1443 struct ecore_ptt *p_ptt,
1444 struct ecore_vf_info *vf)
1445 {
1446 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1447 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1448 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1449 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
1450 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1451 struct pf_vf_resc *resc = &resp->resc;
1452 enum _ecore_status_t rc;
1453
1454 OSAL_MEMSET(resp, 0, sizeof(*resp));
1455
1456 /* Write the PF version so that VF would know which version
1457 * is supported - might be later overridden. This guarantees that
1458 * VF could recognize legacy PF based on lack of versions in reply.
1459 */
1460 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1461 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1462
1463 /* Validate FW compatibility */
1464 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
1465 if (req->vfdev_info.capabilities &
1466 VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1467 struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
1468
1469 /* This legacy support would need to be removed once
1470 * the major has changed.
1471 */
1472 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
1473
1474 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1475 "VF[%d] is pre-fastpath HSI\n",
1476 vf->abs_vf_id);
1477 p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1478 p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1479 } else {
1480 DP_INFO(p_hwfn,
1481 "VF[%d] needs fastpath HSI %02x.%02x, which is"
1482 " incompatible with loaded FW's faspath"
1483 " HSI %02x.%02x\n",
1484 vf->abs_vf_id,
1485 req->vfdev_info.eth_fp_hsi_major,
1486 req->vfdev_info.eth_fp_hsi_minor,
1487 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1488
1489 goto out;
1490 }
1491 }
1492
1493 /* On 100g PFs, prevent old VFs from loading */
1494 if ((p_hwfn->p_dev->num_hwfns > 1) &&
1495 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1496 DP_INFO(p_hwfn,
1497 "VF[%d] is running an old driver that doesn't support"
1498 " 100g\n",
1499 vf->abs_vf_id);
1500 goto out;
1501 }
1502
1503 #ifndef __EXTRACT__LINUX__
1504 if (OSAL_IOV_VF_ACQUIRE(p_hwfn, vf->relative_vf_id) != ECORE_SUCCESS) {
1505 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1506 goto out;
1507 }
1508 #endif
1509
1510 /* Store the acquire message */
1511 OSAL_MEMCPY(&vf->acquire, req, sizeof(vf->acquire));
1512
1513 vf->opaque_fid = req->vfdev_info.opaque_fid;
1514
1515 vf->vf_bulletin = req->bulletin_addr;
1516 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1517 vf->bulletin.size : req->bulletin_size;
1518
1519 /* fill in pfdev info */
1520 pfdev_info->chip_num = p_hwfn->p_dev->chip_num;
1521 pfdev_info->db_size = 0; /* @@@ TBD MichalK Vf Doorbells */
1522 pfdev_info->indices_per_sb = PIS_PER_SB;
1523
1524 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1525 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1526 if (p_hwfn->p_dev->num_hwfns > 1)
1527 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1528
1529 ecore_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
1530
1531 OSAL_MEMCPY(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr,
1532 ETH_ALEN);
1533
1534 pfdev_info->fw_major = FW_MAJOR_VERSION;
1535 pfdev_info->fw_minor = FW_MINOR_VERSION;
1536 pfdev_info->fw_rev = FW_REVISION_VERSION;
1537 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
1538
1539 /* Incorrect when legacy, but doesn't matter as legacy isn't reading
1540 * this field.
1541 */
1542 pfdev_info->minor_fp_hsi = OSAL_MIN_T(u8, ETH_HSI_VER_MINOR,
1543 req->vfdev_info.eth_fp_hsi_minor);
1544 pfdev_info->os_type = OSAL_IOV_GET_OS_TYPE();
1545 ecore_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver,
1546 OSAL_NULL);
1547
1548 pfdev_info->dev_type = p_hwfn->p_dev->type;
1549 pfdev_info->chip_rev = p_hwfn->p_dev->chip_rev;
1550
1551 /* Fill resources available to VF; Make sure there are enough to
1552 * satisfy the VF's request.
1553 */
1554 vfpf_status = ecore_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1555 &req->resc_request, resc);
1556 if (vfpf_status != PFVF_STATUS_SUCCESS)
1557 goto out;
1558
1559 /* Start the VF in FW */
1560 rc = ecore_sp_vf_start(p_hwfn, vf);
1561 if (rc != ECORE_SUCCESS) {
1562 DP_NOTICE(p_hwfn, true, "Failed to start VF[%02x]\n",
1563 vf->abs_vf_id);
1564 vfpf_status = PFVF_STATUS_FAILURE;
1565 goto out;
1566 }
1567
1568 /* Fill agreed size of bulletin board in response, and post
1569 * an initial image to the bulletin board.
1570 */
1571 resp->bulletin_size = vf->bulletin.size;
1572 ecore_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
1573
1574 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1575 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x,"
1576 " db_size=%d, idx_per_sb=%d, pf_cap=0x%lx\n"
1577 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d,"
1578 " n_vlans-%d, n_mcs-%d\n",
1579 vf->abs_vf_id, resp->pfdev_info.chip_num,
1580 resp->pfdev_info.db_size, resp->pfdev_info.indices_per_sb,
1581 (unsigned long)resp->pfdev_info.capabilities, resc->num_rxqs,
1582 resc->num_txqs, resc->num_sbs, resc->num_mac_filters,
1583 resc->num_vlan_filters, resc->num_mc_filters);
1584
1585 vf->state = VF_ACQUIRED;
1586
1587 out:
1588 /* Prepare Response */
1589 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1590 sizeof(struct pfvf_acquire_resp_tlv),
1591 vfpf_status);
1592 }
1593
1594 static enum _ecore_status_t
1595 __ecore_iov_spoofchk_set(struct ecore_hwfn *p_hwfn,
1596 struct ecore_vf_info *p_vf, bool val)
1597 {
1598 struct ecore_sp_vport_update_params params;
1599 enum _ecore_status_t rc;
1600
1601 if (val == p_vf->spoof_chk) {
1602 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1603 "Spoofchk value[%d] is already configured\n", val);
1604 return ECORE_SUCCESS;
1605 }
1606
1607 OSAL_MEMSET(&params, 0, sizeof(struct ecore_sp_vport_update_params));
1608 params.opaque_fid = p_vf->opaque_fid;
1609 params.vport_id = p_vf->vport_id;
1610 params.update_anti_spoofing_en_flg = 1;
1611 params.anti_spoofing_en = val;
1612
1613 rc = ecore_sp_vport_update(p_hwfn, &params, ECORE_SPQ_MODE_EBLOCK,
1614 OSAL_NULL);
1615 if (rc == ECORE_SUCCESS) {
1616 p_vf->spoof_chk = val;
1617 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1618 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1619 "Spoofchk val[%d] configured\n", val);
1620 } else {
1621 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1622 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1623 val, p_vf->relative_vf_id);
1624 }
1625
1626 return rc;
1627 }
1628
1629 static enum _ecore_status_t
1630 ecore_iov_reconfigure_unicast_vlan(struct ecore_hwfn *p_hwfn,
1631 struct ecore_vf_info *p_vf)
1632 {
1633 struct ecore_filter_ucast filter;
1634 enum _ecore_status_t rc = ECORE_SUCCESS;
1635 int i;
1636
1637 OSAL_MEMSET(&filter, 0, sizeof(filter));
1638 filter.is_rx_filter = 1;
1639 filter.is_tx_filter = 1;
1640 filter.vport_to_add_to = p_vf->vport_id;
1641 filter.opcode = ECORE_FILTER_ADD;
1642
1643 /* Reconfigure vlans */
1644 for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1645 if (!p_vf->shadow_config.vlans[i].used)
1646 continue;
1647
1648 filter.type = ECORE_FILTER_VLAN;
1649 filter.vlan = p_vf->shadow_config.vlans[i].vid;
1650 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1651 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1652 filter.vlan, p_vf->relative_vf_id);
1653 rc = ecore_sp_eth_filter_ucast(p_hwfn,
1654 p_vf->opaque_fid,
1655 &filter,
1656 ECORE_SPQ_MODE_CB,
1657 OSAL_NULL);
1658 if (rc) {
1659 DP_NOTICE(p_hwfn, true,
1660 "Failed to configure VLAN [%04x]"
1661 " to VF [%04x]\n",
1662 filter.vlan, p_vf->relative_vf_id);
1663 break;
1664 }
1665 }
1666
1667 return rc;
1668 }
1669
1670 static enum _ecore_status_t
1671 ecore_iov_reconfigure_unicast_shadow(struct ecore_hwfn *p_hwfn,
1672 struct ecore_vf_info *p_vf, u64 events)
1673 {
1674 enum _ecore_status_t rc = ECORE_SUCCESS;
1675
1676 /*TODO - what about MACs? */
1677
1678 if ((events & (1 << VLAN_ADDR_FORCED)) &&
1679 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1680 rc = ecore_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1681
1682 return rc;
1683 }
1684
1685 static int ecore_iov_configure_vport_forced(struct ecore_hwfn *p_hwfn,
1686 struct ecore_vf_info *p_vf,
1687 u64 events)
1688 {
1689 enum _ecore_status_t rc = ECORE_SUCCESS;
1690 struct ecore_filter_ucast filter;
1691
1692 if (!p_vf->vport_instance)
1693 return ECORE_INVAL;
1694
1695 if (events & (1 << MAC_ADDR_FORCED)) {
1696 /* Since there's no way [currently] of removing the MAC,
1697 * we can always assume this means we need to force it.
1698 */
1699 OSAL_MEMSET(&filter, 0, sizeof(filter));
1700 filter.type = ECORE_FILTER_MAC;
1701 filter.opcode = ECORE_FILTER_REPLACE;
1702 filter.is_rx_filter = 1;
1703 filter.is_tx_filter = 1;
1704 filter.vport_to_add_to = p_vf->vport_id;
1705 OSAL_MEMCPY(filter.mac, p_vf->bulletin.p_virt->mac, ETH_ALEN);
1706
1707 rc = ecore_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1708 &filter,
1709 ECORE_SPQ_MODE_CB, OSAL_NULL);
1710 if (rc) {
1711 DP_NOTICE(p_hwfn, true,
1712 "PF failed to configure MAC for VF\n");
1713 return rc;
1714 }
1715
1716 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1717 }
1718
1719 if (events & (1 << VLAN_ADDR_FORCED)) {
1720 struct ecore_sp_vport_update_params vport_update;
1721 u8 removal;
1722 int i;
1723
1724 OSAL_MEMSET(&filter, 0, sizeof(filter));
1725 filter.type = ECORE_FILTER_VLAN;
1726 filter.is_rx_filter = 1;
1727 filter.is_tx_filter = 1;
1728 filter.vport_to_add_to = p_vf->vport_id;
1729 filter.vlan = p_vf->bulletin.p_virt->pvid;
1730 filter.opcode = filter.vlan ? ECORE_FILTER_REPLACE :
1731 ECORE_FILTER_FLUSH;
1732
1733 /* Send the ramrod */
1734 rc = ecore_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1735 &filter,
1736 ECORE_SPQ_MODE_CB, OSAL_NULL);
1737 if (rc) {
1738 DP_NOTICE(p_hwfn, true,
1739 "PF failed to configure VLAN for VF\n");
1740 return rc;
1741 }
1742
1743 /* Update the default-vlan & silent vlan stripping */
1744 OSAL_MEMSET(&vport_update, 0, sizeof(vport_update));
1745 vport_update.opaque_fid = p_vf->opaque_fid;
1746 vport_update.vport_id = p_vf->vport_id;
1747 vport_update.update_default_vlan_enable_flg = 1;
1748 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1749 vport_update.update_default_vlan_flg = 1;
1750 vport_update.default_vlan = filter.vlan;
1751
1752 vport_update.update_inner_vlan_removal_flg = 1;
1753 removal = filter.vlan ?
1754 1 : p_vf->shadow_config.inner_vlan_removal;
1755 vport_update.inner_vlan_removal_flg = removal;
1756 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1757 rc = ecore_sp_vport_update(p_hwfn, &vport_update,
1758 ECORE_SPQ_MODE_EBLOCK, OSAL_NULL);
1759 if (rc) {
1760 DP_NOTICE(p_hwfn, true,
1761 "PF failed to configure VF vport for vlan\n");
1762 return rc;
1763 }
1764
1765 /* Update all the Rx queues */
1766 for (i = 0; i < ECORE_MAX_VF_CHAINS_PER_PF; i++) {
1767 u16 qid;
1768
1769 if (!p_vf->vf_queues[i].rxq_active)
1770 continue;
1771
1772 qid = p_vf->vf_queues[i].fw_rx_qid;
1773
1774 rc = ecore_sp_eth_rx_queues_update(p_hwfn, qid,
1775 1, 0, 1,
1776 ECORE_SPQ_MODE_EBLOCK,
1777 OSAL_NULL);
1778 if (rc) {
1779 DP_NOTICE(p_hwfn, true,
1780 "Failed to send Rx update"
1781 " fo queue[0x%04x]\n",
1782 qid);
1783 return rc;
1784 }
1785 }
1786
1787 if (filter.vlan)
1788 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1789 else
1790 p_vf->configured_features &= ~(1 << VLAN_ADDR_FORCED);
1791 }
1792
1793 /* If forced features are terminated, we need to configure the shadow
1794 * configuration back again.
1795 */
1796 if (events)
1797 ecore_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1798
1799 return rc;
1800 }
1801
1802 static void ecore_iov_vf_mbx_start_vport(struct ecore_hwfn *p_hwfn,
1803 struct ecore_ptt *p_ptt,
1804 struct ecore_vf_info *vf)
1805 {
1806 struct ecore_sp_vport_start_params params = { 0 };
1807 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1808 struct vfpf_vport_start_tlv *start;
1809 u8 status = PFVF_STATUS_SUCCESS;
1810 struct ecore_vf_info *vf_info;
1811 u64 *p_bitmap;
1812 int sb_id;
1813 enum _ecore_status_t rc;
1814
1815 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vf->relative_vf_id, true);
1816 if (!vf_info) {
1817 DP_NOTICE(p_hwfn->p_dev, true,
1818 "Failed to get VF info, invalid vfid [%d]\n",
1819 vf->relative_vf_id);
1820 return;
1821 }
1822
1823 vf->state = VF_ENABLED;
1824 start = &mbx->req_virt->start_vport;
1825
1826 /* Initialize Status block in CAU */
1827 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1828 if (!start->sb_addr[sb_id]) {
1829 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1830 "VF[%d] did not fill the address of SB %d\n",
1831 vf->relative_vf_id, sb_id);
1832 break;
1833 }
1834
1835 ecore_int_cau_conf_sb(p_hwfn, p_ptt,
1836 start->sb_addr[sb_id],
1837 vf->igu_sbs[sb_id],
1838 vf->abs_vf_id, 1);
1839 }
1840 ecore_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1841
1842 vf->mtu = start->mtu;
1843 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1844
1845 /* Take into consideration configuration forced by hypervisor;
1846 * If none is configured, use the supplied VF values [for old
1847 * vfs that would still be fine, since they passed '0' as padding].
1848 */
1849 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
1850 if (!(*p_bitmap & (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
1851 u8 vf_req = start->only_untagged;
1852
1853 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1854 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1855 }
1856
1857 params.tpa_mode = start->tpa_mode;
1858 params.remove_inner_vlan = start->inner_vlan_removal;
1859 params.tx_switching = true;
1860
1861 #ifndef ASIC_ONLY
1862 if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
1863 DP_NOTICE(p_hwfn, false,
1864 "FPGA: Don't config VF for Tx-switching [no pVFC]\n");
1865 params.tx_switching = false;
1866 }
1867 #endif
1868
1869 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
1870 params.drop_ttl0 = false;
1871 params.concrete_fid = vf->concrete_fid;
1872 params.opaque_fid = vf->opaque_fid;
1873 params.vport_id = vf->vport_id;
1874 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1875 params.mtu = vf->mtu;
1876 params.check_mac = true;
1877
1878 rc = ecore_sp_eth_vport_start(p_hwfn, &params);
1879 if (rc != ECORE_SUCCESS) {
1880 DP_ERR(p_hwfn,
1881 "ecore_iov_vf_mbx_start_vport returned error %d\n", rc);
1882 status = PFVF_STATUS_FAILURE;
1883 } else {
1884 vf->vport_instance++;
1885
1886 /* Force configuration if needed on the newly opened vport */
1887 ecore_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
1888 OSAL_IOV_POST_START_VPORT(p_hwfn, vf->relative_vf_id,
1889 vf->vport_id, vf->opaque_fid);
1890 __ecore_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
1891 }
1892
1893 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1894 sizeof(struct pfvf_def_resp_tlv), status);
1895 }
1896
1897 static void ecore_iov_vf_mbx_stop_vport(struct ecore_hwfn *p_hwfn,
1898 struct ecore_ptt *p_ptt,
1899 struct ecore_vf_info *vf)
1900 {
1901 u8 status = PFVF_STATUS_SUCCESS;
1902 enum _ecore_status_t rc;
1903
1904 vf->vport_instance--;
1905 vf->spoof_chk = false;
1906
1907 rc = ecore_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
1908 if (rc != ECORE_SUCCESS) {
1909 DP_ERR(p_hwfn,
1910 "ecore_iov_vf_mbx_stop_vport returned error %d\n", rc);
1911 status = PFVF_STATUS_FAILURE;
1912 }
1913
1914 /* Forget the configuration on the vport */
1915 vf->configured_features = 0;
1916 OSAL_MEMSET(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1917
1918 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1919 sizeof(struct pfvf_def_resp_tlv), status);
1920 }
1921
1922 static void ecore_iov_vf_mbx_start_rxq_resp(struct ecore_hwfn *p_hwfn,
1923 struct ecore_ptt *p_ptt,
1924 struct ecore_vf_info *vf,
1925 u8 status, bool b_legacy)
1926 {
1927 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1928 struct pfvf_start_queue_resp_tlv *p_tlv;
1929 struct vfpf_start_rxq_tlv *req;
1930 u16 length;
1931
1932 mbx->offset = (u8 *)mbx->reply_virt;
1933
1934 /* Taking a bigger struct instead of adding a TLV to list was a
1935 * mistake, but one which we're now stuck with, as some older
1936 * clients assume the size of the previous response.
1937 */
1938 if (!b_legacy)
1939 length = sizeof(*p_tlv);
1940 else
1941 length = sizeof(struct pfvf_def_resp_tlv);
1942
1943 p_tlv = ecore_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
1944 length);
1945 ecore_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1946 sizeof(struct channel_list_end_tlv));
1947
1948 /* Update the TLV with the response */
1949 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
1950 req = &mbx->req_virt->start_rxq;
1951 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
1952 OFFSETOF(struct mstorm_vf_zone,
1953 non_trigger.eth_rx_queue_producers) +
1954 sizeof(struct eth_rx_prod_data) * req->rx_qid;
1955 }
1956
1957 ecore_iov_send_response(p_hwfn, p_ptt, vf, length, status);
1958 }
1959
1960 static void ecore_iov_vf_mbx_start_rxq(struct ecore_hwfn *p_hwfn,
1961 struct ecore_ptt *p_ptt,
1962 struct ecore_vf_info *vf)
1963 {
1964 struct ecore_queue_start_common_params p_params;
1965 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1966 u8 status = PFVF_STATUS_NO_RESOURCE;
1967 struct vfpf_start_rxq_tlv *req;
1968 bool b_legacy_vf = false;
1969 enum _ecore_status_t rc;
1970
1971 req = &mbx->req_virt->start_rxq;
1972 OSAL_MEMSET(&p_params, 0, sizeof(p_params));
1973 p_params.queue_id = (u8)vf->vf_queues[req->rx_qid].fw_rx_qid;
1974 p_params.vf_qid = req->rx_qid;
1975 p_params.vport_id = vf->vport_id;
1976 p_params.stats_id = vf->abs_vf_id + 0x10,
1977 p_params.sb = req->hw_sb;
1978 p_params.sb_idx = req->sb_index;
1979
1980 if (!ecore_iov_validate_rxq(p_hwfn, vf, req->rx_qid) ||
1981 !ecore_iov_validate_sb(p_hwfn, vf, req->hw_sb))
1982 goto out;
1983
1984 /* Legacy VFs have their Producers in a different location, which they
1985 * calculate on their own and clean the producer prior to this.
1986 */
1987 if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1988 ETH_HSI_VER_NO_PKT_LEN_TUNN)
1989 b_legacy_vf = true;
1990 else
1991 REG_WR(p_hwfn,
1992 GTT_BAR0_MAP_REG_MSDM_RAM +
1993 MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
1994 0);
1995
1996 rc = ecore_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
1997 vf->vf_queues[req->rx_qid].fw_cid,
1998 &p_params,
1999 req->bd_max_bytes,
2000 req->rxq_addr,
2001 req->cqe_pbl_addr,
2002 req->cqe_pbl_size,
2003 b_legacy_vf);
2004
2005 if (rc) {
2006 status = PFVF_STATUS_FAILURE;
2007 } else {
2008 status = PFVF_STATUS_SUCCESS;
2009 vf->vf_queues[req->rx_qid].rxq_active = true;
2010 vf->num_active_rxqs++;
2011 }
2012
2013 out:
2014 ecore_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf,
2015 status, b_legacy_vf);
2016 }
2017
2018 static void ecore_iov_vf_mbx_start_txq_resp(struct ecore_hwfn *p_hwfn,
2019 struct ecore_ptt *p_ptt,
2020 struct ecore_vf_info *p_vf,
2021 u8 status)
2022 {
2023 struct ecore_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2024 struct pfvf_start_queue_resp_tlv *p_tlv;
2025 bool b_legacy = false;
2026 u16 length;
2027
2028 mbx->offset = (u8 *)mbx->reply_virt;
2029
2030 /* Taking a bigger struct instead of adding a TLV to list was a
2031 * mistake, but one which we're now stuck with, as some older
2032 * clients assume the size of the previous response.
2033 */
2034 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2035 ETH_HSI_VER_NO_PKT_LEN_TUNN)
2036 b_legacy = true;
2037
2038 if (!b_legacy)
2039 length = sizeof(*p_tlv);
2040 else
2041 length = sizeof(struct pfvf_def_resp_tlv);
2042
2043 p_tlv = ecore_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
2044 length);
2045 ecore_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2046 sizeof(struct channel_list_end_tlv));
2047
2048 /* Update the TLV with the response */
2049 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
2050 u16 qid = mbx->req_virt->start_txq.tx_qid;
2051
2052 p_tlv->offset = DB_ADDR_VF(p_vf->vf_queues[qid].fw_cid,
2053 DQ_DEMS_LEGACY);
2054 }
2055
2056 ecore_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
2057 }
2058
2059 static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
2060 struct ecore_ptt *p_ptt,
2061 struct ecore_vf_info *vf)
2062 {
2063 struct ecore_queue_start_common_params p_params;
2064 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2065 u8 status = PFVF_STATUS_NO_RESOURCE;
2066 union ecore_qm_pq_params pq_params;
2067 struct vfpf_start_txq_tlv *req;
2068 enum _ecore_status_t rc;
2069
2070 /* Prepare the parameters which would choose the right PQ */
2071 OSAL_MEMSET(&pq_params, 0, sizeof(pq_params));
2072 pq_params.eth.is_vf = 1;
2073 pq_params.eth.vf_id = vf->relative_vf_id;
2074
2075 req = &mbx->req_virt->start_txq;
2076 OSAL_MEMSET(&p_params, 0, sizeof(p_params));
2077 p_params.queue_id = (u8)vf->vf_queues[req->tx_qid].fw_tx_qid;
2078 p_params.vport_id = vf->vport_id;
2079 p_params.stats_id = vf->abs_vf_id + 0x10,
2080 p_params.sb = req->hw_sb;
2081 p_params.sb_idx = req->sb_index;
2082
2083 if (!ecore_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
2084 !ecore_iov_validate_sb(p_hwfn, vf, req->hw_sb))
2085 goto out;
2086
2087 rc = ecore_sp_eth_txq_start_ramrod(
2088 p_hwfn,
2089 vf->opaque_fid,
2090 vf->vf_queues[req->tx_qid].fw_cid,
2091 &p_params,
2092 req->pbl_addr,
2093 req->pbl_size,
2094 &pq_params);
2095
2096 if (rc)
2097 status = PFVF_STATUS_FAILURE;
2098 else {
2099 status = PFVF_STATUS_SUCCESS;
2100 vf->vf_queues[req->tx_qid].txq_active = true;
2101 }
2102
2103 out:
2104 ecore_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
2105 }
2106
2107 static enum _ecore_status_t ecore_iov_vf_stop_rxqs(struct ecore_hwfn *p_hwfn,
2108 struct ecore_vf_info *vf,
2109 u16 rxq_id,
2110 u8 num_rxqs,
2111 bool cqe_completion)
2112 {
2113 enum _ecore_status_t rc = ECORE_SUCCESS;
2114 int qid;
2115
2116 if (rxq_id + num_rxqs > OSAL_ARRAY_SIZE(vf->vf_queues))
2117 return ECORE_INVAL;
2118
2119 for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
2120 if (vf->vf_queues[qid].rxq_active) {
2121 rc = ecore_sp_eth_rx_queue_stop(p_hwfn,
2122 vf->vf_queues[qid].
2123 fw_rx_qid, false,
2124 cqe_completion);
2125
2126 if (rc)
2127 return rc;
2128 }
2129 vf->vf_queues[qid].rxq_active = false;
2130 vf->num_active_rxqs--;
2131 }
2132
2133 return rc;
2134 }
2135
2136 static enum _ecore_status_t ecore_iov_vf_stop_txqs(struct ecore_hwfn *p_hwfn,
2137 struct ecore_vf_info *vf,
2138 u16 txq_id, u8 num_txqs)
2139 {
2140 enum _ecore_status_t rc = ECORE_SUCCESS;
2141 int qid;
2142
2143 if (txq_id + num_txqs > OSAL_ARRAY_SIZE(vf->vf_queues))
2144 return ECORE_INVAL;
2145
2146 for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
2147 if (vf->vf_queues[qid].txq_active) {
2148 rc = ecore_sp_eth_tx_queue_stop(p_hwfn,
2149 vf->vf_queues[qid].
2150 fw_tx_qid);
2151
2152 if (rc)
2153 return rc;
2154 }
2155 vf->vf_queues[qid].txq_active = false;
2156 }
2157 return rc;
2158 }
2159
2160 static void ecore_iov_vf_mbx_stop_rxqs(struct ecore_hwfn *p_hwfn,
2161 struct ecore_ptt *p_ptt,
2162 struct ecore_vf_info *vf)
2163 {
2164 u16 length = sizeof(struct pfvf_def_resp_tlv);
2165 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2166 u8 status = PFVF_STATUS_SUCCESS;
2167 struct vfpf_stop_rxqs_tlv *req;
2168 enum _ecore_status_t rc;
2169
2170 /* We give the option of starting from qid != 0, in this case we
2171 * need to make sure that qid + num_qs doesn't exceed the actual
2172 * amount of queues that exist.
2173 */
2174 req = &mbx->req_virt->stop_rxqs;
2175 rc = ecore_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
2176 req->num_rxqs, req->cqe_completion);
2177 if (rc)
2178 status = PFVF_STATUS_FAILURE;
2179
2180 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2181 length, status);
2182 }
2183
2184 static void ecore_iov_vf_mbx_stop_txqs(struct ecore_hwfn *p_hwfn,
2185 struct ecore_ptt *p_ptt,
2186 struct ecore_vf_info *vf)
2187 {
2188 u16 length = sizeof(struct pfvf_def_resp_tlv);
2189 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2190 u8 status = PFVF_STATUS_SUCCESS;
2191 struct vfpf_stop_txqs_tlv *req;
2192 enum _ecore_status_t rc;
2193
2194 /* We give the option of starting from qid != 0, in this case we
2195 * need to make sure that qid + num_qs doesn't exceed the actual
2196 * amount of queues that exist.
2197 */
2198 req = &mbx->req_virt->stop_txqs;
2199 rc = ecore_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
2200 if (rc)
2201 status = PFVF_STATUS_FAILURE;
2202
2203 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2204 length, status);
2205 }
2206
2207 static void ecore_iov_vf_mbx_update_rxqs(struct ecore_hwfn *p_hwfn,
2208 struct ecore_ptt *p_ptt,
2209 struct ecore_vf_info *vf)
2210 {
2211 u16 length = sizeof(struct pfvf_def_resp_tlv);
2212 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2213 struct vfpf_update_rxq_tlv *req;
2214 u8 status = PFVF_STATUS_SUCCESS;
2215 u8 complete_event_flg;
2216 u8 complete_cqe_flg;
2217 u16 qid;
2218 enum _ecore_status_t rc;
2219 u8 i;
2220
2221 req = &mbx->req_virt->update_rxq;
2222 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
2223 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
2224
2225 for (i = 0; i < req->num_rxqs; i++) {
2226 qid = req->rx_qid + i;
2227
2228 if (!vf->vf_queues[qid].rxq_active) {
2229 DP_NOTICE(p_hwfn, true,
2230 "VF rx_qid = %d isn`t active!\n", qid);
2231 status = PFVF_STATUS_FAILURE;
2232 break;
2233 }
2234
2235 rc = ecore_sp_eth_rx_queues_update(p_hwfn,
2236 vf->vf_queues[qid].fw_rx_qid,
2237 1,
2238 complete_cqe_flg,
2239 complete_event_flg,
2240 ECORE_SPQ_MODE_EBLOCK,
2241 OSAL_NULL);
2242
2243 if (rc) {
2244 status = PFVF_STATUS_FAILURE;
2245 break;
2246 }
2247 }
2248
2249 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
2250 length, status);
2251 }
2252
2253 void *ecore_iov_search_list_tlvs(struct ecore_hwfn *p_hwfn,
2254 void *p_tlvs_list, u16 req_type)
2255 {
2256 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2257 int len = 0;
2258
2259 do {
2260 if (!p_tlv->length) {
2261 DP_NOTICE(p_hwfn, true, "Zero length TLV found\n");
2262 return OSAL_NULL;
2263 }
2264
2265 if (p_tlv->type == req_type) {
2266 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2267 "Extended tlv type %s, length %d found\n",
2268 ecore_channel_tlvs_string[p_tlv->type],
2269 p_tlv->length);
2270 return p_tlv;
2271 }
2272
2273 len += p_tlv->length;
2274 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2275
2276 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2277 DP_NOTICE(p_hwfn, true,
2278 "TLVs has overrun the buffer size\n");
2279 return OSAL_NULL;
2280 }
2281 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
2282
2283 return OSAL_NULL;
2284 }
2285
2286 static void
2287 ecore_iov_vp_update_act_param(struct ecore_hwfn *p_hwfn,
2288 struct ecore_sp_vport_update_params *p_data,
2289 struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2290 {
2291 struct vfpf_vport_update_activate_tlv *p_act_tlv;
2292 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2293
2294 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2295 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2296 if (!p_act_tlv)
2297 return;
2298
2299 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2300 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2301 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2302 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2303 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACTIVATE;
2304 }
2305
2306 static void
2307 ecore_iov_vp_update_vlan_param(struct ecore_hwfn *p_hwfn,
2308 struct ecore_sp_vport_update_params *p_data,
2309 struct ecore_vf_info *p_vf,
2310 struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2311 {
2312 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
2313 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
2314
2315 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
2316 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2317 if (!p_vlan_tlv)
2318 return;
2319
2320 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
2321
2322 /* Ignore the VF request if we're forcing a vlan */
2323 if (!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) {
2324 p_data->update_inner_vlan_removal_flg = 1;
2325 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
2326 }
2327
2328 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_VLAN_STRIP;
2329 }
2330
2331 static void
2332 ecore_iov_vp_update_tx_switch(struct ecore_hwfn *p_hwfn,
2333 struct ecore_sp_vport_update_params *p_data,
2334 struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2335 {
2336 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
2337 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
2338
2339 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
2340 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2341 if (!p_tx_switch_tlv)
2342 return;
2343
2344 #ifndef ASIC_ONLY
2345 if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
2346 DP_NOTICE(p_hwfn, false,
2347 "FPGA: Ignore tx-switching configuration originating"
2348 " from VFs\n");
2349 return;
2350 }
2351 #endif
2352
2353 p_data->update_tx_switching_flg = 1;
2354 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
2355 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_TX_SWITCH;
2356 }
2357
2358 static void
2359 ecore_iov_vp_update_mcast_bin_param(struct ecore_hwfn *p_hwfn,
2360 struct ecore_sp_vport_update_params *p_data,
2361 struct ecore_iov_vf_mbx *p_mbx,
2362 u16 *tlvs_mask)
2363 {
2364 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2365 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2366
2367 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2368 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2369 if (!p_mcast_tlv)
2370 return;
2371
2372 p_data->update_approx_mcast_flg = 1;
2373 OSAL_MEMCPY(p_data->bins, p_mcast_tlv->bins,
2374 sizeof(unsigned long) *
2375 ETH_MULTICAST_MAC_BINS_IN_REGS);
2376 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_MCAST;
2377 }
2378
2379 static void
2380 ecore_iov_vp_update_accept_flag(struct ecore_hwfn *p_hwfn,
2381 struct ecore_sp_vport_update_params *p_data,
2382 struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2383 {
2384 struct ecore_filter_accept_flags *p_flags = &p_data->accept_flags;
2385 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2386 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2387
2388 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2389 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2390 if (!p_accept_tlv)
2391 return;
2392
2393 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2394 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2395 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2396 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2397 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACCEPT_PARAM;
2398 }
2399
2400 static void
2401 ecore_iov_vp_update_accept_any_vlan(struct ecore_hwfn *p_hwfn,
2402 struct ecore_sp_vport_update_params *p_data,
2403 struct ecore_iov_vf_mbx *p_mbx,
2404 u16 *tlvs_mask)
2405 {
2406 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2407 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2408
2409 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2410 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2411 if (!p_accept_any_vlan)
2412 return;
2413
2414 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2415 p_data->update_accept_any_vlan_flg =
2416 p_accept_any_vlan->update_accept_any_vlan_flg;
2417 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2418 }
2419
2420 static void
2421 ecore_iov_vp_update_rss_param(struct ecore_hwfn *p_hwfn,
2422 struct ecore_vf_info *vf,
2423 struct ecore_sp_vport_update_params *p_data,
2424 struct ecore_rss_params *p_rss,
2425 struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2426 {
2427 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2428 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
2429 u16 i, q_idx, max_q_idx;
2430 u16 table_size;
2431
2432 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2433 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2434 if (!p_rss_tlv) {
2435 p_data->rss_params = OSAL_NULL;
2436 return;
2437 }
2438
2439 OSAL_MEMSET(p_rss, 0, sizeof(struct ecore_rss_params));
2440
2441 p_rss->update_rss_config =
2442 !!(p_rss_tlv->update_rss_flags &
2443 VFPF_UPDATE_RSS_CONFIG_FLAG);
2444 p_rss->update_rss_capabilities =
2445 !!(p_rss_tlv->update_rss_flags &
2446 VFPF_UPDATE_RSS_CAPS_FLAG);
2447 p_rss->update_rss_ind_table =
2448 !!(p_rss_tlv->update_rss_flags &
2449 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2450 p_rss->update_rss_key =
2451 !!(p_rss_tlv->update_rss_flags &
2452 VFPF_UPDATE_RSS_KEY_FLAG);
2453
2454 p_rss->rss_enable = p_rss_tlv->rss_enable;
2455 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2456 p_rss->rss_caps = p_rss_tlv->rss_caps;
2457 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
2458 OSAL_MEMCPY(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
2459 sizeof(p_rss->rss_ind_table));
2460 OSAL_MEMCPY(p_rss->rss_key, p_rss_tlv->rss_key,
2461 sizeof(p_rss->rss_key));
2462
2463 table_size = OSAL_MIN_T(u16, OSAL_ARRAY_SIZE(p_rss->rss_ind_table),
2464 (1 << p_rss_tlv->rss_table_size_log));
2465
2466 max_q_idx = OSAL_ARRAY_SIZE(vf->vf_queues);
2467
2468 for (i = 0; i < table_size; i++) {
2469 u16 index = vf->vf_queues[0].fw_rx_qid;
2470
2471 q_idx = p_rss->rss_ind_table[i];
2472 if (q_idx >= max_q_idx)
2473 DP_NOTICE(p_hwfn, true,
2474 "rss_ind_table[%d] = %d,"
2475 " rxq is out of range\n",
2476 i, q_idx);
2477 else if (!vf->vf_queues[q_idx].rxq_active)
2478 DP_NOTICE(p_hwfn, true,
2479 "rss_ind_table[%d] = %d, rxq is not active\n",
2480 i, q_idx);
2481 else
2482 index = vf->vf_queues[q_idx].fw_rx_qid;
2483 p_rss->rss_ind_table[i] = index;
2484 }
2485
2486 p_data->rss_params = p_rss;
2487 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_RSS;
2488 }
2489
2490 static void
2491 ecore_iov_vp_update_sge_tpa_param(struct ecore_hwfn *p_hwfn,
2492 struct ecore_vf_info *vf,
2493 struct ecore_sp_vport_update_params *p_data,
2494 struct ecore_sge_tpa_params *p_sge_tpa,
2495 struct ecore_iov_vf_mbx *p_mbx,
2496 u16 *tlvs_mask)
2497 {
2498 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2499 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2500
2501 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2502 ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2503
2504 if (!p_sge_tpa_tlv) {
2505 p_data->sge_tpa_params = OSAL_NULL;
2506 return;
2507 }
2508
2509 OSAL_MEMSET(p_sge_tpa, 0, sizeof(struct ecore_sge_tpa_params));
2510
2511 p_sge_tpa->update_tpa_en_flg =
2512 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2513 p_sge_tpa->update_tpa_param_flg =
2514 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2515 VFPF_UPDATE_TPA_PARAM_FLAG);
2516
2517 p_sge_tpa->tpa_ipv4_en_flg =
2518 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2519 p_sge_tpa->tpa_ipv6_en_flg =
2520 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2521 p_sge_tpa->tpa_pkt_split_flg =
2522 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2523 p_sge_tpa->tpa_hdr_data_split_flg =
2524 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2525 p_sge_tpa->tpa_gro_consistent_flg =
2526 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2527
2528 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2529 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2530 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2531 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2532 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2533
2534 p_data->sge_tpa_params = p_sge_tpa;
2535
2536 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_SGE_TPA;
2537 }
2538
2539 static void ecore_iov_vf_mbx_vport_update(struct ecore_hwfn *p_hwfn,
2540 struct ecore_ptt *p_ptt,
2541 struct ecore_vf_info *vf)
2542 {
2543 struct ecore_sp_vport_update_params params;
2544 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2545 struct ecore_sge_tpa_params sge_tpa_params;
2546 u16 tlvs_mask = 0, tlvs_accepted = 0;
2547 struct ecore_rss_params rss_params;
2548 u8 status = PFVF_STATUS_SUCCESS;
2549 u16 length;
2550 enum _ecore_status_t rc;
2551
2552 /* Valiate PF can send such a request */
2553 if (!vf->vport_instance) {
2554 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2555 "No VPORT instance available for VF[%d],"
2556 " failing vport update\n",
2557 vf->abs_vf_id);
2558 status = PFVF_STATUS_FAILURE;
2559 goto out;
2560 }
2561
2562 OSAL_MEMSET(&params, 0, sizeof(params));
2563 params.opaque_fid = vf->opaque_fid;
2564 params.vport_id = vf->vport_id;
2565 params.rss_params = OSAL_NULL;
2566
2567 /* Search for extended tlvs list and update values
2568 * from VF in struct ecore_sp_vport_update_params.
2569 */
2570 ecore_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
2571 ecore_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2572 ecore_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
2573 ecore_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2574 ecore_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
2575 ecore_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
2576 mbx, &tlvs_mask);
2577 ecore_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2578 ecore_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2579 &sge_tpa_params, mbx, &tlvs_mask);
2580
2581 /* Just log a message if there is no single extended tlv in buffer.
2582 * When all features of vport update ramrod would be requested by VF
2583 * as extended TLVs in buffer then an error can be returned in response
2584 * if there is no extended TLV present in buffer.
2585 */
2586 tlvs_accepted = tlvs_mask;
2587
2588 #ifndef LINUX_REMOVE
2589 if (OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vf->relative_vf_id,
2590 &params, &tlvs_accepted) !=
2591 ECORE_SUCCESS) {
2592 tlvs_accepted = 0;
2593 status = PFVF_STATUS_NOT_SUPPORTED;
2594 goto out;
2595 }
2596 #endif
2597
2598 if (!tlvs_accepted) {
2599 if (tlvs_mask)
2600 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2601 "Upper-layer prevents said VF"
2602 " configuration\n");
2603 else
2604 DP_NOTICE(p_hwfn, true,
2605 "No feature tlvs found for vport update\n");
2606 status = PFVF_STATUS_NOT_SUPPORTED;
2607 goto out;
2608 }
2609
2610 rc = ecore_sp_vport_update(p_hwfn, &params, ECORE_SPQ_MODE_EBLOCK,
2611 OSAL_NULL);
2612
2613 if (rc)
2614 status = PFVF_STATUS_FAILURE;
2615
2616 out:
2617 length = ecore_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
2618 tlvs_mask, tlvs_accepted);
2619 ecore_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2620 }
2621
2622 static enum _ecore_status_t
2623 ecore_iov_vf_update_vlan_shadow(struct ecore_hwfn *p_hwfn,
2624 struct ecore_vf_info *p_vf,
2625 struct ecore_filter_ucast *p_params)
2626 {
2627 int i;
2628
2629 /* First remove entries and then add new ones */
2630 if (p_params->opcode == ECORE_FILTER_REMOVE) {
2631 for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2632 if (p_vf->shadow_config.vlans[i].used &&
2633 p_vf->shadow_config.vlans[i].vid ==
2634 p_params->vlan) {
2635 p_vf->shadow_config.vlans[i].used = false;
2636 break;
2637 }
2638 if (i == ECORE_ETH_VF_NUM_VLAN_FILTERS + 1) {
2639 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2640 "VF [%d] - Tries to remove a non-existing"
2641 " vlan\n",
2642 p_vf->relative_vf_id);
2643 return ECORE_INVAL;
2644 }
2645 } else if (p_params->opcode == ECORE_FILTER_REPLACE ||
2646 p_params->opcode == ECORE_FILTER_FLUSH) {
2647 for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2648 p_vf->shadow_config.vlans[i].used = false;
2649 }
2650
2651 /* In forced mode, we're willing to remove entries - but we don't add
2652 * new ones.
2653 */
2654 if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
2655 return ECORE_SUCCESS;
2656
2657 if (p_params->opcode == ECORE_FILTER_ADD ||
2658 p_params->opcode == ECORE_FILTER_REPLACE) {
2659 for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2660 if (p_vf->shadow_config.vlans[i].used)
2661 continue;
2662
2663 p_vf->shadow_config.vlans[i].used = true;
2664 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2665 break;
2666 }
2667
2668 if (i == ECORE_ETH_VF_NUM_VLAN_FILTERS + 1) {
2669 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2670 "VF [%d] - Tries to configure more than %d"
2671 " vlan filters\n",
2672 p_vf->relative_vf_id,
2673 ECORE_ETH_VF_NUM_VLAN_FILTERS + 1);
2674 return ECORE_INVAL;
2675 }
2676 }
2677
2678 return ECORE_SUCCESS;
2679 }
2680
2681 static enum _ecore_status_t
2682 ecore_iov_vf_update_mac_shadow(struct ecore_hwfn *p_hwfn,
2683 struct ecore_vf_info *p_vf,
2684 struct ecore_filter_ucast *p_params)
2685 {
2686 char empty_mac[ETH_ALEN];
2687 int i;
2688
2689 OSAL_MEM_ZERO(empty_mac, ETH_ALEN);
2690
2691 /* If we're in forced-mode, we don't allow any change */
2692 /* TODO - this would change if we were ever to implement logic for
2693 * removing a forced MAC altogether [in which case, like for vlans,
2694 * we should be able to re-trace previous configuration.
2695 */
2696 if (p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED))
2697 return ECORE_SUCCESS;
2698
2699 /* First remove entries and then add new ones */
2700 if (p_params->opcode == ECORE_FILTER_REMOVE) {
2701 for (i = 0; i < ECORE_ETH_VF_NUM_MAC_FILTERS; i++) {
2702 if (!OSAL_MEMCMP(p_vf->shadow_config.macs[i],
2703 p_params->mac, ETH_ALEN)) {
2704 OSAL_MEM_ZERO(p_vf->shadow_config.macs[i],
2705 ETH_ALEN);
2706 break;
2707 }
2708 }
2709
2710 if (i == ECORE_ETH_VF_NUM_MAC_FILTERS) {
2711 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2712 "MAC isn't configured\n");
2713 return ECORE_INVAL;
2714 }
2715 } else if (p_params->opcode == ECORE_FILTER_REPLACE ||
2716 p_params->opcode == ECORE_FILTER_FLUSH) {
2717 for (i = 0; i < ECORE_ETH_VF_NUM_MAC_FILTERS; i++)
2718 OSAL_MEM_ZERO(p_vf->shadow_config.macs[i], ETH_ALEN);
2719 }
2720
2721 /* List the new MAC address */
2722 if (p_params->opcode != ECORE_FILTER_ADD &&
2723 p_params->opcode != ECORE_FILTER_REPLACE)
2724 return ECORE_SUCCESS;
2725
2726 for (i = 0; i < ECORE_ETH_VF_NUM_MAC_FILTERS; i++) {
2727 if (!OSAL_MEMCMP(p_vf->shadow_config.macs[i],
2728 empty_mac, ETH_ALEN)) {
2729 OSAL_MEMCPY(p_vf->shadow_config.macs[i],
2730 p_params->mac, ETH_ALEN);
2731 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2732 "Added MAC at %d entry in shadow\n", i);
2733 break;
2734 }
2735 }
2736
2737 if (i == ECORE_ETH_VF_NUM_MAC_FILTERS) {
2738 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2739 "No available place for MAC\n");
2740 return ECORE_INVAL;
2741 }
2742
2743 return ECORE_SUCCESS;
2744 }
2745
2746 static enum _ecore_status_t
2747 ecore_iov_vf_update_unicast_shadow(struct ecore_hwfn *p_hwfn,
2748 struct ecore_vf_info *p_vf,
2749 struct ecore_filter_ucast *p_params)
2750 {
2751 enum _ecore_status_t rc = ECORE_SUCCESS;
2752
2753 if (p_params->type == ECORE_FILTER_MAC) {
2754 rc = ecore_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
2755 if (rc != ECORE_SUCCESS)
2756 return rc;
2757 }
2758
2759 if (p_params->type == ECORE_FILTER_VLAN)
2760 rc = ecore_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
2761
2762 return rc;
2763 }
2764
2765 static void ecore_iov_vf_mbx_ucast_filter(struct ecore_hwfn *p_hwfn,
2766 struct ecore_ptt *p_ptt,
2767 struct ecore_vf_info *vf)
2768 {
2769 struct ecore_bulletin_content *p_bulletin = vf->bulletin.p_virt;
2770 struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2771 struct vfpf_ucast_filter_tlv *req;
2772 u8 status = PFVF_STATUS_SUCCESS;
2773 struct ecore_filter_ucast params;
2774 enum _ecore_status_t rc;
2775
2776 /* Prepare the unicast filter params */
2777 OSAL_MEMSET(&params, 0, sizeof(struct ecore_filter_ucast));
2778 req = &mbx->req_virt->ucast_filter;
2779 params.opcode = (enum ecore_filter_opcode)req->opcode;
2780 params.type = (enum ecore_filter_ucast_type)req->type;
2781
2782 /* @@@TBD - We might need logic on HV side in determining this */
2783 params.is_rx_filter = 1;
2784 params.is_tx_filter = 1;
2785 params.vport_to_remove_from = vf->vport_id;
2786 params.vport_to_add_to = vf->vport_id;
2787 OSAL_MEMCPY(params.mac, req->mac, ETH_ALEN);
2788 params.vlan = req->vlan;
2789
2790 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2791 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x]"
2792 " MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
2793 vf->abs_vf_id, params.opcode, params.type,
2794 params.is_rx_filter ? "RX" : "",
2795 params.is_tx_filter ? "TX" : "",
2796 params.vport_to_add_to,
2797 params.mac[0], params.mac[1], params.mac[2],
2798 params.mac[3], params.mac[4], params.mac[5], params.vlan);
2799
2800 if (!vf->vport_instance) {
2801 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2802 "No VPORT instance available for VF[%d],"
2803 " failing ucast MAC configuration\n",
2804 vf->abs_vf_id);
2805 status = PFVF_STATUS_FAILURE;
2806 goto out;
2807 }
2808
2809 /* Update shadow copy of the VF configuration */
2810 if (ecore_iov_vf_update_unicast_shadow(p_hwfn, vf, &params) !=
2811 ECORE_SUCCESS) {
2812 status = PFVF_STATUS_FAILURE;
2813 goto out;
2814 }
2815
2816 /* Determine if the unicast filtering is acceptible by PF */
2817 if ((p_bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)) &&
2818 (params.type == ECORE_FILTER_VLAN ||
2819 params.type == ECORE_FILTER_MAC_VLAN)) {
2820 /* Once VLAN is forced or PVID is set, do not allow
2821 * to add/replace any further VLANs.
2822 */
2823 if (params.opcode == ECORE_FILTER_ADD ||
2824 params.opcode == ECORE_FILTER_REPLACE)
2825 status = PFVF_STATUS_FORCED;
2826 goto out;
2827 }
2828
2829 if ((p_bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) &&
2830 (params.type == ECORE_FILTER_MAC ||
2831 params.type == ECORE_FILTER_MAC_VLAN)) {
2832 if (OSAL_MEMCMP(p_bulletin->mac, params.mac, ETH_ALEN) ||
2833 (params.opcode != ECORE_FILTER_ADD &&
2834 params.opcode != ECORE_FILTER_REPLACE))
2835 status = PFVF_STATUS_FORCED;
2836 goto out;
2837 }
2838
2839 rc = OSAL_IOV_CHK_UCAST(p_hwfn, vf->relative_vf_id, &params);
2840 if (rc == ECORE_EXISTS) {
2841 goto out;
2842 } else if (rc == ECORE_INVAL) {
2843 status = PFVF_STATUS_FAILURE;
2844 goto out;
2845 }
2846
2847 rc = ecore_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
2848 ECORE_SPQ_MODE_CB, OSAL_NULL);
2849 if (rc)
2850 status = PFVF_STATUS_FAILURE;
2851
2852 out:
2853 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
2854 sizeof(struct pfvf_def_resp_tlv), status);
2855 }
2856
2857 static void ecore_iov_vf_mbx_int_cleanup(struct ecore_hwfn *p_hwfn,
2858 struct ecore_ptt *p_ptt,
2859 struct ecore_vf_info *vf)
2860 {
2861 int i;
2862
2863 /* Reset the SBs */
2864 for (i = 0; i < vf->num_sbs; i++)
2865 ecore_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
2866 vf->igu_sbs[i],
2867 vf->opaque_fid, false);
2868
2869 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
2870 sizeof(struct pfvf_def_resp_tlv),
2871 PFVF_STATUS_SUCCESS);
2872 }
2873
2874 static void ecore_iov_vf_mbx_close(struct ecore_hwfn *p_hwfn,
2875 struct ecore_ptt *p_ptt,
2876 struct ecore_vf_info *vf)
2877 {
2878 u16 length = sizeof(struct pfvf_def_resp_tlv);
2879 u8 status = PFVF_STATUS_SUCCESS;
2880
2881 /* Disable Interrupts for VF */
2882 ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
2883
2884 /* Reset Permission table */
2885 ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
2886
2887 ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
2888 length, status);
2889 }
2890
2891 static void ecore_iov_vf_mbx_release(struct ecore_hwfn *p_hwfn,
2892 struct ecore_ptt *p_ptt,
2893 struct ecore_vf_info *p_vf)
2894 {
2895 u16 length = sizeof(struct pfvf_def_resp_tlv);
2896 u8 status = PFVF_STATUS_SUCCESS;
2897 enum _ecore_status_t rc = ECORE_SUCCESS;
2898
2899 ecore_iov_vf_cleanup(p_hwfn, p_vf);
2900
2901 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
2902 /* Stopping the VF */
2903 rc = ecore_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
2904 p_vf->opaque_fid);
2905
2906 if (rc != ECORE_SUCCESS) {
2907 DP_ERR(p_hwfn, "ecore_sp_vf_stop returned error %d\n",
2908 rc);
2909 status = PFVF_STATUS_FAILURE;
2910 }
2911
2912 p_vf->state = VF_STOPPED;
2913 }
2914
2915 ecore_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
2916 length, status);
2917 }
2918
2919 static enum _ecore_status_t
2920 ecore_iov_vf_flr_poll_dorq(struct ecore_hwfn *p_hwfn,
2921 struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
2922 {
2923 int cnt;
2924 u32 val;
2925
2926 ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_vf->concrete_fid);
2927
2928 for (cnt = 0; cnt < 50; cnt++) {
2929 val = ecore_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
2930 if (!val)
2931 break;
2932 OSAL_MSLEEP(20);
2933 }
2934 ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
2935
2936 if (cnt == 50) {
2937 DP_ERR(p_hwfn,
2938 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
2939 p_vf->abs_vf_id, val);
2940 return ECORE_TIMEOUT;
2941 }
2942
2943 return ECORE_SUCCESS;
2944 }
2945
2946 static enum _ecore_status_t
2947 ecore_iov_vf_flr_poll_pbf(struct ecore_hwfn *p_hwfn,
2948 struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
2949 {
2950 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
2951 int i, cnt;
2952
2953 /* Read initial consumers & producers */
2954 for (i = 0; i < MAX_NUM_VOQS; i++) {
2955 u32 prod;
2956
2957 cons[i] = ecore_rd(p_hwfn, p_ptt,
2958 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2959 i * 0x40);
2960 prod = ecore_rd(p_hwfn, p_ptt,
2961 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
2962 i * 0x40);
2963 distance[i] = prod - cons[i];
2964 }
2965
2966 /* Wait for consumers to pass the producers */
2967 i = 0;
2968 for (cnt = 0; cnt < 50; cnt++) {
2969 for (; i < MAX_NUM_VOQS; i++) {
2970 u32 tmp;
2971
2972 tmp = ecore_rd(p_hwfn, p_ptt,
2973 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2974 i * 0x40);
2975 if (distance[i] > tmp - cons[i])
2976 break;
2977 }
2978
2979 if (i == MAX_NUM_VOQS)
2980 break;
2981
2982 OSAL_MSLEEP(20);
2983 }
2984
2985 if (cnt == 50) {
2986 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
2987 p_vf->abs_vf_id, i);
2988 return ECORE_TIMEOUT;
2989 }
2990
2991 return ECORE_SUCCESS;
2992 }
2993
2994 static enum _ecore_status_t ecore_iov_vf_flr_poll(struct ecore_hwfn *p_hwfn,
2995 struct ecore_vf_info *p_vf,
2996 struct ecore_ptt *p_ptt)
2997 {
2998 enum _ecore_status_t rc;
2999
3000 /* TODO - add SRC and TM polling once we add storage IOV */
3001
3002 rc = ecore_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
3003 if (rc)
3004 return rc;
3005
3006 rc = ecore_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
3007 if (rc)
3008 return rc;
3009
3010 return ECORE_SUCCESS;
3011 }
3012
3013 static enum _ecore_status_t
3014 ecore_iov_execute_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
3015 struct ecore_ptt *p_ptt,
3016 u16 rel_vf_id, u32 *ack_vfs)
3017 {
3018 struct ecore_vf_info *p_vf;
3019 enum _ecore_status_t rc = ECORE_SUCCESS;
3020
3021 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
3022 if (!p_vf)
3023 return ECORE_SUCCESS;
3024
3025 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
3026 (1ULL << (rel_vf_id % 64))) {
3027 u16 vfid = p_vf->abs_vf_id;
3028
3029 /* TODO - should we lock channel? */
3030
3031 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3032 "VF[%d] - Handling FLR\n", vfid);
3033
3034 ecore_iov_vf_cleanup(p_hwfn, p_vf);
3035
3036 /* If VF isn't active, no need for anything but SW */
3037 if (!p_vf->b_init)
3038 goto cleanup;
3039
3040 /* TODO - what to do in case of failure? */
3041 rc = ecore_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
3042 if (rc != ECORE_SUCCESS)
3043 goto cleanup;
3044
3045 rc = ecore_final_cleanup(p_hwfn, p_ptt, vfid, true);
3046 if (rc) {
3047 /* TODO - what's now? What a mess.... */
3048 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
3049 return rc;
3050 }
3051
3052 /* VF_STOPPED has to be set only after final cleanup
3053 * but prior to re-enabling the VF.
3054 */
3055 p_vf->state = VF_STOPPED;
3056
3057 rc = ecore_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
3058 if (rc) {
3059 /* TODO - again, a mess... */
3060 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
3061 vfid);
3062 return rc;
3063 }
3064 cleanup:
3065 /* Mark VF for ack and clean pending state */
3066 if (p_vf->state == VF_RESET)
3067 p_vf->state = VF_STOPPED;
3068 ack_vfs[vfid / 32] |= (1 << (vfid % 32));
3069 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
3070 ~(1ULL << (rel_vf_id % 64));
3071 p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
3072 ~(1ULL << (rel_vf_id % 64));
3073 }
3074
3075 return rc;
3076 }
3077
3078 enum _ecore_status_t ecore_iov_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
3079 struct ecore_ptt *p_ptt)
3080 {
3081 u32 ack_vfs[VF_MAX_STATIC / 32];
3082 enum _ecore_status_t rc = ECORE_SUCCESS;
3083 u16 i;
3084
3085 OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3086
3087 /* Since BRB <-> PRS interface can't be tested as part of the flr
3088 * polling due to HW limitations, simply sleep a bit. And since
3089 * there's no need to wait per-vf, do it before looping.
3090 */
3091 OSAL_MSLEEP(100);
3092
3093 for (i = 0; i < p_hwfn->p_dev->p_iov_info->total_vfs; i++)
3094 ecore_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
3095
3096 rc = ecore_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3097 return rc;
3098 }
3099
3100 enum _ecore_status_t
3101 ecore_iov_single_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
3102 struct ecore_ptt *p_ptt, u16 rel_vf_id)
3103 {
3104 u32 ack_vfs[VF_MAX_STATIC / 32];
3105 enum _ecore_status_t rc = ECORE_SUCCESS;
3106
3107 OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3108
3109 /* Wait instead of polling the BRB <-> PRS interface */
3110 OSAL_MSLEEP(100);
3111
3112 ecore_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, rel_vf_id, ack_vfs);
3113
3114 rc = ecore_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3115 return rc;
3116 }
3117
3118 int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
3119 {
3120 u16 i, found = 0;
3121
3122 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "Marking FLR-ed VFs\n");
3123 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
3124 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3125 "[%08x,...,%08x]: %08x\n",
3126 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
3127
3128 if (!p_hwfn->p_dev->p_iov_info) {
3129 DP_NOTICE(p_hwfn, true, "VF flr but no IOV\n");
3130 return 0;
3131 }
3132
3133 /* Mark VFs */
3134 for (i = 0; i < p_hwfn->p_dev->p_iov_info->total_vfs; i++) {
3135 struct ecore_vf_info *p_vf;
3136 u8 vfid;
3137
3138 p_vf = ecore_iov_get_vf_info(p_hwfn, i, false);
3139 if (!p_vf)
3140 continue;
3141
3142 vfid = p_vf->abs_vf_id;
3143 if ((1 << (vfid % 32)) & p_disabled_vfs[vfid / 32]) {
3144 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
3145 u16 rel_vf_id = p_vf->relative_vf_id;
3146
3147 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3148 "VF[%d] [rel %d] got FLR-ed\n",
3149 vfid, rel_vf_id);
3150
3151 p_vf->state = VF_RESET;
3152
3153 /* No need to lock here, since pending_flr should
3154 * only change here and before ACKing MFw. Since
3155 * MFW will not trigger an additional attention for
3156 * VF flr until ACKs, we're safe.
3157 */
3158 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
3159 found = 1;
3160 }
3161 }
3162
3163 return found;
3164 }
3165
3166 void ecore_iov_get_link(struct ecore_hwfn *p_hwfn,
3167 u16 vfid,
3168 struct ecore_mcp_link_params *p_params,
3169 struct ecore_mcp_link_state *p_link,
3170 struct ecore_mcp_link_capabilities *p_caps)
3171 {
3172 struct ecore_vf_info *p_vf = ecore_iov_get_vf_info(p_hwfn, vfid, false);
3173 struct ecore_bulletin_content *p_bulletin;
3174
3175 if (!p_vf)
3176 return;
3177
3178 p_bulletin = p_vf->bulletin.p_virt;
3179
3180 if (p_params)
3181 __ecore_vf_get_link_params(p_hwfn, p_params, p_bulletin);
3182 if (p_link)
3183 __ecore_vf_get_link_state(p_hwfn, p_link, p_bulletin);
3184 if (p_caps)
3185 __ecore_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
3186 }
3187
3188 void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
3189 struct ecore_ptt *p_ptt, int vfid)
3190 {
3191 struct ecore_iov_vf_mbx *mbx;
3192 struct ecore_vf_info *p_vf;
3193
3194 p_vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3195 if (!p_vf)
3196 return;
3197
3198 mbx = &p_vf->vf_mbx;
3199
3200 /* ecore_iov_process_mbx_request */
3201 DP_VERBOSE(p_hwfn,
3202 ECORE_MSG_IOV,
3203 "VF[%02x]: Processing mailbox message\n", p_vf->abs_vf_id);
3204
3205 mbx->first_tlv = mbx->req_virt->first_tlv;
3206
3207 OSAL_IOV_VF_MSG_TYPE(p_hwfn,
3208 p_vf->relative_vf_id,
3209 mbx->first_tlv.tl.type);
3210
3211 /* Lock the per vf op mutex and note the locker's identity.
3212 * The unlock will take place in mbx response.
3213 */
3214 ecore_iov_lock_vf_pf_channel(p_hwfn,
3215 p_vf, mbx->first_tlv.tl.type);
3216
3217 /* check if tlv type is known */
3218 if (ecore_iov_tlv_supported(mbx->first_tlv.tl.type)) {
3219 /* switch on the opcode */
3220 switch (mbx->first_tlv.tl.type) {
3221 case CHANNEL_TLV_ACQUIRE:
3222 ecore_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
3223 break;
3224 case CHANNEL_TLV_VPORT_START:
3225 ecore_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3226 break;
3227 case CHANNEL_TLV_VPORT_TEARDOWN:
3228 ecore_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3229 break;
3230 case CHANNEL_TLV_START_RXQ:
3231 ecore_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3232 break;
3233 case CHANNEL_TLV_START_TXQ:
3234 ecore_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3235 break;
3236 case CHANNEL_TLV_STOP_RXQS:
3237 ecore_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3238 break;
3239 case CHANNEL_TLV_STOP_TXQS:
3240 ecore_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3241 break;
3242 case CHANNEL_TLV_UPDATE_RXQ:
3243 ecore_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
3244 break;
3245 case CHANNEL_TLV_VPORT_UPDATE:
3246 ecore_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3247 break;
3248 case CHANNEL_TLV_UCAST_FILTER:
3249 ecore_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3250 break;
3251 case CHANNEL_TLV_CLOSE:
3252 ecore_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
3253 break;
3254 case CHANNEL_TLV_INT_CLEANUP:
3255 ecore_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
3256 break;
3257 case CHANNEL_TLV_RELEASE:
3258 ecore_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
3259 break;
3260 }
3261 } else {
3262 /* unknown TLV - this may belong to a VF driver from the future
3263 * - a version written after this PF driver was written, which
3264 * supports features unknown as of yet. Too bad since we don't
3265 * support them. Or this may be because someone wrote a crappy
3266 * VF driver and is sending garbage over the channel.
3267 */
3268 DP_NOTICE(p_hwfn, false,
3269 "VF[%02x]: unknown TLV. type %04x length %04x"
3270 " padding %08x reply address %lu\n",
3271 p_vf->abs_vf_id,
3272 mbx->first_tlv.tl.type,
3273 mbx->first_tlv.tl.length,
3274 mbx->first_tlv.padding,
3275 (unsigned long)mbx->first_tlv.reply_address);
3276
3277 /* Try replying in case reply address matches the acquisition's
3278 * posted address.
3279 */
3280 if (p_vf->acquire.first_tlv.reply_address &&
3281 (mbx->first_tlv.reply_address ==
3282 p_vf->acquire.first_tlv.reply_address))
3283 ecore_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3284 mbx->first_tlv.tl.type,
3285 sizeof(struct pfvf_def_resp_tlv),
3286 PFVF_STATUS_NOT_SUPPORTED);
3287 else
3288 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3289 "VF[%02x]: Can't respond to TLV -"
3290 " no valid reply address\n",
3291 p_vf->abs_vf_id);
3292 }
3293
3294 ecore_iov_unlock_vf_pf_channel(p_hwfn, p_vf,
3295 mbx->first_tlv.tl.type);
3296
3297 #ifdef CONFIG_ECORE_SW_CHANNEL
3298 mbx->sw_mbx.mbx_state = VF_PF_RESPONSE_READY;
3299 mbx->sw_mbx.response_offset = 0;
3300 #endif
3301 }
3302
3303 void ecore_iov_pf_add_pending_events(struct ecore_hwfn *p_hwfn, u8 vfid)
3304 {
3305 u64 add_bit = 1ULL << (vfid % 64);
3306
3307 /* TODO - add locking mechanisms [no atomics in ecore, so we can't
3308 * add the lock inside the ecore_pf_iov struct].
3309 */
3310 p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
3311 }
3312
3313 void ecore_iov_pf_get_and_clear_pending_events(struct ecore_hwfn *p_hwfn,
3314 u64 *events)
3315 {
3316 u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
3317
3318 /* TODO - Take a lock */
3319 OSAL_MEMCPY(events, p_pending_events,
3320 sizeof(u64) * ECORE_VF_ARRAY_LENGTH);
3321 OSAL_MEMSET(p_pending_events, 0,
3322 sizeof(u64) * ECORE_VF_ARRAY_LENGTH);
3323 }
3324
3325 static enum _ecore_status_t ecore_sriov_vfpf_msg(struct ecore_hwfn *p_hwfn,
3326 u16 abs_vfid,
3327 struct regpair *vf_msg)
3328 {
3329 u8 min = (u8)p_hwfn->p_dev->p_iov_info->first_vf_in_pf;
3330 struct ecore_vf_info *p_vf;
3331
3332 if (!ecore_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min)) {
3333 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3334 "Got a message from VF [abs 0x%08x] that cannot be"
3335 " handled by PF\n",
3336 abs_vfid);
3337 return ECORE_SUCCESS;
3338 }
3339 p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)abs_vfid - min];
3340
3341 /* List the physical address of the request so that handler
3342 * could later on copy the message from it.
3343 */
3344 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
3345
3346 return OSAL_PF_VF_MSG(p_hwfn, p_vf->relative_vf_id);
3347 }
3348
3349 enum _ecore_status_t ecore_sriov_eqe_event(struct ecore_hwfn *p_hwfn,
3350 u8 opcode,
3351 __le16 echo,
3352 union event_ring_data *data)
3353 {
3354 switch (opcode) {
3355 case COMMON_EVENT_VF_PF_CHANNEL:
3356 return ecore_sriov_vfpf_msg(p_hwfn, OSAL_LE16_TO_CPU(echo),
3357 &data->vf_pf_channel.msg_addr);
3358 case COMMON_EVENT_VF_FLR:
3359 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3360 "VF-FLR is still not supported\n");
3361 return ECORE_SUCCESS;
3362 default:
3363 DP_INFO(p_hwfn->p_dev, "Unknown sriov eqe event 0x%02x\n",
3364 opcode);
3365 return ECORE_INVAL;
3366 }
3367 }
3368
3369 bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3370 {
3371 return !!(p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
3372 (1ULL << (rel_vf_id % 64)));
3373 }
3374
3375 u16 ecore_iov_get_next_active_vf(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3376 {
3377 struct ecore_hw_sriov_info *p_iov = p_hwfn->p_dev->p_iov_info;
3378 u16 i;
3379
3380 if (!p_iov)
3381 goto out;
3382
3383 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
3384 if (ecore_iov_is_valid_vfid(p_hwfn, rel_vf_id, true))
3385 return i;
3386
3387 out:
3388 return MAX_NUM_VFS;
3389 }
3390
3391 enum _ecore_status_t ecore_iov_copy_vf_msg(struct ecore_hwfn *p_hwfn,
3392 struct ecore_ptt *ptt, int vfid)
3393 {
3394 struct ecore_dmae_params params;
3395 struct ecore_vf_info *vf_info;
3396
3397 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3398 if (!vf_info)
3399 return ECORE_INVAL;
3400
3401 OSAL_MEMSET(&params, 0, sizeof(struct ecore_dmae_params));
3402 params.flags = ECORE_DMAE_FLAG_VF_SRC | ECORE_DMAE_FLAG_COMPLETION_DST;
3403 params.src_vfid = vf_info->abs_vf_id;
3404
3405 if (ecore_dmae_host2host(p_hwfn, ptt,
3406 vf_info->vf_mbx.pending_req,
3407 vf_info->vf_mbx.req_phys,
3408 sizeof(union vfpf_tlvs) / 4, &params)) {
3409 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3410 "Failed to copy message from VF 0x%02x\n", vfid);
3411
3412 return ECORE_IO;
3413 }
3414
3415 return ECORE_SUCCESS;
3416 }
3417
3418 void ecore_iov_bulletin_set_forced_mac(struct ecore_hwfn *p_hwfn,
3419 u8 *mac, int vfid)
3420 {
3421 struct ecore_vf_info *vf_info;
3422 u64 feature;
3423
3424 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3425 if (!vf_info) {
3426 DP_NOTICE(p_hwfn->p_dev, true,
3427 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3428 return;
3429 }
3430
3431 feature = 1 << MAC_ADDR_FORCED;
3432 OSAL_MEMCPY(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3433
3434 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3435 /* Forced MAC will disable MAC_ADDR */
3436 vf_info->bulletin.p_virt->valid_bitmap &=
3437 ~(1 << VFPF_BULLETIN_MAC_ADDR);
3438
3439 ecore_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3440 }
3441
3442 enum _ecore_status_t ecore_iov_bulletin_set_mac(struct ecore_hwfn *p_hwfn,
3443 u8 *mac, int vfid)
3444 {
3445 struct ecore_vf_info *vf_info;
3446 u64 feature;
3447
3448 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3449 if (!vf_info) {
3450 DP_NOTICE(p_hwfn->p_dev, true,
3451 "Can not set MAC, invalid vfid [%d]\n", vfid);
3452 return ECORE_INVAL;
3453 }
3454
3455 if (vf_info->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
3456 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3457 "Can not set MAC, Forced MAC is configured\n");
3458 return ECORE_INVAL;
3459 }
3460
3461 feature = 1 << VFPF_BULLETIN_MAC_ADDR;
3462 OSAL_MEMCPY(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3463
3464 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3465
3466 return ECORE_SUCCESS;
3467 }
3468
3469 enum _ecore_status_t
3470 ecore_iov_bulletin_set_forced_untagged_default(struct ecore_hwfn *p_hwfn,
3471 bool b_untagged_only, int vfid)
3472 {
3473 struct ecore_vf_info *vf_info;
3474 u64 feature;
3475
3476 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3477 if (!vf_info) {
3478 DP_NOTICE(p_hwfn->p_dev, true,
3479 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3480 return ECORE_INVAL;
3481 }
3482
3483 /* Since this is configurable only during vport-start, don't take it
3484 * if we're past that point.
3485 */
3486 if (vf_info->state == VF_ENABLED) {
3487 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3488 "Can't support untagged change for vfid[%d] -"
3489 " VF is already active\n",
3490 vfid);
3491 return ECORE_INVAL;
3492 }
3493
3494 /* Set configuration; This will later be taken into account during the
3495 * VF initialization.
3496 */
3497 feature = (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT) |
3498 (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED);
3499 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3500
3501 vf_info->bulletin.p_virt->default_only_untagged = b_untagged_only ? 1
3502 : 0;
3503
3504 return ECORE_SUCCESS;
3505 }
3506
3507 void ecore_iov_get_vfs_opaque_fid(struct ecore_hwfn *p_hwfn, int vfid,
3508 u16 *opaque_fid)
3509 {
3510 struct ecore_vf_info *vf_info;
3511
3512 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3513 if (!vf_info)
3514 return;
3515
3516 *opaque_fid = vf_info->opaque_fid;
3517 }
3518
3519 void ecore_iov_get_vfs_vport_id(struct ecore_hwfn *p_hwfn, int vfid,
3520 u8 *p_vort_id)
3521 {
3522 struct ecore_vf_info *vf_info;
3523
3524 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3525 if (!vf_info)
3526 return;
3527
3528 *p_vort_id = vf_info->vport_id;
3529 }
3530
3531 void ecore_iov_bulletin_set_forced_vlan(struct ecore_hwfn *p_hwfn,
3532 u16 pvid, int vfid)
3533 {
3534 struct ecore_vf_info *vf_info;
3535 u64 feature;
3536
3537 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3538 if (!vf_info) {
3539 DP_NOTICE(p_hwfn->p_dev, true,
3540 "Can not set forced MAC, invalid vfid [%d]\n",
3541 vfid);
3542 return;
3543 }
3544
3545 feature = 1 << VLAN_ADDR_FORCED;
3546 vf_info->bulletin.p_virt->pvid = pvid;
3547 if (pvid)
3548 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3549 else
3550 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
3551
3552 ecore_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3553 }
3554
3555 bool ecore_iov_vf_has_vport_instance(struct ecore_hwfn *p_hwfn, int vfid)
3556 {
3557 struct ecore_vf_info *p_vf_info;
3558
3559 p_vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3560 if (!p_vf_info)
3561 return false;
3562
3563 return !!p_vf_info->vport_instance;
3564 }
3565
3566 bool ecore_iov_is_vf_stopped(struct ecore_hwfn *p_hwfn, int vfid)
3567 {
3568 struct ecore_vf_info *p_vf_info;
3569
3570 p_vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3571 if (!p_vf_info)
3572 return true;
3573
3574 return p_vf_info->state == VF_STOPPED;
3575 }
3576
3577 bool ecore_iov_spoofchk_get(struct ecore_hwfn *p_hwfn, int vfid)
3578 {
3579 struct ecore_vf_info *vf_info;
3580
3581 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3582 if (!vf_info)
3583 return false;
3584
3585 return vf_info->spoof_chk;
3586 }
3587
3588 enum _ecore_status_t ecore_iov_spoofchk_set(struct ecore_hwfn *p_hwfn,
3589 int vfid, bool val)
3590 {
3591 struct ecore_vf_info *vf;
3592 enum _ecore_status_t rc = ECORE_INVAL;
3593
3594 if (!ecore_iov_pf_sanity_check(p_hwfn, vfid)) {
3595 DP_NOTICE(p_hwfn, true,
3596 "SR-IOV sanity check failed, can't set spoofchk\n");
3597 goto out;
3598 }
3599
3600 vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3601 if (!vf)
3602 goto out;
3603
3604 if (!ecore_iov_vf_has_vport_instance(p_hwfn, vfid)) {
3605 /* After VF VPORT start PF will configure spoof check */
3606 vf->req_spoofchk_val = val;
3607 rc = ECORE_SUCCESS;
3608 goto out;
3609 }
3610
3611 rc = __ecore_iov_spoofchk_set(p_hwfn, vf, val);
3612
3613 out:
3614 return rc;
3615 }
3616
3617 u8 ecore_iov_vf_chains_per_pf(struct ecore_hwfn *p_hwfn)
3618 {
3619 u8 max_chains_per_vf = p_hwfn->hw_info.max_chains_per_vf;
3620
3621 max_chains_per_vf = (max_chains_per_vf) ? max_chains_per_vf
3622 : ECORE_MAX_VF_CHAINS_PER_PF;
3623
3624 return max_chains_per_vf;
3625 }
3626
3627 void ecore_iov_get_vf_req_virt_mbx_params(struct ecore_hwfn *p_hwfn,
3628 u16 rel_vf_id,
3629 void **pp_req_virt_addr,
3630 u16 *p_req_virt_size)
3631 {
3632 struct ecore_vf_info *vf_info =
3633 ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3634
3635 if (!vf_info)
3636 return;
3637
3638 if (pp_req_virt_addr)
3639 *pp_req_virt_addr = vf_info->vf_mbx.req_virt;
3640
3641 if (p_req_virt_size)
3642 *p_req_virt_size = sizeof(*vf_info->vf_mbx.req_virt);
3643 }
3644
3645 void ecore_iov_get_vf_reply_virt_mbx_params(struct ecore_hwfn *p_hwfn,
3646 u16 rel_vf_id,
3647 void **pp_reply_virt_addr,
3648 u16 *p_reply_virt_size)
3649 {
3650 struct ecore_vf_info *vf_info =
3651 ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3652
3653 if (!vf_info)
3654 return;
3655
3656 if (pp_reply_virt_addr)
3657 *pp_reply_virt_addr = vf_info->vf_mbx.reply_virt;
3658
3659 if (p_reply_virt_size)
3660 *p_reply_virt_size = sizeof(*vf_info->vf_mbx.reply_virt);
3661 }
3662
3663 #ifdef CONFIG_ECORE_SW_CHANNEL
3664 struct ecore_iov_sw_mbx *ecore_iov_get_vf_sw_mbx(struct ecore_hwfn *p_hwfn,
3665 u16 rel_vf_id)
3666 {
3667 struct ecore_vf_info *vf_info =
3668 ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3669
3670 if (!vf_info)
3671 return OSAL_NULL;
3672
3673 return &vf_info->vf_mbx.sw_mbx;
3674 }
3675 #endif
3676
3677 bool ecore_iov_is_valid_vfpf_msg_length(u32 length)
3678 {
3679 return (length >= sizeof(struct vfpf_first_tlv) &&
3680 (length <= sizeof(union vfpf_tlvs)));
3681 }
3682
3683 u32 ecore_iov_pfvf_msg_length(void)
3684 {
3685 return sizeof(union pfvf_tlvs);
3686 }
3687
3688 u8 *ecore_iov_bulletin_get_forced_mac(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3689 {
3690 struct ecore_vf_info *p_vf;
3691
3692 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3693 if (!p_vf || !p_vf->bulletin.p_virt)
3694 return OSAL_NULL;
3695
3696 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
3697 return OSAL_NULL;
3698
3699 return p_vf->bulletin.p_virt->mac;
3700 }
3701
3702 u16 ecore_iov_bulletin_get_forced_vlan(struct ecore_hwfn *p_hwfn,
3703 u16 rel_vf_id)
3704 {
3705 struct ecore_vf_info *p_vf;
3706
3707 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3708 if (!p_vf || !p_vf->bulletin.p_virt)
3709 return 0;
3710
3711 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
3712 return 0;
3713
3714 return p_vf->bulletin.p_virt->pvid;
3715 }
3716
3717 enum _ecore_status_t ecore_iov_configure_tx_rate(struct ecore_hwfn *p_hwfn,
3718 struct ecore_ptt *p_ptt,
3719 int vfid, int val)
3720 {
3721 struct ecore_vf_info *vf;
3722 u8 abs_vp_id = 0;
3723 enum _ecore_status_t rc;
3724
3725 vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3726
3727 if (!vf)
3728 return ECORE_INVAL;
3729
3730 rc = ecore_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3731 if (rc != ECORE_SUCCESS)
3732 return rc;
3733
3734 return ecore_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3735 }
3736
3737 enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev,
3738 int vfid, u32 rate)
3739 {
3740 struct ecore_vf_info *vf;
3741 u8 vport_id;
3742 int i;
3743
3744 for_each_hwfn(p_dev, i) {
3745 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
3746
3747 if (!ecore_iov_pf_sanity_check(p_hwfn, vfid)) {
3748 DP_NOTICE(p_hwfn, true,
3749 "SR-IOV sanity check failed,"
3750 " can't set min rate\n");
3751 return ECORE_INVAL;
3752 }
3753 }
3754
3755 vf = ecore_iov_get_vf_info(ECORE_LEADING_HWFN(p_dev), (u16)vfid, true);
3756 vport_id = vf->vport_id;
3757
3758 return ecore_configure_vport_wfq(p_dev, vport_id, rate);
3759 }
3760
3761 enum _ecore_status_t ecore_iov_get_vf_stats(struct ecore_hwfn *p_hwfn,
3762 struct ecore_ptt *p_ptt,
3763 int vfid,
3764 struct ecore_eth_stats *p_stats)
3765 {
3766 struct ecore_vf_info *vf;
3767
3768 vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3769 if (!vf)
3770 return ECORE_INVAL;
3771
3772 if (vf->state != VF_ENABLED)
3773 return ECORE_INVAL;
3774
3775 __ecore_get_vport_stats(p_hwfn, p_ptt, p_stats,
3776 vf->abs_vf_id + 0x10, false);
3777
3778 return ECORE_SUCCESS;
3779 }
3780
3781 u8 ecore_iov_get_vf_num_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3782 {
3783 struct ecore_vf_info *p_vf;
3784
3785 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3786 if (!p_vf)
3787 return 0;
3788
3789 return p_vf->num_rxqs;
3790 }
3791
3792 u8 ecore_iov_get_vf_num_active_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3793 {
3794 struct ecore_vf_info *p_vf;
3795
3796 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3797 if (!p_vf)
3798 return 0;
3799
3800 return p_vf->num_active_rxqs;
3801 }
3802
3803 void *ecore_iov_get_vf_ctx(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3804 {
3805 struct ecore_vf_info *p_vf;
3806
3807 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3808 if (!p_vf)
3809 return OSAL_NULL;
3810
3811 return p_vf->ctx;
3812 }
3813
3814 u8 ecore_iov_get_vf_num_sbs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3815 {
3816 struct ecore_vf_info *p_vf;
3817
3818 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3819 if (!p_vf)
3820 return 0;
3821
3822 return p_vf->num_sbs;
3823 }
3824
3825 bool ecore_iov_is_vf_wait_for_acquire(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3826 {
3827 struct ecore_vf_info *p_vf;
3828
3829 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3830 if (!p_vf)
3831 return false;
3832
3833 return (p_vf->state == VF_FREE);
3834 }
3835
3836 bool ecore_iov_is_vf_acquired_not_initialized(struct ecore_hwfn *p_hwfn,
3837 u16 rel_vf_id)
3838 {
3839 struct ecore_vf_info *p_vf;
3840
3841 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3842 if (!p_vf)
3843 return false;
3844
3845 return (p_vf->state == VF_ACQUIRED);
3846 }
3847
3848 bool ecore_iov_is_vf_initialized(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3849 {
3850 struct ecore_vf_info *p_vf;
3851
3852 p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3853 if (!p_vf)
3854 return false;
3855
3856 return (p_vf->state == VF_ENABLED);
3857 }
3858
3859 int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid)
3860 {
3861 struct ecore_wfq_data *vf_vp_wfq;
3862 struct ecore_vf_info *vf_info;
3863
3864 vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3865 if (!vf_info)
3866 return 0;
3867
3868 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3869
3870 if (vf_vp_wfq->configured)
3871 return vf_vp_wfq->min_speed;
3872 else
3873 return 0;
3874 }
Ceph