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1 /*
2 * Copyright (c) 2016 QLogic Corporation.
3 * All rights reserved.
4 * www.qlogic.com
5 *
6 * See LICENSE.qede_pmd for copyright and licensing details.
7 */
8
9 #ifndef __ETH_COMMON__
10 #define __ETH_COMMON__
11 /********************/
12 /* ETH FW CONSTANTS */
13 /********************/
14
15 /* FP HSI version. FP HSI is compatible if (fwVer.major == drvVer.major &&
16 * fwVer.minor >= drvVer.minor)
17 */
18 /* ETH FP HSI Major version */
19 #define ETH_HSI_VER_MAJOR 3
20 /* ETH FP HSI Minor version */
21 #define ETH_HSI_VER_MINOR 10
22
23 /* Alias for 8.7.x.x/8.8.x.x ETH FP HSI MINOR version. In this version driver
24 * is not required to set pkt_len field in eth_tx_1st_bd struct, and tunneling
25 * offload is not supported.
26 */
27 #define ETH_HSI_VER_NO_PKT_LEN_TUNN 5
28
29 #define ETH_CACHE_LINE_SIZE 64
30 #define ETH_RX_CQE_GAP 32
31 #define ETH_MAX_RAMROD_PER_CON 8
32 #define ETH_TX_BD_PAGE_SIZE_BYTES 4096
33 #define ETH_RX_BD_PAGE_SIZE_BYTES 4096
34 #define ETH_RX_CQE_PAGE_SIZE_BYTES 4096
35 #define ETH_RX_NUM_NEXT_PAGE_BDS 2
36
37 #define ETH_TX_MIN_BDS_PER_NON_LSO_PKT 1
38 #define ETH_TX_MAX_BDS_PER_NON_LSO_PACKET 18
39 #define ETH_TX_MAX_BDS_PER_LSO_PACKET 255
40 #define ETH_TX_MAX_LSO_HDR_NBD 4
41 #define ETH_TX_MIN_BDS_PER_LSO_PKT 3
42 #define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT 3
43 #define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT 2
44 #define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE 2
45 /* (QM_REG_TASKBYTECRDCOST_0, QM_VOQ_BYTE_CRD_TASK_COST) -
46 * (VLAN-TAG + CRC + IPG + PREAMBLE)
47 */
48 #define ETH_TX_MAX_NON_LSO_PKT_LEN (9700 - (4 + 4 + 12 + 8))
49 #define ETH_TX_MAX_LSO_HDR_BYTES 510
50 /* Number of BDs to consider for LSO sliding window restriction is
51 * (ETH_TX_LSO_WINDOW_BDS_NUM - hdr_nbd)
52 */
53 #define ETH_TX_LSO_WINDOW_BDS_NUM (18 - 1)
54 /* Minimum data length (in bytes) in LSO sliding window */
55 #define ETH_TX_LSO_WINDOW_MIN_LEN 9700
56 /* Maximum LSO packet TCP payload length (in bytes) */
57 #define ETH_TX_MAX_LSO_PAYLOAD_LEN 0xFE000
58 /* Number of same-as-last resources in tx switching */
59 #define ETH_TX_NUM_SAME_AS_LAST_ENTRIES 320
60 /* Value for a connection for which same as last feature is disabled */
61 #define ETH_TX_INACTIVE_SAME_AS_LAST 0xFFFF
62
63 /* Maximum number of statistics counters */
64 #define ETH_NUM_STATISTIC_COUNTERS MAX_NUM_VPORTS
65 /* Maximum number of statistics counters when doubled VF zone used */
66 #define ETH_NUM_STATISTIC_COUNTERS_DOUBLE_VF_ZONE \
67 (ETH_NUM_STATISTIC_COUNTERS - MAX_NUM_VFS / 2)
68 /* Maximum number of statistics counters when quad VF zone used */
69 #define ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE \
70 (ETH_NUM_STATISTIC_COUNTERS - 3 * MAX_NUM_VFS / 4)
71
72 /* Maximum number of buffers, used for RX packet placement */
73 #define ETH_RX_MAX_BUFF_PER_PKT 5
74
75 /* num of MAC/VLAN filters */
76 #define ETH_NUM_MAC_FILTERS 512
77 #define ETH_NUM_VLAN_FILTERS 512
78
79 /* approx. multicast constants */
80 /* CRC seed for multicast bin calculation */
81 #define ETH_MULTICAST_BIN_FROM_MAC_SEED 0
82 #define ETH_MULTICAST_MAC_BINS 256
83 #define ETH_MULTICAST_MAC_BINS_IN_REGS (ETH_MULTICAST_MAC_BINS / 32)
84
85 /* ethernet vport update constants */
86 #define ETH_FILTER_RULES_COUNT 10
87 /* number of RSS indirection table entries, per Vport) */
88 #define ETH_RSS_IND_TABLE_ENTRIES_NUM 128
89 /* Length of RSS key (in regs) */
90 #define ETH_RSS_KEY_SIZE_REGS 10
91 /* number of available RSS engines in K2 */
92 #define ETH_RSS_ENGINE_NUM_K2 207
93 /* number of available RSS engines in BB */
94 #define ETH_RSS_ENGINE_NUM_BB 127
95
96 /* TPA constants */
97 /* Maximum number of open TPA aggregations */
98 #define ETH_TPA_MAX_AGGS_NUM 64
99 /* Maximum number of additional buffers, reported by TPA-start CQE */
100 #define ETH_TPA_CQE_START_LEN_LIST_SIZE ETH_RX_MAX_BUFF_PER_PKT
101 /* Maximum number of buffers, reported by TPA-continue CQE */
102 #define ETH_TPA_CQE_CONT_LEN_LIST_SIZE 6
103 /* Maximum number of buffers, reported by TPA-end CQE */
104 #define ETH_TPA_CQE_END_LEN_LIST_SIZE 4
105
106 /* Control frame check constants */
107 /* Number of etherType values configured by driver for control frame check */
108 #define ETH_CTL_FRAME_ETH_TYPE_NUM 4
109
110
111
112 /*
113 * Destination port mode
114 */
115 enum dest_port_mode {
116 DEST_PORT_PHY /* Send to physical port. */,
117 DEST_PORT_LOOPBACK /* Send to loopback port. */,
118 DEST_PORT_PHY_LOOPBACK /* Send to physical and loopback port. */,
119 DEST_PORT_DROP /* Drop the packet in PBF. */,
120 MAX_DEST_PORT_MODE
121 };
122
123
124 /*
125 * Ethernet address type
126 */
127 enum eth_addr_type {
128 BROADCAST_ADDRESS,
129 MULTICAST_ADDRESS,
130 UNICAST_ADDRESS,
131 UNKNOWN_ADDRESS,
132 MAX_ETH_ADDR_TYPE
133 };
134
135
136 struct eth_tx_1st_bd_flags {
137 u8 bitfields;
138 /* Set to 1 in the first BD. (for debug) */
139 #define ETH_TX_1ST_BD_FLAGS_START_BD_MASK 0x1
140 #define ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT 0
141 /* Do not allow additional VLAN manipulations on this packet. */
142 #define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_MASK 0x1
143 #define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_SHIFT 1
144 /* IP checksum recalculation in needed */
145 #define ETH_TX_1ST_BD_FLAGS_IP_CSUM_MASK 0x1
146 #define ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT 2
147 /* TCP/UDP checksum recalculation in needed */
148 #define ETH_TX_1ST_BD_FLAGS_L4_CSUM_MASK 0x1
149 #define ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT 3
150 /* If set, need to add the VLAN in vlan field to the packet. */
151 #define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_MASK 0x1
152 #define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT 4
153 /* If set, this is an LSO packet. */
154 #define ETH_TX_1ST_BD_FLAGS_LSO_MASK 0x1
155 #define ETH_TX_1ST_BD_FLAGS_LSO_SHIFT 5
156 /* Recalculate Tunnel IP Checksum (if Tunnel IP Header is IPv4) */
157 #define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_MASK 0x1
158 #define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT 6
159 /* Recalculate Tunnel UDP/GRE Checksum (Depending on Tunnel Type) */
160 #define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_MASK 0x1
161 #define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT 7
162 };
163
164 /*
165 * The parsing information data for the first tx bd of a given packet.
166 */
167 struct eth_tx_data_1st_bd {
168 __le16 vlan /* VLAN tag to insert to packet (if needed). */;
169 /* Number of BDs in packet. Should be at least 2 in non-LSO packet and at least
170 * 3 in LSO (or Tunnel with IPv6+ext) packet.
171 */
172 u8 nbds;
173 struct eth_tx_1st_bd_flags bd_flags;
174 __le16 bitfields;
175 /* Indicates a tunneled packet. Must be set for encapsulated packet. */
176 #define ETH_TX_DATA_1ST_BD_TUNN_FLAG_MASK 0x1
177 #define ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT 0
178 #define ETH_TX_DATA_1ST_BD_RESERVED0_MASK 0x1
179 #define ETH_TX_DATA_1ST_BD_RESERVED0_SHIFT 1
180 /* Total packet length - must be filled for non-LSO packets. */
181 #define ETH_TX_DATA_1ST_BD_PKT_LEN_MASK 0x3FFF
182 #define ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT 2
183 };
184
185 /*
186 * The parsing information data for the second tx bd of a given packet.
187 */
188 struct eth_tx_data_2nd_bd {
189 /* For tunnel with IPv6+ext - Tunnel header IP datagram length (in BYTEs) */
190 __le16 tunn_ip_size;
191 __le16 bitfields1;
192 /* For Tunnel header with IPv6 ext. - Inner L2 Header Size (in 2-byte WORDs) */
193 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_MASK 0xF
194 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_L2_HDR_SIZE_W_SHIFT 0
195 /* For Tunnel header with IPv6 ext. - Inner L2 Header MAC DA Type
196 * (use enum eth_addr_type)
197 */
198 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_MASK 0x3
199 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_ETH_TYPE_SHIFT 4
200 /* Destination port mode. (use enum dest_port_mode) */
201 #define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_MASK 0x3
202 #define ETH_TX_DATA_2ND_BD_DEST_PORT_MODE_SHIFT 6
203 /* Should be 0 in all the BDs, except the first one. (for debug) */
204 #define ETH_TX_DATA_2ND_BD_START_BD_MASK 0x1
205 #define ETH_TX_DATA_2ND_BD_START_BD_SHIFT 8
206 /* For Tunnel header with IPv6 ext. - Tunnel Type (use enum eth_tx_tunn_type) */
207 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_MASK 0x3
208 #define ETH_TX_DATA_2ND_BD_TUNN_TYPE_SHIFT 9
209 /* For LSO / Tunnel header with IPv6+ext - Set if inner header is IPv6 */
210 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_MASK 0x1
211 #define ETH_TX_DATA_2ND_BD_TUNN_INNER_IPV6_SHIFT 11
212 /* For LSO / Tunnel header with IPv6+ext - Set if outer header has IPv6+ext */
213 #define ETH_TX_DATA_2ND_BD_IPV6_EXT_MASK 0x1
214 #define ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT 12
215 /* Set if Tunnel header has IPv6 ext. (3rd BD is required) */
216 #define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_MASK 0x1
217 #define ETH_TX_DATA_2ND_BD_TUNN_IPV6_EXT_SHIFT 13
218 /* Set if (inner) L4 protocol is UDP. (Required when IPv6+ext (or tunnel with
219 * inner or outer Ipv6+ext) and l4_csum is set)
220 */
221 #define ETH_TX_DATA_2ND_BD_L4_UDP_MASK 0x1
222 #define ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT 14
223 /* The pseudo header checksum type in the L4 checksum field. Required when
224 * IPv6+ext and l4_csum is set. (use enum eth_l4_pseudo_checksum_mode)
225 */
226 #define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_MASK 0x1
227 #define ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT 15
228 __le16 bitfields2;
229 /* For inner/outer header IPv6+ext - (inner) L4 header offset (in 2-byte WORDs).
230 * For regular packet - offset from the beginning of the packet. For tunneled
231 * packet - offset from the beginning of the inner header
232 */
233 #define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK 0x1FFF
234 #define ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT 0
235 #define ETH_TX_DATA_2ND_BD_RESERVED0_MASK 0x7
236 #define ETH_TX_DATA_2ND_BD_RESERVED0_SHIFT 13
237 };
238
239 /*
240 * Firmware data for L2-EDPM packet.
241 */
242 struct eth_edpm_fw_data {
243 /* Parsing information data from the 1st BD. */
244 struct eth_tx_data_1st_bd data_1st_bd;
245 /* Parsing information data from the 2nd BD. */
246 struct eth_tx_data_2nd_bd data_2nd_bd;
247 __le32 reserved;
248 };
249
250
251 /*
252 * FW debug.
253 */
254 struct eth_fast_path_cqe_fw_debug {
255 __le16 reserved2 /* FW reserved. */;
256 };
257
258
259 /*
260 * tunneling parsing flags
261 */
262 struct eth_tunnel_parsing_flags {
263 u8 flags;
264 /* 0 - no tunneling, 1 - GENEVE, 2 - GRE, 3 - VXLAN
265 * (use enum eth_rx_tunn_type)
266 */
267 #define ETH_TUNNEL_PARSING_FLAGS_TYPE_MASK 0x3
268 #define ETH_TUNNEL_PARSING_FLAGS_TYPE_SHIFT 0
269 /* If it s not an encapsulated packet then put 0x0. If it s an encapsulated
270 * packet but the tenant-id doesn t exist then put 0x0. Else put 0x1
271 *
272 */
273 #define ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_MASK 0x1
274 #define ETH_TUNNEL_PARSING_FLAGS_TENNANT_ID_EXIST_SHIFT 2
275 /* Type of the next header above the tunneling: 0 - unknown, 1 - L2, 2 - Ipv4,
276 * 3 - IPv6 (use enum tunnel_next_protocol)
277 */
278 #define ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_MASK 0x3
279 #define ETH_TUNNEL_PARSING_FLAGS_NEXT_PROTOCOL_SHIFT 3
280 /* The result of comparing the DA-ip of the tunnel header. */
281 #define ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_MASK 0x1
282 #define ETH_TUNNEL_PARSING_FLAGS_FIRSTHDRIPMATCH_SHIFT 5
283 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK 0x1
284 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT 6
285 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_MASK 0x1
286 #define ETH_TUNNEL_PARSING_FLAGS_IPV4_OPTIONS_SHIFT 7
287 };
288
289 /*
290 * PMD flow control bits
291 */
292 struct eth_pmd_flow_flags {
293 u8 flags;
294 #define ETH_PMD_FLOW_FLAGS_VALID_MASK 0x1 /* CQE valid bit */
295 #define ETH_PMD_FLOW_FLAGS_VALID_SHIFT 0
296 #define ETH_PMD_FLOW_FLAGS_TOGGLE_MASK 0x1 /* CQE ring toggle bit */
297 #define ETH_PMD_FLOW_FLAGS_TOGGLE_SHIFT 1
298 #define ETH_PMD_FLOW_FLAGS_RESERVED_MASK 0x3F
299 #define ETH_PMD_FLOW_FLAGS_RESERVED_SHIFT 2
300 };
301
302 /*
303 * Regular ETH Rx FP CQE.
304 */
305 struct eth_fast_path_rx_reg_cqe {
306 u8 type /* CQE type */;
307 u8 bitfields;
308 /* Type of calculated RSS hash (use enum rss_hash_type) */
309 #define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_MASK 0x7
310 #define ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE_SHIFT 0
311 /* Traffic Class */
312 #define ETH_FAST_PATH_RX_REG_CQE_TC_MASK 0xF
313 #define ETH_FAST_PATH_RX_REG_CQE_TC_SHIFT 3
314 #define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_MASK 0x1
315 #define ETH_FAST_PATH_RX_REG_CQE_RESERVED0_SHIFT 7
316 __le16 pkt_len /* Total packet length (from the parser) */;
317 /* Parsing and error flags from the parser */
318 struct parsing_and_err_flags pars_flags;
319 __le16 vlan_tag /* 802.1q VLAN tag */;
320 __le32 rss_hash /* RSS hash result */;
321 __le16 len_on_first_bd /* Number of bytes placed on first BD */;
322 u8 placement_offset /* Offset of placement from BD start */;
323 /* Tunnel Parsing Flags */
324 struct eth_tunnel_parsing_flags tunnel_pars_flags;
325 u8 bd_num /* Number of BDs, used for packet */;
326 u8 reserved[9];
327 struct eth_fast_path_cqe_fw_debug fw_debug /* FW reserved. */;
328 u8 reserved1[3];
329 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
330 };
331
332
333 /*
334 * TPA-continue ETH Rx FP CQE.
335 */
336 struct eth_fast_path_rx_tpa_cont_cqe {
337 u8 type /* CQE type */;
338 u8 tpa_agg_index /* TPA aggregation index */;
339 /* List of the segment sizes */
340 __le16 len_list[ETH_TPA_CQE_CONT_LEN_LIST_SIZE];
341 u8 reserved;
342 u8 reserved1 /* FW reserved. */;
343 __le16 reserved2[ETH_TPA_CQE_CONT_LEN_LIST_SIZE] /* FW reserved. */;
344 u8 reserved3[3];
345 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
346 };
347
348
349 /*
350 * TPA-end ETH Rx FP CQE .
351 */
352 struct eth_fast_path_rx_tpa_end_cqe {
353 u8 type /* CQE type */;
354 u8 tpa_agg_index /* TPA aggregation index */;
355 __le16 total_packet_len /* Total aggregated packet length */;
356 u8 num_of_bds /* Total number of BDs comprising the packet */;
357 /* Aggregation end reason. Use enum eth_tpa_end_reason */
358 u8 end_reason;
359 __le16 num_of_coalesced_segs /* Number of coalesced TCP segments */;
360 __le32 ts_delta /* TCP timestamp delta */;
361 /* List of the segment sizes */
362 __le16 len_list[ETH_TPA_CQE_END_LEN_LIST_SIZE];
363 __le16 reserved3[ETH_TPA_CQE_END_LEN_LIST_SIZE] /* FW reserved. */;
364 __le16 reserved1;
365 u8 reserved2 /* FW reserved. */;
366 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
367 };
368
369
370 /*
371 * TPA-start ETH Rx FP CQE.
372 */
373 struct eth_fast_path_rx_tpa_start_cqe {
374 u8 type /* CQE type */;
375 u8 bitfields;
376 /* Type of calculated RSS hash (use enum rss_hash_type) */
377 #define ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_MASK 0x7
378 #define ETH_FAST_PATH_RX_TPA_START_CQE_RSS_HASH_TYPE_SHIFT 0
379 /* Traffic Class */
380 #define ETH_FAST_PATH_RX_TPA_START_CQE_TC_MASK 0xF
381 #define ETH_FAST_PATH_RX_TPA_START_CQE_TC_SHIFT 3
382 #define ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_MASK 0x1
383 #define ETH_FAST_PATH_RX_TPA_START_CQE_RESERVED0_SHIFT 7
384 __le16 seg_len /* Segment length (packetLen from the parser) */;
385 /* Parsing and error flags from the parser */
386 struct parsing_and_err_flags pars_flags;
387 __le16 vlan_tag /* 802.1q VLAN tag */;
388 __le32 rss_hash /* RSS hash result */;
389 __le16 len_on_first_bd /* Number of bytes placed on first BD */;
390 u8 placement_offset /* Offset of placement from BD start */;
391 /* Tunnel Parsing Flags */
392 struct eth_tunnel_parsing_flags tunnel_pars_flags;
393 u8 tpa_agg_index /* TPA aggregation index */;
394 u8 header_len /* Packet L2+L3+L4 header length */;
395 /* Additional BDs length list. */
396 __le16 ext_bd_len_list[ETH_TPA_CQE_START_LEN_LIST_SIZE];
397 struct eth_fast_path_cqe_fw_debug fw_debug /* FW reserved. */;
398 u8 reserved;
399 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
400 };
401
402
403 /*
404 * The L4 pseudo checksum mode for Ethernet
405 */
406 enum eth_l4_pseudo_checksum_mode {
407 /* Pseudo Header checksum on packet is calculated with the correct packet length
408 * field.
409 */
410 ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH,
411 /* Pseudo Header checksum on packet is calculated with zero length field. */
412 ETH_L4_PSEUDO_CSUM_ZERO_LENGTH,
413 MAX_ETH_L4_PSEUDO_CHECKSUM_MODE
414 };
415
416
417
418 struct eth_rx_bd {
419 struct regpair addr /* single continues buffer */;
420 };
421
422
423 /*
424 * regular ETH Rx SP CQE
425 */
426 struct eth_slow_path_rx_cqe {
427 u8 type /* CQE type */;
428 u8 ramrod_cmd_id;
429 u8 error_flag;
430 u8 reserved[25];
431 __le16 echo;
432 u8 reserved1;
433 struct eth_pmd_flow_flags pmd_flags /* CQE valid and toggle bits */;
434 };
435
436 /*
437 * union for all ETH Rx CQE types
438 */
439 union eth_rx_cqe {
440 /* Regular FP CQE */
441 struct eth_fast_path_rx_reg_cqe fast_path_regular;
442 /* TPA-start CQE */
443 struct eth_fast_path_rx_tpa_start_cqe fast_path_tpa_start;
444 /* TPA-continue CQE */
445 struct eth_fast_path_rx_tpa_cont_cqe fast_path_tpa_cont;
446 /* TPA-end CQE */
447 struct eth_fast_path_rx_tpa_end_cqe fast_path_tpa_end;
448 struct eth_slow_path_rx_cqe slow_path /* SP CQE */;
449 };
450
451
452 /*
453 * ETH Rx CQE type
454 */
455 enum eth_rx_cqe_type {
456 ETH_RX_CQE_TYPE_UNUSED,
457 ETH_RX_CQE_TYPE_REGULAR /* Regular FP ETH Rx CQE */,
458 ETH_RX_CQE_TYPE_SLOW_PATH /* Slow path ETH Rx CQE */,
459 ETH_RX_CQE_TYPE_TPA_START /* TPA start ETH Rx CQE */,
460 ETH_RX_CQE_TYPE_TPA_CONT /* TPA Continue ETH Rx CQE */,
461 ETH_RX_CQE_TYPE_TPA_END /* TPA end ETH Rx CQE */,
462 MAX_ETH_RX_CQE_TYPE
463 };
464
465
466 /*
467 * Wrapper for PD RX CQE - used in order to cover full cache line when writing
468 * CQE
469 */
470 struct eth_rx_pmd_cqe {
471 union eth_rx_cqe cqe /* CQE data itself */;
472 u8 reserved[ETH_RX_CQE_GAP];
473 };
474
475
476 /*
477 * Eth RX Tunnel Type
478 */
479 enum eth_rx_tunn_type {
480 ETH_RX_NO_TUNN /* No Tunnel. */,
481 ETH_RX_TUNN_GENEVE /* GENEVE Tunnel. */,
482 ETH_RX_TUNN_GRE /* GRE Tunnel. */,
483 ETH_RX_TUNN_VXLAN /* VXLAN Tunnel. */,
484 MAX_ETH_RX_TUNN_TYPE
485 };
486
487
488
489 /*
490 * Aggregation end reason.
491 */
492 enum eth_tpa_end_reason {
493 ETH_AGG_END_UNUSED,
494 ETH_AGG_END_SP_UPDATE /* SP configuration update */,
495 /* Maximum aggregation length or maximum buffer number used. */
496 ETH_AGG_END_MAX_LEN,
497 /* TCP PSH flag or TCP payload length below continue threshold. */
498 ETH_AGG_END_LAST_SEG,
499 ETH_AGG_END_TIMEOUT /* Timeout expiration. */,
500 /* Packet header not consistency: different IPv4 TOS, TTL or flags, IPv6 TC,
501 * Hop limit or Flow label, TCP header length or TS options. In GRO different
502 * TS value, SMAC, DMAC, ackNum, windowSize or VLAN
503 */
504 ETH_AGG_END_NOT_CONSISTENT,
505 /* Out of order or retransmission packet: sequence, ack or timestamp not
506 * consistent with previous segment.
507 */
508 ETH_AGG_END_OUT_OF_ORDER,
509 /* Next segment cant be aggregated due to LLC/SNAP, IP error, IP fragment, IPv4
510 * options, IPv6 extension, IP ECN = CE, TCP errors, TCP options, zero TCP
511 * payload length , TCP flags or not supported tunnel header options.
512 */
513 ETH_AGG_END_NON_TPA_SEG,
514 MAX_ETH_TPA_END_REASON
515 };
516
517
518
519 /*
520 * The first tx bd of a given packet
521 */
522 struct eth_tx_1st_bd {
523 struct regpair addr /* Single continuous buffer */;
524 __le16 nbytes /* Number of bytes in this BD. */;
525 struct eth_tx_data_1st_bd data /* Parsing information data. */;
526 };
527
528
529
530 /*
531 * The second tx bd of a given packet
532 */
533 struct eth_tx_2nd_bd {
534 struct regpair addr /* Single continuous buffer */;
535 __le16 nbytes /* Number of bytes in this BD. */;
536 struct eth_tx_data_2nd_bd data /* Parsing information data. */;
537 };
538
539
540 /*
541 * The parsing information data for the third tx bd of a given packet.
542 */
543 struct eth_tx_data_3rd_bd {
544 __le16 lso_mss /* For LSO packet - the MSS in bytes. */;
545 __le16 bitfields;
546 /* For LSO with inner/outer IPv6+ext - TCP header length (in 4-byte WORDs) */
547 #define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK 0xF
548 #define ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT 0
549 /* LSO - number of BDs which contain headers. value should be in range
550 * (1..ETH_TX_MAX_LSO_HDR_NBD).
551 */
552 #define ETH_TX_DATA_3RD_BD_HDR_NBD_MASK 0xF
553 #define ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT 4
554 /* Should be 0 in all the BDs, except the first one. (for debug) */
555 #define ETH_TX_DATA_3RD_BD_START_BD_MASK 0x1
556 #define ETH_TX_DATA_3RD_BD_START_BD_SHIFT 8
557 #define ETH_TX_DATA_3RD_BD_RESERVED0_MASK 0x7F
558 #define ETH_TX_DATA_3RD_BD_RESERVED0_SHIFT 9
559 /* For tunnel with IPv6+ext - Pointer to tunnel L4 Header (in 2-byte WORDs) */
560 u8 tunn_l4_hdr_start_offset_w;
561 /* For tunnel with IPv6+ext - Total size of Tunnel Header (in 2-byte WORDs) */
562 u8 tunn_hdr_size_w;
563 };
564
565 /*
566 * The third tx bd of a given packet
567 */
568 struct eth_tx_3rd_bd {
569 struct regpair addr /* Single continuous buffer */;
570 __le16 nbytes /* Number of bytes in this BD. */;
571 struct eth_tx_data_3rd_bd data /* Parsing information data. */;
572 };
573
574
575 /*
576 * Complementary information for the regular tx bd of a given packet.
577 */
578 struct eth_tx_data_bd {
579 __le16 reserved0;
580 __le16 bitfields;
581 #define ETH_TX_DATA_BD_RESERVED1_MASK 0xFF
582 #define ETH_TX_DATA_BD_RESERVED1_SHIFT 0
583 /* Should be 0 in all the BDs, except the first one. (for debug) */
584 #define ETH_TX_DATA_BD_START_BD_MASK 0x1
585 #define ETH_TX_DATA_BD_START_BD_SHIFT 8
586 #define ETH_TX_DATA_BD_RESERVED2_MASK 0x7F
587 #define ETH_TX_DATA_BD_RESERVED2_SHIFT 9
588 __le16 reserved3;
589 };
590
591 /*
592 * The common regular TX BD ring element
593 */
594 struct eth_tx_bd {
595 struct regpair addr /* Single continuous buffer */;
596 __le16 nbytes /* Number of bytes in this BD. */;
597 struct eth_tx_data_bd data /* Complementary information. */;
598 };
599
600
601 union eth_tx_bd_types {
602 struct eth_tx_1st_bd first_bd /* The first tx bd of a given packet */;
603 /* The second tx bd of a given packet */
604 struct eth_tx_2nd_bd second_bd;
605 struct eth_tx_3rd_bd third_bd /* The third tx bd of a given packet */;
606 struct eth_tx_bd reg_bd /* The common non-special bd */;
607 };
608
609
610
611
612
613
614 /*
615 * Eth Tx Tunnel Type
616 */
617 enum eth_tx_tunn_type {
618 ETH_TX_TUNN_GENEVE /* GENEVE Tunnel. */,
619 ETH_TX_TUNN_TTAG /* T-Tag Tunnel. */,
620 ETH_TX_TUNN_GRE /* GRE Tunnel. */,
621 ETH_TX_TUNN_VXLAN /* VXLAN Tunnel. */,
622 MAX_ETH_TX_TUNN_TYPE
623 };
624
625
626 /*
627 * Ystorm Queue Zone
628 */
629 struct xstorm_eth_queue_zone {
630 /* Tx interrupt coalescing TimeSet */
631 struct coalescing_timeset int_coalescing_timeset;
632 u8 reserved[7];
633 };
634
635
636 /*
637 * ETH doorbell data
638 */
639 struct eth_db_data {
640 u8 params;
641 /* destination of doorbell (use enum db_dest) */
642 #define ETH_DB_DATA_DEST_MASK 0x3
643 #define ETH_DB_DATA_DEST_SHIFT 0
644 /* aggregative command to CM (use enum db_agg_cmd_sel) */
645 #define ETH_DB_DATA_AGG_CMD_MASK 0x3
646 #define ETH_DB_DATA_AGG_CMD_SHIFT 2
647 #define ETH_DB_DATA_BYPASS_EN_MASK 0x1 /* enable QM bypass */
648 #define ETH_DB_DATA_BYPASS_EN_SHIFT 4
649 #define ETH_DB_DATA_RESERVED_MASK 0x1
650 #define ETH_DB_DATA_RESERVED_SHIFT 5
651 /* aggregative value selection */
652 #define ETH_DB_DATA_AGG_VAL_SEL_MASK 0x3
653 #define ETH_DB_DATA_AGG_VAL_SEL_SHIFT 6
654 /* bit for every DQ counter flags in CM context that DQ can increment */
655 u8 agg_flags;
656 __le16 bd_prod;
657 };
658
659 #endif /* __ETH_COMMON__ */